diff --git a/pcsx2/VUops.cpp b/pcsx2/VUops.cpp index e043760350..299803d2d6 100644 --- a/pcsx2/VUops.cpp +++ b/pcsx2/VUops.cpp @@ -2508,13 +2508,23 @@ void _vuRegsMTIR(VURegs * VU, _VURegsNum *VUregsn) { VUregsn->pipe = VUPIPE_FMAC; VUregsn->VFwrite = 0; VUregsn->VFread0 = _Fs_; - VUregsn->VFr0xyzw= _XYZW; + VUregsn->VFr0xyzw= 1 << (3-_Fsf_); VUregsn->VFread1 = 0; VUregsn->VIwrite = 1 << _Ft_; VUregsn->VIread = GET_VF0_FLAG(_Fs_); } -VUREGS_FTFS(MR32); +void _vuRegsMR32(VURegs * VU, _VURegsNum *VUregsn) { + VUregsn->pipe = VUPIPE_FMAC; + VUregsn->VFwrite = _Ft_; + VUregsn->VFwxyzw = _XYZW; + VUregsn->VFread0 = _Fs_; + VUregsn->VFr0xyzw= (_XYZW >> 1) | ((_XYZW << 3) & 0xf); //rotate + VUregsn->VFread1 = 0; + VUregsn->VFr1xyzw = 0xff; + VUregsn->VIwrite = 0; + VUregsn->VIread = (_Ft_ ? GET_VF0_FLAG(_Fs_) : 0); +} void _vuRegsLQ(VURegs * VU, _VURegsNum *VUregsn) { VUregsn->pipe = VUPIPE_FMAC; diff --git a/pcsx2/x86/iMMI.cpp b/pcsx2/x86/iMMI.cpp index 8dabe0b5c8..e031a7a6c6 100644 --- a/pcsx2/x86/iMMI.cpp +++ b/pcsx2/x86/iMMI.cpp @@ -2676,9 +2676,6 @@ CPU_SSE_XMMCACHE_END recCall( Interp::PHMADH, _Rd_ ); } -//////////////////////////////////////////////////// -//upper word of each doubleword in LO and HI is undocumented/undefined -//contains the NOT of the upper multiplication result (before the substraction of the lower multiplication result) void recPMSUBH() { CPU_SSE2_XMMCACHE_START((_Rd_?XMMINFO_WRITED:0)|XMMINFO_READS|XMMINFO_READT|XMMINFO_READLO|XMMINFO_READHI|XMMINFO_WRITELO|XMMINFO_WRITEHI) @@ -2740,12 +2737,8 @@ CPU_SSE_XMMCACHE_END } //////////////////////////////////////////////////// - -// rs = ... a1 a0 -// rt = ... b1 b0 -// rd = ... a1*b1 - a0*b0 -// hi = ... -// lo = ... (undefined by doc)NOT(a1*b1), a1*b1 - a0*b0 +//upper word of each doubleword in LO and HI is undocumented/undefined +//it contains the NOT of the upper multiplication result (before the substraction of the lower multiplication result) void recPHMSBH() { CPU_SSE2_XMMCACHE_START((_Rd_?XMMINFO_WRITED:0)|XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITELO|XMMINFO_WRITEHI) diff --git a/pcsx2/x86/iVUmicro.cpp b/pcsx2/x86/iVUmicro.cpp index 2422e5ad10..9335151798 100644 --- a/pcsx2/x86/iVUmicro.cpp +++ b/pcsx2/x86/iVUmicro.cpp @@ -280,6 +280,7 @@ void _recvuIALUTestStall(VURegs * VU, int reg) { VU->ialu[i].enable = 0; vucycle+= cycle; + _recvuTestPipes(VU, true); } void _recvuFMACAdd(VURegs * VU, int reg, int xyzw) { @@ -387,7 +388,7 @@ void _recvuFlushFDIV(VURegs * VU) { if (VU->fdiv.enable == 0) return; - cycle = VU->fdiv.Cycle - (vucycle - VU->fdiv.sCycle); + cycle = VU->fdiv.Cycle + 1 - (vucycle - VU->fdiv.sCycle); //VU->fdiv.Cycle contains the latency minus 1 (6 or 12) // Console::WriteLn("waiting FDIV pipe %d", params cycle); VU->fdiv.enable = 0; vucycle+= cycle; diff --git a/pcsx2/x86/iVUzerorec.cpp b/pcsx2/x86/iVUzerorec.cpp index 78ab51b4f6..0f454e638e 100644 --- a/pcsx2/x86/iVUzerorec.cpp +++ b/pcsx2/x86/iVUzerorec.cpp @@ -58,7 +58,7 @@ extern void iDumpVU1Registers(); #define SUPERVU_PROPAGATEFLAGS // the correct behavior of VUs, for some reason superman breaks gfx with it on... #ifndef _DEBUG -#define SUPERVU_INTERCACHING // registers won't be flushed at block boundaries (faster) +//#define SUPERVU_INTERCACHING // registers won't be flushed at block boundaries (faster) (nothing noticable speed-wise, causes SPS in Ratchet and clank (Nneeve) ) #endif #define SUPERVU_CHECKCONDITION 0 // has to be 0!! @@ -2060,9 +2060,9 @@ void VuBaseBlock::AssignVFRegs() _freeXMMreg(free1); _freeXMMreg(free2); } - else if( regs->VIwrite & (1<VIwrite & (1<VIwrite & (1<VIwrite & (1<VIread & (1<