From 577e15a9492a626489dda1fb5735ff5a8fe2e518 Mon Sep 17 00:00:00 2001 From: Ty Lamontagne Date: Thu, 12 Jan 2023 21:41:16 -0500 Subject: [PATCH] Debugger Expressions: Add 'target', 'load', and 'store' reference target -> The evaluated target of the load or the store, 0 if the opcode is not a memory access load -> The evaluated target of a load, is 0 if the opcode is not loading store -> The evaluated target of a store, is 0 if the opcode is not storing Fixes the disassembly widget mouse click handler Fixes the breakpoint dialog not setting the breakpoint address or condition cpu (oops) --- pcsx2-qt/Debugger/BreakpointDialog.cpp | 3 ++ pcsx2-qt/Debugger/DisassemblyWidget.cpp | 4 +- pcsx2/DebugTools/DebugInterface.cpp | 63 ++++++++++++++++++++++--- 3 files changed, 61 insertions(+), 9 deletions(-) diff --git a/pcsx2-qt/Debugger/BreakpointDialog.cpp b/pcsx2-qt/Debugger/BreakpointDialog.cpp index d013c3272e..2c53679384 100644 --- a/pcsx2-qt/Debugger/BreakpointDialog.cpp +++ b/pcsx2-qt/Debugger/BreakpointDialog.cpp @@ -112,11 +112,14 @@ void BreakpointDialog::accept() return; } + bp->addr = address; + bp->enabled = m_ui.chkEnable->isChecked(); if (!m_ui.txtCondition->text().isEmpty()) { bp->hasCond = true; + bp->cond.debug = m_cpu; if (!m_cpu->initExpression(m_ui.txtCondition->text().toLocal8Bit().constData(), expr)) { diff --git a/pcsx2-qt/Debugger/DisassemblyWidget.cpp b/pcsx2-qt/Debugger/DisassemblyWidget.cpp index d29a038bcf..bf26dda927 100644 --- a/pcsx2-qt/Debugger/DisassemblyWidget.cpp +++ b/pcsx2-qt/Debugger/DisassemblyWidget.cpp @@ -487,7 +487,7 @@ void DisassemblyWidget::paintEvent(QPaintEvent* event) void DisassemblyWidget::mousePressEvent(QMouseEvent* event) { - const u32 selectedAddress = (event->position().y() / m_rowHeight * 4) + m_visibleStart; + const u32 selectedAddress = (static_cast(event->position().y()) / m_rowHeight * 4) + m_visibleStart; if (event->buttons() & Qt::LeftButton) { if (event->modifiers() & Qt::ShiftModifier) @@ -523,7 +523,7 @@ void DisassemblyWidget::mouseDoubleClickEvent(QMouseEvent* event) if (!m_cpu->isAlive()) return; - const u32 selectedAddress = (event->position().y() / m_rowHeight * 4) + m_visibleStart; + const u32 selectedAddress = (static_cast(event->position().y()) / m_rowHeight * 4) + m_visibleStart; if (CBreakPoints::IsAddressBreakPoint(m_cpu->getCpuType(), selectedAddress)) { Host::RunOnCPUThread([&] { CBreakPoints::RemoveBreakPoint(m_cpu->getCpuType(), selectedAddress); }); diff --git a/pcsx2/DebugTools/DebugInterface.cpp b/pcsx2/DebugTools/DebugInterface.cpp index 3cca582ea0..8608596e4e 100644 --- a/pcsx2/DebugTools/DebugInterface.cpp +++ b/pcsx2/DebugTools/DebugInterface.cpp @@ -18,6 +18,7 @@ #include "DebugInterface.h" #include "Memory.h" #include "R5900.h" +#include "R5900OpcodeTables.h" #include "Debug.h" #include "VU.h" #include "GS.h" // Required for gsNonMirroredRead() @@ -39,14 +40,19 @@ R3000DebugInterface r3000Debug; enum ReferenceIndexType { - REF_INDEX_PC = 32, - REF_INDEX_HI = 33, - REF_INDEX_LO = 34, - REF_INDEX_FPU = 0x1000, - REF_INDEX_FPU_INT = 0x2000, - REF_INDEX_VFPU = 0x4000, - REF_INDEX_VFPU_INT = 0x8000, + REF_INDEX_PC = 32, + REF_INDEX_HI = 33, + REF_INDEX_LO = 34, + REF_INDEX_OPTARGET = 0x800, + REF_INDEX_OPSTORE = 0x1000, + REF_INDEX_OPLOAD = 0x2000, + REF_INDEX_IS_OPSL = REF_INDEX_OPTARGET | REF_INDEX_OPSTORE | REF_INDEX_OPLOAD, + REF_INDEX_FPU = 0x4000, + REF_INDEX_FPU_INT = 0x8000, + REF_INDEX_VFPU = 0x10000, + REF_INDEX_VFPU_INT = 0x20000, REF_INDEX_IS_FLOAT = REF_INDEX_FPU | REF_INDEX_VFPU, + }; @@ -88,6 +94,23 @@ public: return true; } + if (strcasecmp(str, "target") == 0) + { + referenceIndex = REF_INDEX_OPTARGET; + return true; + } + + if (strcasecmp(str, "load") == 0) + { + referenceIndex = REF_INDEX_OPLOAD; + return true; + } + + if (strcasecmp(str, "store") == 0) + { + referenceIndex = REF_INDEX_OPSTORE; + return true; + } return false; } @@ -109,6 +132,32 @@ public: return cpu->getHI()._u64[0]; if (referenceIndex == REF_INDEX_LO) return cpu->getLO()._u64[0]; + if (referenceIndex & REF_INDEX_IS_OPSL) + { + const u32 OP = memRead32(cpu->getPC()); + const R5900::OPCODE& opcode = R5900::GetInstruction(OP); + if (opcode.flags & IS_MEMORY) + { + // Fetch the address in the base register + u32 target = cpuRegs.GPR.r[(OP >> 21) & 0x1F].UD[0]; + // Add the offset (lower 16 bits) + target += static_cast(OP); + + if (referenceIndex & REF_INDEX_OPTARGET) + { + return target; + } + else if (referenceIndex & REF_INDEX_OPLOAD) + { + return (opcode.flags & IS_LOAD) ? target : 0; + } + else if (referenceIndex & REF_INDEX_OPSTORE) + { + return (opcode.flags & IS_STORE) ? target : 0; + } + } + return 0; + } return -1; }