diff --git a/common/include/Pcsx2Defs.h b/common/include/Pcsx2Defs.h index 6e23feb18e..b077ea8a29 100644 --- a/common/include/Pcsx2Defs.h +++ b/common/include/Pcsx2Defs.h @@ -54,14 +54,14 @@ extern "C" unsigned __int64 __xgetbv(int); # ifdef _MSC_VER # define jASSUME(exp) (__assume(exp)) # else -# define jASSUME(exp) ((void) sizeof(exp)) +# define jASSUME(exp) do { if(!(exp)) __builtin_unreachable(); } while(0) # endif # else # define jBREAKPOINT() __debugbreak(); # ifdef wxASSERT # define jASSUME(exp) wxASSERT(exp) # else -# define jASSUME(exp) do { if(exp) ; else jBREAKPOINT(); } while(0); +# define jASSUME(exp) do { if(!(exp)) jBREAKPOINT(); } while(0) # endif # endif #endif diff --git a/common/include/Utilities/Assertions.h b/common/include/Utilities/Assertions.h index e0a4e7f5cc..0f268d028e 100644 --- a/common/include/Utilities/Assertions.h +++ b/common/include/Utilities/Assertions.h @@ -117,8 +117,8 @@ extern pxDoAssertFnType* pxDoAssert; # define pxAssumeMsg(cond, msg) pxAssumeRel(cond, msg) # define pxAssumeDev(cond, msg) pxAssumeRel(cond, msg) -# define pxFail(msg) pxAssertMsg(false, msg) -# define pxFailDev(msg) pxAssertDev(false, msg) +# define pxFail(msg) pxAssertMsg(false, msg) +# define pxFailDev(msg) pxAssertDev(false, msg) #elif defined(PCSX2_DEVBUILD) @@ -141,8 +141,8 @@ extern pxDoAssertFnType* pxDoAssert; # define pxAssumeMsg(cond, msg) pxAssumeRel(cond, msg) //(__assume(cond)) # define pxAssumeDev(cond, msg) pxAssumeRel(cond, msg) -# define pxFail(msg) pxAssertDev(false, msg) -# define pxFailDev(msg) pxAssertDev(false, msg) +# define pxFail(msg) pxAssertDev(false, msg) +# define pxFailDev(msg) pxAssertDev(false, msg) #else @@ -155,8 +155,8 @@ extern pxDoAssertFnType* pxDoAssert; # define pxAssumeMsg(cond, msg) (__assume(cond)) # define pxAssumeDev(cond, msg) (__assume(cond)) -# define pxFail(msg) do{} while(0) -# define pxFailDev(msg) do{} while(0) +# define pxFail(msg) do{} while(0) +# define pxFailDev(msg) do{} while(0) #endif diff --git a/pcsx2/Counters.cpp b/pcsx2/Counters.cpp index c6a0ac5cc6..1eb8557caa 100644 --- a/pcsx2/Counters.cpp +++ b/pcsx2/Counters.cpp @@ -68,7 +68,7 @@ void rcntReset(int index) { static __fi void _rcntSet( int cntidx ) { s32 c; - jASSUME( cntidx <= 4 ); // rcntSet isn't valid for h/vsync counters. + pxAssume( cntidx <= 4 ); // rcntSet isn't valid for h/vsync counters. const Counter& counter = counters[cntidx]; diff --git a/pcsx2/IopCounters.cpp b/pcsx2/IopCounters.cpp index b6e69c7a37..454063273c 100644 --- a/pcsx2/IopCounters.cpp +++ b/pcsx2/IopCounters.cpp @@ -542,7 +542,7 @@ __fi void psxRcntWmode16( int index, u32 value ) { PSXCNT_LOG( "IOP Counter[%d] writeMode = 0x%04X", index, value ); - jASSUME( index >= 0 && index < 3 ); + pxAssume( index >= 0 && index < 3 ); psxCounter& counter = psxCounters[index]; counter.mode = value; @@ -603,7 +603,7 @@ __fi void psxRcntWmode32( int index, u32 value ) { PSXCNT_LOG( "IOP Counter[%d] writeMode = 0x%04x", index, value ); - jASSUME( index >= 3 && index < 6 ); + pxAssume( index >= 3 && index < 6 ); psxCounter& counter = psxCounters[index]; counter.mode = value; diff --git a/pcsx2/R5900.cpp b/pcsx2/R5900.cpp index dfd71b54ec..29ff799766 100644 --- a/pcsx2/R5900.cpp +++ b/pcsx2/R5900.cpp @@ -261,7 +261,7 @@ __fi void cpuSetEvent() __fi void cpuClearInt( uint i ) { - jASSUME( i < 32 ); + pxAssume( i < 32 ); cpuRegs.interrupt &= ~(1 << i); } diff --git a/pcsx2/ps2/Iop/IopHwRead.cpp b/pcsx2/ps2/Iop/IopHwRead.cpp index f1c4a0ab77..4603eb5bd9 100644 --- a/pcsx2/ps2/Iop/IopHwRead.cpp +++ b/pcsx2/ps2/Iop/IopHwRead.cpp @@ -29,7 +29,7 @@ using namespace Internal; mem8_t __fastcall iopHwRead8_Page1( u32 addr ) { // all addresses are assumed to be prefixed with 0x1f801xxx: - jASSUME( (addr >> 12) == 0x1f801 ); + pxAssume( (addr >> 12) == 0x1f801 ); u32 masked_addr = addr & 0x0fff; @@ -81,7 +81,7 @@ mem8_t __fastcall iopHwRead8_Page1( u32 addr ) mem8_t __fastcall iopHwRead8_Page3( u32 addr ) { // all addresses are assumed to be prefixed with 0x1f803xxx: - jASSUME( (addr >> 12) == 0x1f803 ); + pxAssume( (addr >> 12) == 0x1f803 ); mem8_t ret; if( addr == 0x1f803100 ) // PS/EE/IOP conf related @@ -98,7 +98,7 @@ mem8_t __fastcall iopHwRead8_Page3( u32 addr ) mem8_t __fastcall iopHwRead8_Page8( u32 addr ) { // all addresses are assumed to be prefixed with 0x1f808xxx: - jASSUME( (addr >> 12) == 0x1f808 ); + pxAssume( (addr >> 12) == 0x1f808 ); mem8_t ret; @@ -117,10 +117,10 @@ template< typename T > static __fi T _HwRead_16or32_Page1( u32 addr ) { // all addresses are assumed to be prefixed with 0x1f801xxx: - jASSUME( (addr >> 12) == 0x1f801 ); + pxAssume( (addr >> 12) == 0x1f801 ); // all addresses should be aligned to the data operand size: - jASSUME( + pxAssume( ( sizeof(T) == 2 && (addr & 1) == 0 ) || ( sizeof(T) == 4 && (addr & 3) == 0 ) ); @@ -385,7 +385,7 @@ mem16_t __fastcall iopHwRead16_Page1( u32 addr ) mem16_t __fastcall iopHwRead16_Page3( u32 addr ) { // all addresses are assumed to be prefixed with 0x1f803xxx: - jASSUME( (addr >> 12) == 0x1f803 ); + pxAssume( (addr >> 12) == 0x1f803 ); mem16_t ret = psxHu16(addr); IopHwTraceLog( addr, ret, true ); @@ -397,7 +397,7 @@ mem16_t __fastcall iopHwRead16_Page3( u32 addr ) mem16_t __fastcall iopHwRead16_Page8( u32 addr ) { // all addresses are assumed to be prefixed with 0x1f808xxx: - jASSUME( (addr >> 12) == 0x1f808 ); + pxAssume( (addr >> 12) == 0x1f808 ); mem16_t ret = psxHu16(addr); IopHwTraceLog( addr, ret, true ); @@ -416,7 +416,7 @@ mem32_t __fastcall iopHwRead32_Page1( u32 addr ) mem32_t __fastcall iopHwRead32_Page3( u32 addr ) { // all addresses are assumed to be prefixed with 0x1f803xxx: - jASSUME( (addr >> 12) == 0x1f803 ); + pxAssume( (addr >> 12) == 0x1f803 ); const mem32_t ret = psxHu32(addr); IopHwTraceLog( addr, ret, true ); return ret; @@ -427,7 +427,7 @@ mem32_t __fastcall iopHwRead32_Page3( u32 addr ) mem32_t __fastcall iopHwRead32_Page8( u32 addr ) { // all addresses are assumed to be prefixed with 0x1f808xxx: - jASSUME( (addr >> 12) == 0x1f808 ); + pxAssume( (addr >> 12) == 0x1f808 ); u32 masked_addr = addr & 0x0fff; mem32_t ret; diff --git a/pcsx2/x86/ix86-32/iR5900LoadStore.cpp b/pcsx2/x86/ix86-32/iR5900LoadStore.cpp index 8126aeb64c..e602e4b17b 100644 --- a/pcsx2/x86/ix86-32/iR5900LoadStore.cpp +++ b/pcsx2/x86/ix86-32/iR5900LoadStore.cpp @@ -105,7 +105,7 @@ void SetFastMemory(int bSetFast) // void recLoad64( u32 bits, bool sign ) { - jASSUME( bits == 64 || bits == 128 ); + pxAssume( bits == 64 || bits == 128 ); // Load EDX with the destination. // 64/128 bit modes load the result directly into the cpuRegs.GPR struct. @@ -147,7 +147,7 @@ void recLoad64( u32 bits, bool sign ) // void recLoad32( u32 bits, bool sign ) { - jASSUME( bits <= 32 ); + pxAssume( bits <= 32 ); // 8/16/32 bit modes return the loaded value in EAX. diff --git a/pcsx2/x86/ix86-32/recVTLB.cpp b/pcsx2/x86/ix86-32/recVTLB.cpp index 120814045d..df13f4e69e 100644 --- a/pcsx2/x86/ix86-32/recVTLB.cpp +++ b/pcsx2/x86/ix86-32/recVTLB.cpp @@ -339,7 +339,7 @@ void vtlb_dynarec_init() // Dynarec Load Implementations void vtlb_DynGenRead64(u32 bits) { - jASSUME( bits == 64 || bits == 128 ); + pxAssume( bits == 64 || bits == 128 ); uptr* writeback = DynGen_PrepRegs(); @@ -355,7 +355,7 @@ void vtlb_DynGenRead64(u32 bits) // Returns read value in eax. void vtlb_DynGenRead32(u32 bits, bool sign) { - jASSUME( bits <= 32 ); + pxAssume( bits <= 32 ); uptr* writeback = DynGen_PrepRegs(); diff --git a/plugins/GSdx/stdafx.h b/plugins/GSdx/stdafx.h index 80181cb3e4..bec5ec3e00 100644 --- a/plugins/GSdx/stdafx.h +++ b/plugins/GSdx/stdafx.h @@ -204,7 +204,7 @@ using namespace std; #include "assert.h" #define __forceinline __inline__ __attribute__((always_inline,unused)) // #define __forceinline __inline__ __attribute__((__always_inline__,__gnu_inline__)) - #define __assume(c) ((void)0) + #define __assume(c) do { if (!(c)) __builtin_unreachable(); } while(0) #endif diff --git a/plugins/zerogs/opengl/common/PS2Etypes.h b/plugins/zerogs/opengl/common/PS2Etypes.h index 5091291d9a..b1226e333d 100644 --- a/plugins/zerogs/opengl/common/PS2Etypes.h +++ b/plugins/zerogs/opengl/common/PS2Etypes.h @@ -32,25 +32,10 @@ #define CALLBACK __stdcall #endif - -// jASSUME - give hints to the optimizer -// This is primarily useful for the default case switch optimizer, which enables VC to -// generate more compact switches. - -#ifdef NDEBUG -# define jBREAKPOINT() ((void) 0) -# ifdef _MSC_VER -# define jASSUME(exp) (__assume(exp)) -# else -# define jASSUME(exp) ((void) sizeof(exp)) -# endif +#ifdef _MSC_VER +#define UNREACHABLE_CODE __assume(0) #else -# if defined(_MSC_VER) -# define jBREAKPOINT() do { __asm int 3 } while(0) -# else -# define jBREAKPOINT() ((void) *(volatile char *) 0) -# endif -# define jASSUME(exp) if(exp) ; else jBREAKPOINT() +#define UNREACHABLE_CODE __builtin_unreachable() #endif // disable the default case in a switch @@ -59,7 +44,7 @@ break; \ \ default: \ - jASSUME(0); \ + UNREACHABLE_CODE; \ break; \ }