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x86emitter: Fix up emitting of xmm -> ptr64 operands

This commit is contained in:
Connor McLaughlin 2022-11-06 17:22:00 +10:00 committed by refractionpcsx2
parent 3d6a550f23
commit 56501e0811
7 changed files with 243 additions and 245 deletions
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16
common/emitter/implement/simd_shufflepack.h
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@ -192,16 +192,16 @@ namespace x86Emitter
struct xImplSimd_PInsert struct xImplSimd_PInsert
{ {
void B(const xRegisterSSE& to, const xRegister32& from, u8 imm8) const; void B(const xRegisterSSE& to, const xRegister32& from, u8 imm8) const;
void B(const xRegisterSSE& to, const xIndirectVoid& from, u8 imm8) const; void B(const xRegisterSSE& to, const xIndirect32& from, u8 imm8) const;
void W(const xRegisterSSE& to, const xRegister32& from, u8 imm8) const; void W(const xRegisterSSE& to, const xRegister32& from, u8 imm8) const;
void W(const xRegisterSSE& to, const xIndirectVoid& from, u8 imm8) const; void W(const xRegisterSSE& to, const xIndirect32& from, u8 imm8) const;
void D(const xRegisterSSE& to, const xRegister32& from, u8 imm8) const; void D(const xRegisterSSE& to, const xRegister32& from, u8 imm8) const;
void D(const xRegisterSSE& to, const xIndirectVoid& from, u8 imm8) const; void D(const xRegisterSSE& to, const xIndirect32& from, u8 imm8) const;
void Q(const xRegisterSSE& to, const xRegister64& from, u8 imm8) const; void Q(const xRegisterSSE& to, const xRegister64& from, u8 imm8) const;
void Q(const xRegisterSSE& to, const xIndirectVoid& from, u8 imm8) const; void Q(const xRegisterSSE& to, const xIndirect64& from, u8 imm8) const;
}; };
////////////////////////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////////////////////////
@ -215,7 +215,7 @@ namespace x86Emitter
// of dest are zero-extended (cleared). This can be used to extract any single packed // of dest are zero-extended (cleared). This can be used to extract any single packed
// byte value from src into an x86 32 bit register. // byte value from src into an x86 32 bit register.
void B(const xRegister32& to, const xRegisterSSE& from, u8 imm8) const; void B(const xRegister32& to, const xRegisterSSE& from, u8 imm8) const;
void B(const xIndirectVoid& dest, const xRegisterSSE& from, u8 imm8) const; void B(const xIndirect32& dest, const xRegisterSSE& from, u8 imm8) const;
// Copies the word element specified by imm8 from src to dest. The upper bits // Copies the word element specified by imm8 from src to dest. The upper bits
// of dest are zero-extended (cleared). This can be used to extract any single packed // of dest are zero-extended (cleared). This can be used to extract any single packed
@ -224,15 +224,15 @@ namespace x86Emitter
// [SSE-4.1] Note: Indirect memory forms of this instruction are an SSE-4.1 extension! // [SSE-4.1] Note: Indirect memory forms of this instruction are an SSE-4.1 extension!
// //
void W(const xRegister32& to, const xRegisterSSE& from, u8 imm8) const; void W(const xRegister32& to, const xRegisterSSE& from, u8 imm8) const;
void W(const xIndirectVoid& dest, const xRegisterSSE& from, u8 imm8) const; void W(const xIndirect32& dest, const xRegisterSSE& from, u8 imm8) const;
// [SSE-4.1] Copies the dword element specified by imm8 from src to dest. This can be // [SSE-4.1] Copies the dword element specified by imm8 from src to dest. This can be
// used to extract any single packed dword value from src into an x86 32 bit register. // used to extract any single packed dword value from src into an x86 32 bit register.
void D(const xRegister32& to, const xRegisterSSE& from, u8 imm8) const; void D(const xRegister32& to, const xRegisterSSE& from, u8 imm8) const;
void D(const xIndirectVoid& dest, const xRegisterSSE& from, u8 imm8) const; void D(const xIndirect32& dest, const xRegisterSSE& from, u8 imm8) const;
// Insert a qword integer value from r/m64 into the xmm1 at the destination element specified by imm8. // Insert a qword integer value from r/m64 into the xmm1 at the destination element specified by imm8.
void Q(const xRegister64& to, const xRegisterSSE& from, u8 imm8) const; void Q(const xRegister64& to, const xRegisterSSE& from, u8 imm8) const;
void Q(const xIndirectVoid& dest, const xRegisterSSE& from, u8 imm8) const; void Q(const xIndirect64& dest, const xRegisterSSE& from, u8 imm8) const;
}; };
} // namespace x86Emitter } // namespace x86Emitter

4
common/emitter/jmp.cpp
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@ -88,7 +88,7 @@ namespace x86Emitter
} }
else else
{ {
xMOV(rax, ptrNative[f]); xLEA(rax, ptr64[f]);
xCALL(rax); xCALL(rax);
} }
} }
@ -103,7 +103,7 @@ namespace x86Emitter
} }
else else
{ {
xMOV(rax, ptrNative[f]); xLEA(rax, ptr64[f]);
xCALL(rax); xCALL(rax);
} }
} }

24
common/emitter/simd.cpp
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@ -474,28 +474,28 @@ namespace x86Emitter
} }
void xImplSimd_PInsert::B(const xRegisterSSE& to, const xRegister32& from, u8 imm8) const { xOpWrite0F(0x66, 0x203a, to, from, imm8); } void xImplSimd_PInsert::B(const xRegisterSSE& to, const xRegister32& from, u8 imm8) const { xOpWrite0F(0x66, 0x203a, to, from, imm8); }
void xImplSimd_PInsert::B(const xRegisterSSE& to, const xIndirectVoid& from, u8 imm8) const { xOpWrite0F(0x66, 0x203a, to, from, imm8); } void xImplSimd_PInsert::B(const xRegisterSSE& to, const xIndirect32& from, u8 imm8) const { xOpWrite0F(0x66, 0x203a, to, from, imm8); }
void xImplSimd_PInsert::W(const xRegisterSSE& to, const xRegister32& from, u8 imm8) const { xOpWrite0F(0x66, 0xc4, to, from, imm8); } void xImplSimd_PInsert::W(const xRegisterSSE& to, const xRegister32& from, u8 imm8) const { xOpWrite0F(0x66, 0xc4, to, from, imm8); }
void xImplSimd_PInsert::W(const xRegisterSSE& to, const xIndirectVoid& from, u8 imm8) const { xOpWrite0F(0x66, 0xc4, to, from, imm8); } void xImplSimd_PInsert::W(const xRegisterSSE& to, const xIndirect32& from, u8 imm8) const { xOpWrite0F(0x66, 0xc4, to, from, imm8); }
void xImplSimd_PInsert::D(const xRegisterSSE& to, const xRegister32& from, u8 imm8) const { xOpWrite0F(0x66, 0x223a, to, from, imm8); } void xImplSimd_PInsert::D(const xRegisterSSE& to, const xRegister32& from, u8 imm8) const { xOpWrite0F(0x66, 0x223a, to, from, imm8); }
void xImplSimd_PInsert::D(const xRegisterSSE& to, const xIndirectVoid& from, u8 imm8) const { xOpWrite0F(0x66, 0x223a, to, from, imm8); } void xImplSimd_PInsert::D(const xRegisterSSE& to, const xIndirect32& from, u8 imm8) const { xOpWrite0F(0x66, 0x223a, to, from, imm8); }
void xImplSimd_PInsert::Q(const xRegisterSSE& to, const xRegister64& from, u8 imm8) const { xOpWrite0F(0x66, 0x223a, to, from, imm8); } void xImplSimd_PInsert::Q(const xRegisterSSE& to, const xRegister64& from, u8 imm8) const { xOpWrite0F(0x66, 0x223a, to, from, imm8); }
void xImplSimd_PInsert::Q(const xRegisterSSE& to, const xIndirectVoid& from, u8 imm8) const { xOpWrite0F(0x66, 0x223a, to, from, imm8); } void xImplSimd_PInsert::Q(const xRegisterSSE& to, const xIndirect64& from, u8 imm8) const { xOpWrite0F(0x66, 0x223a, to, from, imm8); }
void SimdImpl_PExtract::B(const xRegister32& to, const xRegisterSSE& from, u8 imm8) const { xOpWrite0F(0x66, 0x143a, to, from, imm8); } void SimdImpl_PExtract::B(const xRegister32& to, const xRegisterSSE& from, u8 imm8) const { xOpWrite0F(0x66, 0x143a, from, to, imm8); }
void SimdImpl_PExtract::B(const xIndirectVoid& dest, const xRegisterSSE& from, u8 imm8) const { xOpWrite0F(0x66, 0x143a, from, dest, imm8); } void SimdImpl_PExtract::B(const xIndirect32& dest, const xRegisterSSE& from, u8 imm8) const { xOpWrite0F(0x66, 0x143a, from, dest, imm8); }
void SimdImpl_PExtract::W(const xRegister32& to, const xRegisterSSE& from, u8 imm8) const { xOpWrite0F(0x66, 0xc5, to, from, imm8); } void SimdImpl_PExtract::W(const xRegister32& to, const xRegisterSSE& from, u8 imm8) const { xOpWrite0F(0x66, 0xc5, from, to, imm8); }
void SimdImpl_PExtract::W(const xIndirectVoid& dest, const xRegisterSSE& from, u8 imm8) const { xOpWrite0F(0x66, 0x153a, from, dest, imm8); } void SimdImpl_PExtract::W(const xIndirect32& dest, const xRegisterSSE& from, u8 imm8) const { xOpWrite0F(0x66, 0x153a, from, dest, imm8); }
void SimdImpl_PExtract::D(const xRegister32& to, const xRegisterSSE& from, u8 imm8) const { xOpWrite0F(0x66, 0x163a, to, from, imm8); } void SimdImpl_PExtract::D(const xRegister32& to, const xRegisterSSE& from, u8 imm8) const { xOpWrite0F(0x66, 0x163a, from, to, imm8); }
void SimdImpl_PExtract::D(const xIndirectVoid& dest, const xRegisterSSE& from, u8 imm8) const { xOpWrite0F(0x66, 0x163a, from, dest, imm8); } void SimdImpl_PExtract::D(const xIndirect32& dest, const xRegisterSSE& from, u8 imm8) const { xOpWrite0F(0x66, 0x163a, from, dest, imm8); }
void SimdImpl_PExtract::Q(const xRegister64& to, const xRegisterSSE& from, u8 imm8) const { xOpWrite0F(0x66, 0x163a, to, from, imm8); } void SimdImpl_PExtract::Q(const xRegister64& to, const xRegisterSSE& from, u8 imm8) const { xOpWrite0F(0x66, 0x163a, from, to, imm8); }
void SimdImpl_PExtract::Q(const xIndirectVoid& dest, const xRegisterSSE& from, u8 imm8) const { xOpWrite0F(0x66, 0x163a, from, dest, imm8); } void SimdImpl_PExtract::Q(const xIndirect64& dest, const xRegisterSSE& from, u8 imm8) const { xOpWrite0F(0x66, 0x163a, from, dest, imm8); }
const xImplSimd_Shuffle xSHUF = {}; const xImplSimd_Shuffle xSHUF = {};

2
common/emitter/x86emitter.cpp
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@ -503,7 +503,7 @@ const xRegister32
void EmitRex(const xRegisterBase& reg1, const xIndirectVoid& sib) void EmitRex(const xRegisterBase& reg1, const xIndirectVoid& sib)
{ {
bool w = reg1.IsWide(); bool w = reg1.IsWide() || sib.IsWide();
bool r = reg1.IsExtended(); bool r = reg1.IsExtended();
bool x = sib.Index.IsExtended(); bool x = sib.Index.IsExtended();
bool b = sib.Base.IsExtended(); bool b = sib.Base.IsExtended();

2
common/emitter/x86types.h
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@ -845,7 +845,7 @@ extern const xRegister32
bool IsMem() const { return true; } bool IsMem() const { return true; }
bool IsReg() const { return false; } bool IsReg() const { return false; }
bool IsExtended() const { return false; } // Non sense but ease template bool IsExtended() const { return false; } // Non sense but ease template
bool IsWide() const { return GetOperandSize() == 8; } bool IsWide() const { return _operandSize == 8; }
operator xAddressVoid() operator xAddressVoid()
{ {

5
tests/ctest/x86emitter/codegen_tests.h
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@ -17,7 +17,4 @@
void runCodegenTest(void (*exec)(void *base), const char* description, const char* expected); void runCodegenTest(void (*exec)(void *base), const char* description, const char* expected);
// Use null to skip, empty string to expect no output #define CODEGEN_TEST(command, expected) runCodegenTest([](void *base){ command; }, #command, expected)
#define CODEGEN_TEST(command, expected32, expected64) runCodegenTest([](void *base){ command; }, #command, expected64)
#define CODEGEN_TEST_64(command, expected) CODEGEN_TEST(command, nullptr, expected)
#define CODEGEN_TEST_BOTH(command, expected) CODEGEN_TEST(command, expected, expected)

435
tests/ctest/x86emitter/codegen_tests_main.cpp
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@ -22,273 +22,274 @@ using namespace x86Emitter;
TEST(CodegenTests, MOVTest) TEST(CodegenTests, MOVTest)
{ {
CODEGEN_TEST_BOTH(xMOV(rax, 0), "31 c0"); CODEGEN_TEST(xMOV(rax, 0), "31 c0");
CODEGEN_TEST_64(xMOV(rax, rcx), "48 89 c8"); CODEGEN_TEST(xMOV(rax, rcx), "48 89 c8");
CODEGEN_TEST_BOTH(xMOV(eax, ecx), "89 c8"); CODEGEN_TEST(xMOV(eax, ecx), "89 c8");
CODEGEN_TEST_64(xMOV(r8, 0), "45 31 c0"); CODEGEN_TEST(xMOV(r8, 0), "45 31 c0");
CODEGEN_TEST_64(xMOV(rax, r8), "4c 89 c0"); CODEGEN_TEST(xMOV(rax, r8), "4c 89 c0");
CODEGEN_TEST_64(xMOV(r8, rax), "49 89 c0"); CODEGEN_TEST(xMOV(r8, rax), "49 89 c0");
CODEGEN_TEST_64(xMOV(r8, r9), "4d 89 c8"); CODEGEN_TEST(xMOV(r8, r9), "4d 89 c8");
CODEGEN_TEST_64(xMOV(rax, ptrNative[rcx]), "48 8b 01"); CODEGEN_TEST(xMOV(rax, ptr64[rcx]), "48 8b 01");
CODEGEN_TEST_BOTH(xMOV(eax, ptrNative[rcx]), "8b 01"); CODEGEN_TEST(xMOV(eax, ptr32[rcx]), "8b 01");
CODEGEN_TEST_64(xMOV(ptrNative[rax], rcx), "48 89 08"); CODEGEN_TEST(xMOV(ptr64[rax], rcx), "48 89 08");
CODEGEN_TEST_BOTH(xMOV(ptr32[rax], ecx), "89 08"); CODEGEN_TEST(xMOV(ptr32[rax], ecx), "89 08");
CODEGEN_TEST_64(xMOV(rax, ptrNative[r8]), "49 8b 00"); CODEGEN_TEST(xMOV(rax, ptr64[r8]), "49 8b 00");
CODEGEN_TEST_64(xMOV(ptrNative[r8], rax), "49 89 00"); CODEGEN_TEST(xMOV(ptr64[r8], rax), "49 89 00");
CODEGEN_TEST_64(xMOV(r8, ptrNative[r9]), "4d 8b 01"); CODEGEN_TEST(xMOV(r8, ptr64[r9]), "4d 8b 01");
CODEGEN_TEST_64(xMOV(ptrNative[r8], r9), "4d 89 08"); CODEGEN_TEST(xMOV(ptr64[r8], r9), "4d 89 08");
CODEGEN_TEST_64(xMOV(rax, ptrNative[rbx*4+3+rcx]), "48 8b 44 99 03"); CODEGEN_TEST(xMOV(rax, ptr64[rbx*4+3+rcx]), "48 8b 44 99 03");
CODEGEN_TEST_64(xMOV(ptrNative[rbx*4+3+rax], rcx), "48 89 4c 98 03"); CODEGEN_TEST(xMOV(ptr64[rbx*4+3+rax], rcx), "48 89 4c 98 03");
CODEGEN_TEST_BOTH(xMOV(eax, ptr32[rbx*4+3+rcx]), "8b 44 99 03"); CODEGEN_TEST(xMOV(eax, ptr32[rbx*4+3+rcx]), "8b 44 99 03");
CODEGEN_TEST_BOTH(xMOV(ptr32[rbx*4+3+rax], ecx), "89 4c 98 03"); CODEGEN_TEST(xMOV(ptr32[rbx*4+3+rax], ecx), "89 4c 98 03");
CODEGEN_TEST_64(xMOV(r8, ptrNative[r10*4+3+r9]), "4f 8b 44 91 03"); CODEGEN_TEST(xMOV(r8, ptr64[r10*4+3+r9]), "4f 8b 44 91 03");
CODEGEN_TEST_64(xMOV(ptrNative[r9*4+3+r8], r10), "4f 89 54 88 03"); CODEGEN_TEST(xMOV(ptr64[r9*4+3+r8], r10), "4f 89 54 88 03");
CODEGEN_TEST_64(xMOV(ptrNative[r8], 0), "49 c7 00 00 00 00 00"); CODEGEN_TEST(xMOV(ptr64[r8], 0), "49 c7 00 00 00 00 00");
CODEGEN_TEST_BOTH(xMOV(ptr32[rax], 0), "c7 00 00 00 00 00"); CODEGEN_TEST(xMOV(ptr32[rax], 0), "c7 00 00 00 00 00");
CODEGEN_TEST_BOTH(xMOV(ptr32[rbx*4+3+rax], -1), "c7 44 98 03 ff ff ff ff"); CODEGEN_TEST(xMOV(ptr32[rbx*4+3+rax], -1), "c7 44 98 03 ff ff ff ff");
CODEGEN_TEST_64(xMOV(rax, 0xffffffff), "b8 ff ff ff ff"); CODEGEN_TEST(xMOV(rax, 0xffffffff), "b8 ff ff ff ff");
CODEGEN_TEST_64(xMOV(r8, -1), "49 c7 c0 ff ff ff ff"); CODEGEN_TEST(xMOV(r8, -1), "49 c7 c0 ff ff ff ff");
CODEGEN_TEST_64(xMOV64(rax, 0x1234567890), "48 b8 90 78 56 34 12 00 00 00"); CODEGEN_TEST(xMOV64(rax, 0x1234567890), "48 b8 90 78 56 34 12 00 00 00");
CODEGEN_TEST_64(xMOV64(r8, 0x1234567890), "49 b8 90 78 56 34 12 00 00 00"); CODEGEN_TEST(xMOV64(r8, 0x1234567890), "49 b8 90 78 56 34 12 00 00 00");
CODEGEN_TEST_64(xMOV(ptr32[base], 0x12), "c7 05 f6 ff ff ff 12 00 00 00"); CODEGEN_TEST(xMOV(ptr32[base], 0x12), "c7 05 f6 ff ff ff 12 00 00 00");
CODEGEN_TEST_BOTH(xMOVSX(eax, dx), "0f bf c2"); CODEGEN_TEST(xMOVSX(eax, dx), "0f bf c2");
CODEGEN_TEST_64(xMOVSX(rax, r8d), "49 63 c0"); CODEGEN_TEST(xMOVSX(rax, r8d), "49 63 c0");
CODEGEN_TEST_64(xMOVSX(rax, ebx), "48 63 c3"); CODEGEN_TEST(xMOVSX(rax, ebx), "48 63 c3");
} }
TEST(CodegenTests, LEATest) TEST(CodegenTests, LEATest)
{ {
CODEGEN_TEST_64(xLEA(rax, ptr[rcx]), "48 89 c8"); // Converted to mov rax, rcx CODEGEN_TEST(xLEA(rax, ptr[rcx]), "48 89 c8"); // Converted to mov rax, rcx
CODEGEN_TEST_BOTH(xLEA(eax, ptr[rcx]), "89 c8"); // Converted to mov eax, ecx CODEGEN_TEST(xLEA(eax, ptr[rcx]), "89 c8"); // Converted to mov eax, ecx
CODEGEN_TEST_64(xLEA(rax, ptr[r8]), "4c 89 c0"); // Converted to mov rax, r8 CODEGEN_TEST(xLEA(rax, ptr[r8]), "4c 89 c0"); // Converted to mov rax, r8
CODEGEN_TEST_64(xLEA(r8, ptr[r9]), "4d 89 c8"); // Converted to mov r8, r9 CODEGEN_TEST(xLEA(r8, ptr[r9]), "4d 89 c8"); // Converted to mov r8, r9
CODEGEN_TEST_64(xLEA(rax, ptr[rbx*4+3+rcx]), "48 8d 44 99 03"); CODEGEN_TEST(xLEA(rax, ptr[rbx*4+3+rcx]), "48 8d 44 99 03");
CODEGEN_TEST_BOTH(xLEA(eax, ptr32[rbx*4+3+rcx]), "8d 44 99 03"); CODEGEN_TEST(xLEA(eax, ptr32[rbx*4+3+rcx]), "8d 44 99 03");
CODEGEN_TEST_64(xLEA(r8, ptr[r10*4+3+r9]), "4f 8d 44 91 03"); CODEGEN_TEST(xLEA(r8, ptr[r10*4+3+r9]), "4f 8d 44 91 03");
CODEGEN_TEST_64(xLEA(r8, ptr[base]), "4c 8d 05 f9 ff ff ff"); CODEGEN_TEST(xLEA(r8, ptr[base]), "4c 8d 05 f9 ff ff ff");
CODEGEN_TEST_64(xLoadFarAddr(r8, base), "4c 8d 05 f9 ff ff ff"); CODEGEN_TEST(xLoadFarAddr(r8, base), "4c 8d 05 f9 ff ff ff");
CODEGEN_TEST_64(xLoadFarAddr(r8, (void*)0x1234567890), "49 b8 90 78 56 34 12 00 00 00"); CODEGEN_TEST(xLoadFarAddr(r8, (void*)0x1234567890), "49 b8 90 78 56 34 12 00 00 00");
CODEGEN_TEST_BOTH(xLEA(rax, ptr[(void*)0x1234]), "b8 34 12 00 00"); // Converted to mov rax, 0x1234 CODEGEN_TEST(xLEA(rax, ptr[(void*)0x1234]), "b8 34 12 00 00"); // Converted to mov rax, 0x1234
CODEGEN_TEST_BOTH(xLoadFarAddr(rax, (void*)0x1234), "b8 34 12 00 00"); CODEGEN_TEST(xLoadFarAddr(rax, (void*)0x1234), "b8 34 12 00 00");
CODEGEN_TEST(xLEA_Writeback(rbx), "bb cd cd cd cd", "48 8d 1d cd cd cd 0d"); CODEGEN_TEST(xLEA_Writeback(rbx), "48 8d 1d cd cd cd 0d");
} }
TEST(CodegenTests, PUSHTest) TEST(CodegenTests, PUSHTest)
{ {
CODEGEN_TEST_BOTH(xPUSH(rax), "50"); CODEGEN_TEST(xPUSH(rax), "50");
CODEGEN_TEST_64(xPUSH(r8), "41 50"); CODEGEN_TEST(xPUSH(r8), "41 50");
CODEGEN_TEST_BOTH(xPUSH(0x1234), "68 34 12 00 00"); CODEGEN_TEST(xPUSH(0x1234), "68 34 12 00 00");
CODEGEN_TEST_BOTH(xPUSH(0x12), "6a 12"); CODEGEN_TEST(xPUSH(0x12), "6a 12");
CODEGEN_TEST_BOTH(xPUSH(ptrNative[rax]), "ff 30"); CODEGEN_TEST(xPUSH(ptr64[rax]), "ff 30");
CODEGEN_TEST_64(xPUSH(ptrNative[r8]), "41 ff 30"); CODEGEN_TEST(xPUSH(ptr64[r8]), "41 ff 30");
CODEGEN_TEST_BOTH(xPUSH(ptrNative[rax*2+3+rbx]), "ff 74 43 03"); CODEGEN_TEST(xPUSH(ptr64[rax*2+3+rbx]), "ff 74 43 03");
CODEGEN_TEST_64(xPUSH(ptrNative[rax*2+3+r8]), "41 ff 74 40 03"); CODEGEN_TEST(xPUSH(ptr64[rax*2+3+r8]), "41 ff 74 40 03");
CODEGEN_TEST_64(xPUSH(ptrNative[r9*4+3+r8]), "43 ff 74 88 03"); CODEGEN_TEST(xPUSH(ptr64[r9*4+3+r8]), "43 ff 74 88 03");
CODEGEN_TEST_64(xPUSH(ptrNative[r8*4+3+rax]), "42 ff 74 80 03"); CODEGEN_TEST(xPUSH(ptr64[r8*4+3+rax]), "42 ff 74 80 03");
CODEGEN_TEST_BOTH(xPUSH(ptrNative[rax*8+0x1234+rbx]), "ff b4 c3 34 12 00 00"); CODEGEN_TEST(xPUSH(ptr64[rax*8+0x1234+rbx]), "ff b4 c3 34 12 00 00");
CODEGEN_TEST_64(xPUSH(ptrNative[base]), "ff 35 fa ff ff ff"); CODEGEN_TEST(xPUSH(ptr64[base]), "ff 35 fa ff ff ff");
CODEGEN_TEST(xPUSH(ptrNative[(void*)0x1234]), "ff 35 34 12 00 00", "ff 34 25 34 12 00 00"); CODEGEN_TEST(xPUSH(ptr64[(void*)0x1234]), "ff 34 25 34 12 00 00");
} }
TEST(CodegenTests, POPTest) TEST(CodegenTests, POPTest)
{ {
CODEGEN_TEST_BOTH(xPOP(rax), "58"); CODEGEN_TEST(xPOP(rax), "58");
CODEGEN_TEST_64(xPOP(r8), "41 58"); CODEGEN_TEST(xPOP(r8), "41 58");
CODEGEN_TEST_BOTH(xPOP(ptrNative[rax]), "8f 00"); CODEGEN_TEST(xPOP(ptr64[rax]), "8f 00");
CODEGEN_TEST_64(xPOP(ptrNative[r8]), "41 8f 00"); CODEGEN_TEST(xPOP(ptr64[r8]), "41 8f 00");
CODEGEN_TEST_BOTH(xPOP(ptrNative[rax*2+3+rbx]), "8f 44 43 03"); CODEGEN_TEST(xPOP(ptr64[rax*2+3+rbx]), "8f 44 43 03");
CODEGEN_TEST_64(xPOP(ptrNative[rax*2+3+r8]), "41 8f 44 40 03"); CODEGEN_TEST(xPOP(ptr64[rax*2+3+r8]), "41 8f 44 40 03");
CODEGEN_TEST_64(xPOP(ptrNative[r9*4+3+r8]), "43 8f 44 88 03"); CODEGEN_TEST(xPOP(ptr64[r9*4+3+r8]), "43 8f 44 88 03");
CODEGEN_TEST_64(xPOP(ptrNative[r8*4+3+rax]), "42 8f 44 80 03"); CODEGEN_TEST(xPOP(ptr64[r8*4+3+rax]), "42 8f 44 80 03");
CODEGEN_TEST_BOTH(xPOP(ptrNative[rax*8+0x1234+rbx]), "8f 84 c3 34 12 00 00"); CODEGEN_TEST(xPOP(ptr64[rax*8+0x1234+rbx]), "8f 84 c3 34 12 00 00");
CODEGEN_TEST_64(xPOP(ptrNative[base]), "8f 05 fa ff ff ff"); CODEGEN_TEST(xPOP(ptr64[base]), "8f 05 fa ff ff ff");
CODEGEN_TEST(xPOP(ptrNative[(void*)0x1234]), "8f 05 34 12 00 00", "8f 04 25 34 12 00 00"); CODEGEN_TEST(xPOP(ptr64[(void*)0x1234]), "8f 04 25 34 12 00 00");
} }
TEST(CodegenTests, MathTest) TEST(CodegenTests, MathTest)
{ {
CODEGEN_TEST(xINC(eax), "40", "ff c0"); CODEGEN_TEST(xINC(eax), "ff c0");
CODEGEN_TEST(xDEC(rax), "48", "48 ff c8"); CODEGEN_TEST(xDEC(rax), "48 ff c8");
CODEGEN_TEST_64(xINC(r8), "49 ff c0"); CODEGEN_TEST(xINC(r8), "49 ff c0");
CODEGEN_TEST_64(xADD(r8, r9), "4d 01 c8"); CODEGEN_TEST(xADD(r8, r9), "4d 01 c8");
CODEGEN_TEST_64(xADD(r8, 0x12), "49 83 c0 12"); CODEGEN_TEST(xADD(r8, 0x12), "49 83 c0 12");
CODEGEN_TEST_64(xADD(rax, 0x1234), "48 05 34 12 00 00"); CODEGEN_TEST(xADD(rax, 0x1234), "48 05 34 12 00 00");
CODEGEN_TEST_64(xADD(ptr8[base], 1), "80 05 f9 ff ff ff 01"); CODEGEN_TEST(xADD(ptr8[base], 1), "80 05 f9 ff ff ff 01");
CODEGEN_TEST_64(xADD(ptr32[base], -0x60), "83 05 f9 ff ff ff a0"); CODEGEN_TEST(xADD(ptr32[base], -0x60), "83 05 f9 ff ff ff a0");
CODEGEN_TEST_64(xADD(ptr32[base], 0x1234), "81 05 f6 ff ff ff 34 12 00 00"); CODEGEN_TEST(xADD(ptr32[base], 0x1234), "81 05 f6 ff ff ff 34 12 00 00");
CODEGEN_TEST_BOTH(xADD(eax, ebx), "01 d8"); CODEGEN_TEST(xADD(eax, ebx), "01 d8");
CODEGEN_TEST_BOTH(xADD(eax, 0x1234), "05 34 12 00 00"); CODEGEN_TEST(xADD(eax, 0x1234), "05 34 12 00 00");
CODEGEN_TEST_64(xADD(r8, ptrNative[r10*4+3+r9]), "4f 03 44 91 03"); CODEGEN_TEST(xADD(r8, ptr64[r10*4+3+r9]), "4f 03 44 91 03");
CODEGEN_TEST_64(xADD(ptrNative[r9*4+3+r8], r10), "4f 01 54 88 03"); CODEGEN_TEST(xADD(ptr64[r9*4+3+r8], r10), "4f 01 54 88 03");
CODEGEN_TEST_BOTH(xADD(eax, ptr32[rbx*4+3+rcx]), "03 44 99 03"); CODEGEN_TEST(xADD(eax, ptr32[rbx*4+3+rcx]), "03 44 99 03");
CODEGEN_TEST_BOTH(xADD(ptr32[rax*4+3+rbx], ecx), "01 4c 83 03"); CODEGEN_TEST(xADD(ptr32[rax*4+3+rbx], ecx), "01 4c 83 03");
CODEGEN_TEST_64(xSUB(r8, 0x12), "49 83 e8 12"); CODEGEN_TEST(xSUB(r8, 0x12), "49 83 e8 12");
CODEGEN_TEST_64(xSUB(rax, 0x1234), "48 2d 34 12 00 00"); CODEGEN_TEST(xSUB(rax, 0x1234), "48 2d 34 12 00 00");
CODEGEN_TEST_BOTH(xSUB(eax, ptr32[rcx*4+rax]), "2b 04 88"); CODEGEN_TEST(xSUB(eax, ptr32[rcx*4+rax]), "2b 04 88");
CODEGEN_TEST_64(xMUL(ptr32[base]), "f7 2d fa ff ff ff"); CODEGEN_TEST(xMUL(ptr32[base]), "f7 2d fa ff ff ff");
CODEGEN_TEST(xMUL(ptr32[(void*)0x1234]), "f7 2d 34 12 00 00", "f7 2c 25 34 12 00 00"); CODEGEN_TEST(xMUL(ptr32[(void*)0x1234]), "f7 2c 25 34 12 00 00");
CODEGEN_TEST_BOTH(xDIV(ecx), "f7 f9"); CODEGEN_TEST(xDIV(ecx), "f7 f9");
} }
TEST(CodegenTests, BitwiseTest) TEST(CodegenTests, BitwiseTest)
{ {
CODEGEN_TEST_64(xSHR(r8, cl), "49 d3 e8"); CODEGEN_TEST(xSHR(r8, cl), "49 d3 e8");
CODEGEN_TEST_64(xSHR(rax, cl), "48 d3 e8"); CODEGEN_TEST(xSHR(rax, cl), "48 d3 e8");
CODEGEN_TEST_BOTH(xSHR(ecx, cl), "d3 e9"); CODEGEN_TEST(xSHR(ecx, cl), "d3 e9");
CODEGEN_TEST_64(xSAR(r8, 1), "49 d1 f8"); CODEGEN_TEST(xSAR(r8, 1), "49 d1 f8");
CODEGEN_TEST_64(xSAR(rax, 60), "48 c1 f8 3c"); CODEGEN_TEST(xSAR(rax, 60), "48 c1 f8 3c");
CODEGEN_TEST_BOTH(xSAR(eax, 30), "c1 f8 1e"); CODEGEN_TEST(xSAR(eax, 30), "c1 f8 1e");
CODEGEN_TEST_BOTH(xSHL(ebx, 30), "c1 e3 1e"); CODEGEN_TEST(xSHL(ebx, 30), "c1 e3 1e");
CODEGEN_TEST_64(xSHL(ptr32[base], 4), "c1 25 f9 ff ff ff 04"); CODEGEN_TEST(xSHL(ptr32[base], 4), "c1 25 f9 ff ff ff 04");
CODEGEN_TEST_64(xAND(r8, r9), "4d 21 c8"); CODEGEN_TEST(xAND(r8, r9), "4d 21 c8");
CODEGEN_TEST_64(xXOR(rax, ptrNative[r10]), "49 33 02"); CODEGEN_TEST(xXOR(rax, ptr64[r10]), "49 33 02");
CODEGEN_TEST_BOTH(xOR(esi, ptr32[rax+rbx]), "0b 34 18"); CODEGEN_TEST(xOR(esi, ptr32[rax+rbx]), "0b 34 18");
CODEGEN_TEST_64(xNOT(r8), "49 f7 d0"); CODEGEN_TEST(xNOT(r8), "49 f7 d0");
CODEGEN_TEST_64(xNOT(ptrNative[rax]), "48 f7 10"); CODEGEN_TEST(xNOT(ptr64[rax]), "48 f7 10");
CODEGEN_TEST_BOTH(xNOT(ptr32[rbx]), "f7 13"); CODEGEN_TEST(xNOT(ptr32[rbx]), "f7 13");
} }
TEST(CodegenTests, JmpTest) TEST(CodegenTests, JmpTest)
{ {
CODEGEN_TEST_64(xJMP(r8), "41 ff e0"); CODEGEN_TEST(xJMP(r8), "41 ff e0");
CODEGEN_TEST_BOTH(xJMP(rdi), "ff e7"); CODEGEN_TEST(xJMP(rdi), "ff e7");
CODEGEN_TEST_BOTH(xJMP(ptrNative[rax]), "ff 20"); CODEGEN_TEST(xJMP(ptr64[rax]), "ff 20");
CODEGEN_TEST_BOTH(xJA(base), "77 fe"); CODEGEN_TEST(xJA(base), "77 fe");
CODEGEN_TEST_BOTH(xJB((char*)base - 0xFFFF), "0f 82 fb ff fe ff"); CODEGEN_TEST(xJB((char*)base - 0xFFFF), "0f 82 fb ff fe ff");
} }
TEST(CodegenTests, SSETest) TEST(CodegenTests, SSETest)
{ {
CODEGEN_TEST_BOTH(xMOVAPS(xmm0, xmm1), "0f 28 c1"); CODEGEN_TEST(xMOVAPS(xmm0, xmm1), "0f 28 c1");
CODEGEN_TEST_64(xMOVAPS(xmm8, xmm9), "45 0f 28 c1"); CODEGEN_TEST(xMOVAPS(xmm8, xmm9), "45 0f 28 c1");
CODEGEN_TEST_64(xMOVUPS(xmm8, ptr128[r8+r9]), "47 0f 10 04 08"); CODEGEN_TEST(xMOVUPS(xmm8, ptr128[r8+r9]), "47 0f 10 04 08");
CODEGEN_TEST_64(xMOVAPS(ptr128[rax+r9], xmm8), "46 0f 29 04 08"); CODEGEN_TEST(xMOVAPS(ptr128[rax+r9], xmm8), "46 0f 29 04 08");
CODEGEN_TEST_BOTH(xBLEND.PS(xmm0, xmm1, 0x55), "66 0f 3a 0c c1 55"); CODEGEN_TEST(xBLEND.PS(xmm0, xmm1, 0x55), "66 0f 3a 0c c1 55");
CODEGEN_TEST_64(xBLEND.PD(xmm8, xmm9, 0xaa), "66 45 0f 3a 0d c1 aa"); CODEGEN_TEST(xBLEND.PD(xmm8, xmm9, 0xaa), "66 45 0f 3a 0d c1 aa");
CODEGEN_TEST_64(xEXTRACTPS(ptr32[base], xmm1, 2), "66 0f 3a 17 0d f6 ff ff ff 02"); CODEGEN_TEST(xEXTRACTPS(ptr32[base], xmm1, 2), "66 0f 3a 17 0d f6 ff ff ff 02");
CODEGEN_TEST_64(xMOVD(eax, xmm1), "66 0f 7e c8"); CODEGEN_TEST(xMOVD(eax, xmm1), "66 0f 7e c8");
CODEGEN_TEST_64(xMOVD(eax, xmm10), "66 44 0f 7e d0"); CODEGEN_TEST(xMOVD(eax, xmm10), "66 44 0f 7e d0");
CODEGEN_TEST_64(xMOVD(rax, xmm1), "66 48 0f 7e c8"); CODEGEN_TEST(xMOVD(rax, xmm1), "66 48 0f 7e c8");
CODEGEN_TEST_64(xMOVD(r10, xmm1), "66 49 0f 7e ca"); CODEGEN_TEST(xMOVD(r10, xmm1), "66 49 0f 7e ca");
CODEGEN_TEST_64(xMOVD(rax, xmm10), "66 4c 0f 7e d0"); CODEGEN_TEST(xMOVD(rax, xmm10), "66 4c 0f 7e d0");
CODEGEN_TEST_64(xMOVD(r10, xmm10), "66 4d 0f 7e d2"); CODEGEN_TEST(xMOVD(r10, xmm10), "66 4d 0f 7e d2");
CODEGEN_TEST_64(xPINSR.B(xmm0, eax, 1), "66 0f 3a 20 c0 01"); CODEGEN_TEST(xPINSR.B(xmm0, ebx, 1), "66 0f 3a 20 c3 01");
CODEGEN_TEST_64(xPINSR.W(xmm0, eax, 1), "66 0f c4 c0 01"); CODEGEN_TEST(xPINSR.W(xmm0, ebx, 1), "66 0f c4 c3 01");
CODEGEN_TEST_64(xPINSR.D(xmm0, eax, 1), "66 0f 3a 22 c0 01"); CODEGEN_TEST(xPINSR.D(xmm0, ebx, 1), "66 0f 3a 22 c3 01");
CODEGEN_TEST_64(xPINSR.Q(xmm0, rax, 1), "66 48 0f 3a 22 c0 01"); CODEGEN_TEST(xPINSR.Q(xmm0, rbx, 1), "66 48 0f 3a 22 c3 01");
CODEGEN_TEST_64(xPEXTR.B(eax, xmm0, 1), "66 0f 3a 14 c0 01"); CODEGEN_TEST(xPEXTR.B(ebx, xmm0, 1), "66 0f 3a 14 c3 01");
CODEGEN_TEST_64(xPEXTR.W(eax, xmm0, 1), "66 0f c5 c0 01"); CODEGEN_TEST(xPEXTR.W(ebx, xmm0, 1), "66 0f c5 c3 01");
CODEGEN_TEST_64(xPEXTR.D(eax, xmm0, 1), "66 0f 3a 16 c0 01"); CODEGEN_TEST(xPEXTR.D(ebx, xmm0, 1), "66 0f 3a 16 c3 01");
CODEGEN_TEST_64(xPEXTR.Q(rax, xmm0, 1), "66 48 0f 3a 16 c0 01"); CODEGEN_TEST(xPEXTR.Q(rbx, xmm0, 1), "66 48 0f 3a 16 c3 01");
CODEGEN_TEST(xPEXTR.Q(ptr64[rax], xmm0, 1), "66 48 0f 3a 16 00 01");
} }
TEST(CodegenTests, AVXTest) TEST(CodegenTests, AVXTest)
{ {
CODEGEN_TEST_64(xVMOVAPS(xmm0, xmm1), "c5 f8 28 c1"); CODEGEN_TEST(xVMOVAPS(xmm0, xmm1), "c5 f8 28 c1");
CODEGEN_TEST_64(xVMOVAPS(xmm0, ptr32[rdi]), "c5 f8 28 07"); CODEGEN_TEST(xVMOVAPS(xmm0, ptr32[rdi]), "c5 f8 28 07");
CODEGEN_TEST_64(xVMOVAPS(ptr32[rdi], xmm0), "c5 f8 29 07"); CODEGEN_TEST(xVMOVAPS(ptr32[rdi], xmm0), "c5 f8 29 07");
CODEGEN_TEST_64(xVMOVUPS(xmm0, ptr32[rdi]), "c5 f8 10 07"); CODEGEN_TEST(xVMOVUPS(xmm0, ptr32[rdi]), "c5 f8 10 07");
CODEGEN_TEST_64(xVMOVUPS(ptr32[rdi], xmm0), "c5 f8 11 07"); CODEGEN_TEST(xVMOVUPS(ptr32[rdi], xmm0), "c5 f8 11 07");
CODEGEN_TEST_64(xVADD.PS(xmm0, xmm1, xmm2), "c5 f0 58 c2"); CODEGEN_TEST(xVADD.PS(xmm0, xmm1, xmm2), "c5 f0 58 c2");
CODEGEN_TEST_64(xVADD.PD(xmm0, xmm1, xmm2), "c5 f1 58 c2"); CODEGEN_TEST(xVADD.PD(xmm0, xmm1, xmm2), "c5 f1 58 c2");
CODEGEN_TEST_64(xVADD.SS(xmm0, xmm1, xmm2), "c5 f2 58 c2"); CODEGEN_TEST(xVADD.SS(xmm0, xmm1, xmm2), "c5 f2 58 c2");
CODEGEN_TEST_64(xVADD.SD(xmm0, xmm1, xmm2), "c5 f3 58 c2"); CODEGEN_TEST(xVADD.SD(xmm0, xmm1, xmm2), "c5 f3 58 c2");
CODEGEN_TEST_64(xVSUB.PS(xmm0, xmm1, xmm2), "c5 f0 5c c2"); CODEGEN_TEST(xVSUB.PS(xmm0, xmm1, xmm2), "c5 f0 5c c2");
CODEGEN_TEST_64(xVSUB.PD(xmm0, xmm1, xmm2), "c5 f1 5c c2"); CODEGEN_TEST(xVSUB.PD(xmm0, xmm1, xmm2), "c5 f1 5c c2");
CODEGEN_TEST_64(xVSUB.SS(xmm0, xmm1, xmm2), "c5 f2 5c c2"); CODEGEN_TEST(xVSUB.SS(xmm0, xmm1, xmm2), "c5 f2 5c c2");
CODEGEN_TEST_64(xVSUB.SD(xmm0, xmm1, xmm2), "c5 f3 5c c2"); CODEGEN_TEST(xVSUB.SD(xmm0, xmm1, xmm2), "c5 f3 5c c2");
CODEGEN_TEST_64(xVMUL.PS(xmm0, xmm1, xmm2), "c5 f0 59 c2"); CODEGEN_TEST(xVMUL.PS(xmm0, xmm1, xmm2), "c5 f0 59 c2");
CODEGEN_TEST_64(xVMUL.PD(xmm0, xmm1, xmm2), "c5 f1 59 c2"); CODEGEN_TEST(xVMUL.PD(xmm0, xmm1, xmm2), "c5 f1 59 c2");
CODEGEN_TEST_64(xVMUL.SS(xmm0, xmm1, xmm2), "c5 f2 59 c2"); CODEGEN_TEST(xVMUL.SS(xmm0, xmm1, xmm2), "c5 f2 59 c2");
CODEGEN_TEST_64(xVMUL.SD(xmm0, xmm1, xmm2), "c5 f3 59 c2"); CODEGEN_TEST(xVMUL.SD(xmm0, xmm1, xmm2), "c5 f3 59 c2");
CODEGEN_TEST_64(xVDIV.PS(xmm0, xmm1, xmm2), "c5 f0 5e c2"); CODEGEN_TEST(xVDIV.PS(xmm0, xmm1, xmm2), "c5 f0 5e c2");
CODEGEN_TEST_64(xVDIV.PD(xmm0, xmm1, xmm2), "c5 f1 5e c2"); CODEGEN_TEST(xVDIV.PD(xmm0, xmm1, xmm2), "c5 f1 5e c2");
CODEGEN_TEST_64(xVDIV.SS(xmm0, xmm1, xmm2), "c5 f2 5e c2"); CODEGEN_TEST(xVDIV.SS(xmm0, xmm1, xmm2), "c5 f2 5e c2");
CODEGEN_TEST_64(xVDIV.SD(xmm0, xmm1, xmm2), "c5 f3 5e c2"); CODEGEN_TEST(xVDIV.SD(xmm0, xmm1, xmm2), "c5 f3 5e c2");
// Don't need to test all variants, since they just change the condition immediate. // Don't need to test all variants, since they just change the condition immediate.
CODEGEN_TEST_64(xVCMP.EQ.PS(xmm0, xmm1, xmm2), "c5 f0 c2 c2 00"); CODEGEN_TEST(xVCMP.EQ.PS(xmm0, xmm1, xmm2), "c5 f0 c2 c2 00");
CODEGEN_TEST_64(xVCMP.EQ.PD(xmm0, xmm1, xmm2), "c5 f1 c2 c2 00"); CODEGEN_TEST(xVCMP.EQ.PD(xmm0, xmm1, xmm2), "c5 f1 c2 c2 00");
CODEGEN_TEST_64(xVCMP.EQ.SS(xmm0, xmm1, xmm2), "c5 f2 c2 c2 00"); CODEGEN_TEST(xVCMP.EQ.SS(xmm0, xmm1, xmm2), "c5 f2 c2 c2 00");
CODEGEN_TEST_64(xVCMP.EQ.SD(xmm0, xmm1, xmm2), "c5 f3 c2 c2 00"); CODEGEN_TEST(xVCMP.EQ.SD(xmm0, xmm1, xmm2), "c5 f3 c2 c2 00");
CODEGEN_TEST_64(xVCMP.LE.PS(xmm0, xmm1, xmm2), "c5 f0 c2 c2 02"); CODEGEN_TEST(xVCMP.LE.PS(xmm0, xmm1, xmm2), "c5 f0 c2 c2 02");
CODEGEN_TEST_64(xVCMP.LE.PD(xmm0, xmm1, xmm2), "c5 f1 c2 c2 02"); CODEGEN_TEST(xVCMP.LE.PD(xmm0, xmm1, xmm2), "c5 f1 c2 c2 02");
CODEGEN_TEST_64(xVCMP.LE.SS(xmm0, xmm1, xmm2), "c5 f2 c2 c2 02"); CODEGEN_TEST(xVCMP.LE.SS(xmm0, xmm1, xmm2), "c5 f2 c2 c2 02");
CODEGEN_TEST_64(xVCMP.LE.SD(xmm0, xmm1, xmm2), "c5 f3 c2 c2 02"); CODEGEN_TEST(xVCMP.LE.SD(xmm0, xmm1, xmm2), "c5 f3 c2 c2 02");
CODEGEN_TEST_64(xVPCMP.EQB(xmm0, xmm1, xmm2), "c5 f1 74 c2"); CODEGEN_TEST(xVPCMP.EQB(xmm0, xmm1, xmm2), "c5 f1 74 c2");
CODEGEN_TEST_64(xVPCMP.EQW(xmm0, xmm1, xmm2), "c5 f1 75 c2"); CODEGEN_TEST(xVPCMP.EQW(xmm0, xmm1, xmm2), "c5 f1 75 c2");
CODEGEN_TEST_64(xVPCMP.EQD(xmm0, xmm1, xmm2), "c5 f1 76 c2"); CODEGEN_TEST(xVPCMP.EQD(xmm0, xmm1, xmm2), "c5 f1 76 c2");
CODEGEN_TEST_64(xVPCMP.GTB(xmm0, xmm1, xmm2), "c5 f1 64 c2"); CODEGEN_TEST(xVPCMP.GTB(xmm0, xmm1, xmm2), "c5 f1 64 c2");
CODEGEN_TEST_64(xVPCMP.GTW(xmm0, xmm1, xmm2), "c5 f1 65 c2"); CODEGEN_TEST(xVPCMP.GTW(xmm0, xmm1, xmm2), "c5 f1 65 c2");
CODEGEN_TEST_64(xVPCMP.GTD(xmm0, xmm1, xmm2), "c5 f1 66 c2"); CODEGEN_TEST(xVPCMP.GTD(xmm0, xmm1, xmm2), "c5 f1 66 c2");
CODEGEN_TEST_64(xVPAND(xmm0, xmm1, xmm2), "c5 f1 db c2"); CODEGEN_TEST(xVPAND(xmm0, xmm1, xmm2), "c5 f1 db c2");
CODEGEN_TEST_64(xVPANDN(xmm0, xmm1, xmm2), "c5 f1 df c2"); CODEGEN_TEST(xVPANDN(xmm0, xmm1, xmm2), "c5 f1 df c2");
CODEGEN_TEST_64(xVPOR(xmm0, xmm1, xmm2), "c5 f1 eb c2"); CODEGEN_TEST(xVPOR(xmm0, xmm1, xmm2), "c5 f1 eb c2");
CODEGEN_TEST_64(xVPXOR(xmm0, xmm1, xmm2), "c5 f1 ef c2"); CODEGEN_TEST(xVPXOR(xmm0, xmm1, xmm2), "c5 f1 ef c2");
CODEGEN_TEST_64(xVMOVMSKPS(eax, xmm1), "c5 f8 50 c1"); CODEGEN_TEST(xVMOVMSKPS(eax, xmm1), "c5 f8 50 c1");
CODEGEN_TEST_64(xVMOVMSKPD(eax, xmm1), "c5 f9 50 c1"); CODEGEN_TEST(xVMOVMSKPD(eax, xmm1), "c5 f9 50 c1");
} }
TEST(CodegenTests, AVX256Test) TEST(CodegenTests, AVX256Test)
{ {
CODEGEN_TEST_64(xVMOVAPS(ymm0, ymm1), "c5 fc 28 c1"); CODEGEN_TEST(xVMOVAPS(ymm0, ymm1), "c5 fc 28 c1");
CODEGEN_TEST_64(xVMOVAPS(ymm0, ptr32[rdi]), "c5 fc 28 07"); CODEGEN_TEST(xVMOVAPS(ymm0, ptr32[rdi]), "c5 fc 28 07");
CODEGEN_TEST_64(xVMOVAPS(ptr32[rdi], ymm0), "c5 fc 29 07"); CODEGEN_TEST(xVMOVAPS(ptr32[rdi], ymm0), "c5 fc 29 07");
CODEGEN_TEST_64(xVMOVUPS(ymm0, ptr32[rdi]), "c5 fc 10 07"); CODEGEN_TEST(xVMOVUPS(ymm0, ptr32[rdi]), "c5 fc 10 07");
CODEGEN_TEST_64(xVMOVUPS(ptr32[rdi], ymm0), "c5 fc 11 07"); CODEGEN_TEST(xVMOVUPS(ptr32[rdi], ymm0), "c5 fc 11 07");
CODEGEN_TEST_64(xVZEROUPPER(), "c5 f8 77"); CODEGEN_TEST(xVZEROUPPER(), "c5 f8 77");
CODEGEN_TEST_64(xVADD.PS(ymm0, ymm1, ymm2), "c5 f4 58 c2"); CODEGEN_TEST(xVADD.PS(ymm0, ymm1, ymm2), "c5 f4 58 c2");
CODEGEN_TEST_64(xVADD.PD(ymm0, ymm1, ymm2), "c5 f5 58 c2"); CODEGEN_TEST(xVADD.PD(ymm0, ymm1, ymm2), "c5 f5 58 c2");
CODEGEN_TEST_64(xVSUB.PS(ymm0, ymm1, ymm2), "c5 f4 5c c2"); CODEGEN_TEST(xVSUB.PS(ymm0, ymm1, ymm2), "c5 f4 5c c2");
CODEGEN_TEST_64(xVSUB.PD(ymm0, ymm1, ymm2), "c5 f5 5c c2"); CODEGEN_TEST(xVSUB.PD(ymm0, ymm1, ymm2), "c5 f5 5c c2");
CODEGEN_TEST_64(xVMUL.PS(ymm0, ymm1, ymm2), "c5 f4 59 c2"); CODEGEN_TEST(xVMUL.PS(ymm0, ymm1, ymm2), "c5 f4 59 c2");
CODEGEN_TEST_64(xVMUL.PD(ymm0, ymm1, ymm2), "c5 f5 59 c2"); CODEGEN_TEST(xVMUL.PD(ymm0, ymm1, ymm2), "c5 f5 59 c2");
CODEGEN_TEST_64(xVDIV.PS(ymm0, ymm1, ymm2), "c5 f4 5e c2"); CODEGEN_TEST(xVDIV.PS(ymm0, ymm1, ymm2), "c5 f4 5e c2");
CODEGEN_TEST_64(xVDIV.PD(ymm0, ymm1, ymm2), "c5 f5 5e c2"); CODEGEN_TEST(xVDIV.PD(ymm0, ymm1, ymm2), "c5 f5 5e c2");
CODEGEN_TEST_64(xVCMP.EQ.PS(ymm0, ymm1, ymm2), "c5 f4 c2 c2 00"); CODEGEN_TEST(xVCMP.EQ.PS(ymm0, ymm1, ymm2), "c5 f4 c2 c2 00");
CODEGEN_TEST_64(xVCMP.EQ.PD(ymm0, ymm1, ymm2), "c5 f5 c2 c2 00"); CODEGEN_TEST(xVCMP.EQ.PD(ymm0, ymm1, ymm2), "c5 f5 c2 c2 00");
CODEGEN_TEST_64(xVCMP.LE.PS(ymm0, ymm1, ymm2), "c5 f4 c2 c2 02"); CODEGEN_TEST(xVCMP.LE.PS(ymm0, ymm1, ymm2), "c5 f4 c2 c2 02");
CODEGEN_TEST_64(xVCMP.LE.PD(ymm0, ymm1, ymm2), "c5 f5 c2 c2 02"); CODEGEN_TEST(xVCMP.LE.PD(ymm0, ymm1, ymm2), "c5 f5 c2 c2 02");
CODEGEN_TEST_64(xVPCMP.EQB(ymm0, ymm1, ymm2), "c5 f5 74 c2"); CODEGEN_TEST(xVPCMP.EQB(ymm0, ymm1, ymm2), "c5 f5 74 c2");
CODEGEN_TEST_64(xVPCMP.EQW(ymm0, ymm1, ymm2), "c5 f5 75 c2"); CODEGEN_TEST(xVPCMP.EQW(ymm0, ymm1, ymm2), "c5 f5 75 c2");
CODEGEN_TEST_64(xVPCMP.EQD(ymm0, ymm1, ymm2), "c5 f5 76 c2"); CODEGEN_TEST(xVPCMP.EQD(ymm0, ymm1, ymm2), "c5 f5 76 c2");
CODEGEN_TEST_64(xVPCMP.GTB(ymm0, ymm1, ymm2), "c5 f5 64 c2"); CODEGEN_TEST(xVPCMP.GTB(ymm0, ymm1, ymm2), "c5 f5 64 c2");
CODEGEN_TEST_64(xVPCMP.GTW(ymm0, ymm1, ymm2), "c5 f5 65 c2"); CODEGEN_TEST(xVPCMP.GTW(ymm0, ymm1, ymm2), "c5 f5 65 c2");
CODEGEN_TEST_64(xVPCMP.GTD(ymm0, ymm1, ymm2), "c5 f5 66 c2"); CODEGEN_TEST(xVPCMP.GTD(ymm0, ymm1, ymm2), "c5 f5 66 c2");
CODEGEN_TEST_64(xVPAND(ymm0, ymm1, ymm2), "c5 f5 db c2"); CODEGEN_TEST(xVPAND(ymm0, ymm1, ymm2), "c5 f5 db c2");
CODEGEN_TEST_64(xVPANDN(ymm0, ymm1, ymm2), "c5 f5 df c2"); CODEGEN_TEST(xVPANDN(ymm0, ymm1, ymm2), "c5 f5 df c2");
CODEGEN_TEST_64(xVPOR(ymm0, ymm1, ymm2), "c5 f5 eb c2"); CODEGEN_TEST(xVPOR(ymm0, ymm1, ymm2), "c5 f5 eb c2");
CODEGEN_TEST_64(xVPXOR(ymm0, ymm1, ymm2), "c5 f5 ef c2"); CODEGEN_TEST(xVPXOR(ymm0, ymm1, ymm2), "c5 f5 ef c2");
CODEGEN_TEST_64(xVMOVMSKPS(eax, ymm1), "c5 fc 50 c1"); CODEGEN_TEST(xVMOVMSKPS(eax, ymm1), "c5 fc 50 c1");
CODEGEN_TEST_64(xVMOVMSKPD(eax, ymm1), "c5 fd 50 c1"); CODEGEN_TEST(xVMOVMSKPD(eax, ymm1), "c5 fd 50 c1");
} }
TEST(CodegenTests, Extended8BitTest) TEST(CodegenTests, Extended8BitTest)
{ {
CODEGEN_TEST_64(xSETL(al), "0f 9c c0"); CODEGEN_TEST(xSETL(al), "0f 9c c0");
CODEGEN_TEST_64(xSETL(cl), "0f 9c c1"); CODEGEN_TEST(xSETL(cl), "0f 9c c1");
CODEGEN_TEST_64(xSETL(dl), "0f 9c c2"); CODEGEN_TEST(xSETL(dl), "0f 9c c2");
CODEGEN_TEST_64(xSETL(bl), "0f 9c c3"); CODEGEN_TEST(xSETL(bl), "0f 9c c3");
CODEGEN_TEST_64(xSETL(spl), "40 0f 9c c4"); CODEGEN_TEST(xSETL(spl), "40 0f 9c c4");
CODEGEN_TEST_64(xSETL(bpl), "40 0f 9c c5"); CODEGEN_TEST(xSETL(bpl), "40 0f 9c c5");
CODEGEN_TEST_64(xSETL(sil), "40 0f 9c c6"); CODEGEN_TEST(xSETL(sil), "40 0f 9c c6");
CODEGEN_TEST_64(xSETL(dil), "40 0f 9c c7"); CODEGEN_TEST(xSETL(dil), "40 0f 9c c7");
CODEGEN_TEST_64(xSETL(r8b), "41 0f 9c c0"); CODEGEN_TEST(xSETL(r8b), "41 0f 9c c0");
CODEGEN_TEST_64(xSETL(r9b), "41 0f 9c c1"); CODEGEN_TEST(xSETL(r9b), "41 0f 9c c1");
CODEGEN_TEST_64(xSETL(r10b), "41 0f 9c c2"); CODEGEN_TEST(xSETL(r10b), "41 0f 9c c2");
CODEGEN_TEST_64(xSETL(r11b), "41 0f 9c c3"); CODEGEN_TEST(xSETL(r11b), "41 0f 9c c3");
CODEGEN_TEST_64(xSETL(r12b), "41 0f 9c c4"); CODEGEN_TEST(xSETL(r12b), "41 0f 9c c4");
CODEGEN_TEST_64(xSETL(r13b), "41 0f 9c c5"); CODEGEN_TEST(xSETL(r13b), "41 0f 9c c5");
CODEGEN_TEST_64(xSETL(r14b), "41 0f 9c c6"); CODEGEN_TEST(xSETL(r14b), "41 0f 9c c6");
CODEGEN_TEST_64(xSETL(r15b), "41 0f 9c c7"); CODEGEN_TEST(xSETL(r15b), "41 0f 9c c7");
} }