mirror of https://github.com/PCSX2/pcsx2.git
some cleanup... this file is a mess...
git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@158 a6443dda-0b58-4228-96e9-037be469359c
This commit is contained in:
cottonvibes
Gregory Hainaut
parent
c3f5932904
commit
55879992d8
180
pcsx2/Hw.c
180
pcsx2/Hw.c
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@ -784,20 +784,18 @@ void hwWrite16(u32 mem, u16 value)
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}
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void hwWrite32(u32 mem, u32 value) {
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//int i;
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//IPU regs
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if ((mem>=0x10002000) && (mem<0x10003000)) {
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//psHu32(mem) = value;
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if ((mem>=0x10002000) && (mem<0x10003000)) { //IPU regs
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ipuWrite32(mem,value);
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return;
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}
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if ((mem>=0x10003800) && (mem<0x10003c00)) {
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vif0Write32(mem, value); return;
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vif0Write32(mem, value);
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return;
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}
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if ((mem>=0x10003c00) && (mem<0x10004000)) {
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vif1Write32(mem, value); return;
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vif1Write32(mem, value);
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return;
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}
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switch (mem) {
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@ -822,21 +820,13 @@ void hwWrite32(u32 mem, u32 value) {
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case GIF_CTRL:
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//SysPrintf("GIF_CTRL write %x\n", value);
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psHu32(mem) = value & 0x8;
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if(value & 0x1) {
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gsGIFReset();
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//gsReset();
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}
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else {
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if( value & 8 ) psHu32(GIF_STAT) |= 8;
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else psHu32(GIF_STAT) &= ~8;
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}
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if (value & 0x1) gsGIFReset();
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else if( value & 8 ) psHu32(GIF_STAT) |= 8;
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else psHu32(GIF_STAT) &= ~8;
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return;
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case GIF_MODE:
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// need to set GIF_MODE (hamster ball)
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#ifdef GSPATH3FIX
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//SysPrintf("GIFMODE %x\n", value);
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#endif
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psHu32(GIF_MODE) = value;
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if (value & 0x1) psHu32(GIF_STAT)|= 0x1;
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else psHu32(GIF_STAT)&= ~0x1;
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@ -849,20 +839,14 @@ void hwWrite32(u32 mem, u32 value) {
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return;
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case 0x10008000: // dma0 - vif0
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#ifdef DMA_LOG
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DMA_LOG("VIF0dma %lx\n", value);
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#endif
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DmaExec(VIF0, 0);
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break;
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// Latest Fix for Florin by asadr (VIF1)
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//------------------------------------------------------------------
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case 0x10009000: // dma1 - vif1 - chcr
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#ifdef DMA_LOG
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DMA_LOG("VIF1dma CHCR %lx\n", value);
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#endif
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DmaExec(VIF1, 1);
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break;
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#ifdef HW_LOG
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case 0x10009010: // dma1 - vif1 - madr
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HW_LOG("VIF1dma Madr %lx\n", value);
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psHu32(mem) = value;//dma1 madr
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@ -887,16 +871,11 @@ void hwWrite32(u32 mem, u32 value) {
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HW_LOG("VIF1dma SADR %lx\n", value);
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psHu32(mem) = value;//dma1 sadr
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break;
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#endif
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// ---------------------------------------------------
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//------------------------------------------------------------------
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case 0x1000a000: // dma2 - gif
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#ifdef DMA_LOG
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DMA_LOG("0x%8.8x hwWrite32: GSdma %lx\n", cpuRegs.cycle, value);
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#endif
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DmaExec(GIF, 2);
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break;
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#ifdef HW_LOG
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case 0x1000a010:
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psHu32(mem) = value;//dma2 madr
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HW_LOG("Hardware write DMA2_MADR 32bit at %x with value %x\n",mem,value);
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@ -921,14 +900,12 @@ void hwWrite32(u32 mem, u32 value) {
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psHu32(mem) = value;//dma2 saddr
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HW_LOG("Hardware write DMA2_SADDR 32bit at %x with value %x\n",mem,value);
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break;
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#endif
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//------------------------------------------------------------------
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case 0x1000b000: // dma3 - fromIPU
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#ifdef DMA_LOG
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DMA_LOG("IPU0dma %lx\n", value);
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#endif
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DmaExec(IPU0, 3);
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break;
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#ifdef HW_LOG
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//------------------------------------------------------------------
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case 0x1000b010:
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psHu32(mem) = value;//dma2 madr
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HW_LOG("Hardware write IPU0DMA_MADR 32bit at %x with value %x\n",mem,value);
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@ -945,14 +922,12 @@ void hwWrite32(u32 mem, u32 value) {
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psHu32(mem) = value;//dma2 saddr
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HW_LOG("Hardware write IPU0DMA_SADDR 32bit at %x with value %x\n",mem,value);
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break;
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#endif
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//------------------------------------------------------------------
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case 0x1000b400: // dma4 - toIPU
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#ifdef DMA_LOG
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DMA_LOG("IPU1dma %lx\n", value);
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#endif
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DmaExec(IPU1, 4);
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break;
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#ifdef HW_LOG
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//------------------------------------------------------------------
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case 0x1000b410:
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psHu32(mem) = value;//dma2 madr
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HW_LOG("Hardware write IPU1DMA_MADR 32bit at %x with value %x\n",mem,value);
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@ -969,118 +944,70 @@ void hwWrite32(u32 mem, u32 value) {
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psHu32(mem) = value;//dma2 saddr
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HW_LOG("Hardware write IPU1DMA_SADDR 32bit at %x with value %x\n",mem,value);
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break;
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#endif
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//------------------------------------------------------------------
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case 0x1000c000: // dma5 - sif0
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#ifdef DMA_LOG
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DMA_LOG("SIF0dma %lx\n", value);
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#endif
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// if (value == 0) psxSu32(0x30) = 0x40000;
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//if (value == 0) psxSu32(0x30) = 0x40000;
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DmaExec(SIF0, 5);
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break;
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//------------------------------------------------------------------
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case 0x1000c400: // dma6 - sif1
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#ifdef DMA_LOG
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DMA_LOG("SIF1dma %lx\n", value);
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#endif
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DmaExec(SIF1, 6);
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break;
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#ifdef HW_LOG
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case 0x1000c420: // dma6 - sif1 - qwc
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HW_LOG("SIF1dma QWC = %lx\n", value);
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psHu32(mem) = value;
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break;
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#endif
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#ifdef HW_LOG
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case 0x1000c430: // dma6 - sif1 - tadr
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HW_LOG("SIF1dma TADR = %lx\n", value);
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psHu32(mem) = value;
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break;
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#endif
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//------------------------------------------------------------------
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case 0x1000c800: // dma7 - sif2
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#ifdef DMA_LOG
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DMA_LOG("SIF2dma %lx\n", value);
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#endif
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DmaExec(SIF2, 7);
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break;
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//------------------------------------------------------------------
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case 0x1000d000: // dma8 - fromSPR
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#ifdef DMA_LOG
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DMA_LOG("fromSPRdma %lx\n", value);
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#endif
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DmaExec(SPR0, 8);
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break;
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//------------------------------------------------------------------
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case 0x1000d400: // dma9 - toSPR
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#ifdef DMA_LOG
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DMA_LOG("toSPRdma %lx\n", value);
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#endif
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DmaExec(SPR1, 9);
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break;
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#ifdef HW_LOG
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//------------------------------------------------------------------
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case 0x1000e000: // DMAC_CTRL
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HW_LOG("DMAC_CTRL Write 32bit %x\n", value);
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psHu32(mem) = value;
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break;
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#endif
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case 0x1000e010: // DMAC_STAT
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#ifdef HW_LOG
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HW_LOG("DMAC_STAT Write 32bit %x\n", value);
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#endif
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psHu16(0xe010)&= ~(value & 0xffff); // clear on 1
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/*
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value = value >> 16;
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for (i=0; i<16; i++) { // reverse on 1
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if (value & (1<<i)) {
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if (psHu16(0xe012) & (1<<i)) psHu16(0xe012)&= ~(1<<i);
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else psHu16(0xe012)|= 1<<i;
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}
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}
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*/
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//just XOR it! :p
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psHu16(0xe012) ^= (u16)(value >> 16);
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if ((cpuRegs.CP0.n.Status.val & 0x10807) == 0x10801)
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cpuTestDMACInts();
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break;
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//------------------------------------------------------------------
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case 0x1000f000: // INTC_STAT
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#ifdef HW_LOG
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HW_LOG("INTC_STAT Write 32bit %x\n", value);
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#endif
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psHu32(0xf000)&=~value;
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if ((cpuRegs.CP0.n.Status.val & 0x10407) == 0x10401)
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cpuTestINTCInts();
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break;
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case 0x1000f010: // INTC_MASK
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#ifdef HW_LOG
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HW_LOG("INTC_MASK Write 32bit %x\n", value);
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#endif
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/*
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for (i=0; i<16; i++) { // reverse on 1
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if (value & (1<<i)) {
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if (psHu32(0xf010) & (1<<i)) psHu32(0xf010)&= ~(1<<i);
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else psHu32(0xf010)|= 1<<i;
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}
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}
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*/
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// omg, just xor it
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//psHu32(0xf010) ^= value;
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//drk says its wrong (updates all 32bits instead of 16 only
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//so lets use this and see :) (rama)
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psHu32(0xf010) ^= (u16)value;
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if ((cpuRegs.CP0.n.Status.val & 0x10407) == 0x10401)
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cpuTestINTCInts();
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break;
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//------------------------------------------------------------------
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case 0x1000f430://MCH_RICM: x:4|SA:12|x:5|SDEV:1|SOP:4|SBC:1|SDEV:5
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if ((((value >> 16) & 0xFFF) == 0x21) && (((value >> 6) & 0xF) == 1) && (((psHu32(0xf440) >> 7) & 1) == 0))//INIT & SRP=0
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rdram_sdevid = 0; // if SIO repeater is cleared, reset sdevid
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@ -1090,64 +1017,43 @@ void hwWrite32(u32 mem, u32 value) {
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case 0x1000f440://MCH_DRD:
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psHu32(mem) = value;
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break;
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//------------------------------------------------------------------
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case 0x1000f590: // DMAC_ENABLEW
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#ifdef HW_LOG
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HW_LOG("DMAC_ENABLEW Write 32bit %lx\n", value);
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#endif
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psHu32(0xf590) = value;
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psHu32(0xf520) = value;
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return;
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//------------------------------------------------------------------
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case 0x1000f200:
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psHu32(mem) = value;
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break;
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case 0x1000f220:
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psHu32(mem) |= value;
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break;
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case 0x1000f230:
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psHu32(mem) &= ~value;
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break;
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case 0x1000f240:
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if(!(value & 0x100)) psHu32(mem) &= ~0x100;
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else psHu32(mem) |= 0x100;
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break;
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case 0x1000f260:
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psHu32(mem) = 0;
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break;
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//------------------------------------------------------------------
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case 0x1000f130:
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case 0x1000f410:
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#ifdef PCSX2_DEVBUILD
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HW_LOG("Unknown Hardware write 32 at %x with value %x (%x)\n", mem, value, cpuRegs.CP0.n.Status);
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#endif
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break;
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//------------------------------------------------------------------
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default:
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if ((mem & 0xffffff0f) == 0x1000f200) {
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u32 at = mem & 0xf0;
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switch(at)
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{
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case 0x00:
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psHu32(mem) = value;
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break;
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case 0x20:
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psHu32(mem) |= value;
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break;
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case 0x30:
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psHu32(mem) &= ~value;
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break;
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case 0x40:
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if(!(value & 0x100)) psHu32(mem) &= ~0x100;
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else psHu32(mem) |= 0x100;
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break;
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case 0x60:
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psHu32(mem) = 0;
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break;
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}
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//#ifdef HW_LOG
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// SysPrintf("sif %x Write 32bit %x \n", mem, value);
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//#endif
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// already written in psxMemWrite32
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#ifdef PCSX2_DEVBUILD
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HW_LOG("Unknown Hardware write 32 at %x with value %x (%x)\n", mem, value, cpuRegs.CP0.n.Status);
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#endif
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return;
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}
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#ifndef PCSX2_VIRTUAL_MEM
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if (mem < 0x10010000)
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#endif
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{
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psHu32(mem) = value;
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}
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#ifdef PCSX2_DEVBUILD
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HW_LOG("Unknown Hardware write 32 at %x with value %x (%x)\n", mem, value, cpuRegs.CP0.n.Status);
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#endif
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break;
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}
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}
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