From 555e9ee039ba7821374d988693e91c97afeb8e57 Mon Sep 17 00:00:00 2001
From: "sudonim1@gmail.com"
 <sudonim1@gmail.com@96395faa-99c1-11dd-bbfe-3dabce05a288>
Date: Wed, 8 Jun 2011 20:30:57 +0000
Subject: [PATCH] SPU2-X: Implemented SPU2reset method for handling a PS2
 reset.

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@4721 96395faa-99c1-11dd-bbfe-3dabce05a288
---
 plugins/spu2-x/src/PS2E-spu2.cpp      | 13 +++++++++----
 plugins/spu2-x/src/PS2E-spu2.h        |  1 +
 plugins/spu2-x/src/Windows/Spu2-X.def |  2 ++
 3 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/plugins/spu2-x/src/PS2E-spu2.cpp b/plugins/spu2-x/src/PS2E-spu2.cpp
index c79378c7cc..14765ca102 100644
--- a/plugins/spu2-x/src/PS2E-spu2.cpp
+++ b/plugins/spu2-x/src/PS2E-spu2.cpp
@@ -296,6 +296,14 @@ EXPORT_C_(void) CALLBACK SPU2writeDMA7Mem(u16* pMem, u32 size)
 	Cores[1].DoDMAwrite(pMem,size);
 }
 
+EXPORT_C_(void) SPU2reset()
+{
+	memset(spu2regs, 0, 0x010000);
+	memset(_spu2mem, 0, 0x200000);
+	Cores[0].Init(0);
+	Cores[1].Init(1);
+}
+
 EXPORT_C_(s32) SPU2init()
 {
 	assert( regtable[0x400] == NULL );
@@ -349,10 +357,7 @@ EXPORT_C_(s32) SPU2init()
 		}
 	}
 
-	memset(spu2regs, 0, 0x010000);
-	memset(_spu2mem, 0, 0x200000);
-	Cores[0].Init(0);
-	Cores[1].Init(1);
+	SPU2reset();
 
 	DMALogOpen();
 	InitADSR();
diff --git a/plugins/spu2-x/src/PS2E-spu2.h b/plugins/spu2-x/src/PS2E-spu2.h
index 65ff602751..4516578714 100644
--- a/plugins/spu2-x/src/PS2E-spu2.h
+++ b/plugins/spu2-x/src/PS2E-spu2.h
@@ -34,6 +34,7 @@
 // We have our own versions that have the DLLExport attribute configured:
 
 EXPORT_C_(s32)  SPU2init();
+EXPORT_C_(void) SPU2reset();
 EXPORT_C_(s32)  SPU2open(void *pDsp);
 EXPORT_C_(void) SPU2close();
 EXPORT_C_(void) SPU2shutdown();
diff --git a/plugins/spu2-x/src/Windows/Spu2-X.def b/plugins/spu2-x/src/Windows/Spu2-X.def
index 06c6b64138..4fd35b8e8c 100644
--- a/plugins/spu2-x/src/Windows/Spu2-X.def
+++ b/plugins/spu2-x/src/Windows/Spu2-X.def
@@ -61,3 +61,5 @@ EXPORTS
 	SPU2setDMABaseAddr	@32
 	
 	SPU2replay = s2r_replay	@33
+
+	SPU2reset			@34