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Merge pull request #226 from archshift/stdminmax 

Removed `using std::min/max` from PCH
This commit is contained in:
Pseudonym 2014-08-14 23:12:23 +01:00
parent 05d5f06bb5 fb9c24b900
commit 52fe7a9f2a
34 changed files with 102 additions and 105 deletions
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4
pcsx2/CDVD/InputIsoFile.cpp
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@ -81,7 +81,7 @@ void InputIsoFile::BeginRead2(uint lsn)
{
//m_read_lsn = lsn - (lsn % ReadUnit);
m_read_count = min(ReadUnit, m_blocks - m_read_lsn);
m_read_count = std::min(ReadUnit, m_blocks - m_read_lsn);
}
m_reader->BeginRead(m_readbuffer, m_read_lsn, m_read_count);
@ -127,7 +127,7 @@ int InputIsoFile::FinishRead3(u8* dst, uint mode)
int end1 = m_blockofs + m_blocksize;
int end2 = _offset + length;
int end = min(end1, end2);
int end = std::min(end1, end2);
int diff = m_blockofs - _offset;
int ndiff = 0;

2
pcsx2/Elfheader.cpp
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@ -376,7 +376,7 @@ void ElfObject::loadSectionHeaders()
// used by parseCommandLine
//if ( secthead[i].sh_flags & 0x2 )
// args_ptr = min( args_ptr, secthead[ i ].sh_addr & 0x1ffffff );
// args_ptr = std::min( args_ptr, secthead[ i ].sh_addr & 0x1ffffff );
ELF_LOG("\n");

4
pcsx2/FPU.cpp
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@ -269,7 +269,7 @@ void MADDA_S() {
}
void MAX_S() {
_FdValf_ = max( _FsValf_, _FtValf_ );
_FdValf_ = std::max( _FsValf_, _FtValf_ );
clearFPUFlags( FPUflagO | FPUflagU );
}
@ -279,7 +279,7 @@ void MFC1() {
}
void MIN_S() {
_FdValf_ = min( _FsValf_, _FtValf_ );
_FdValf_ = std::min( _FsValf_, _FtValf_ );
clearFPUFlags( FPUflagO | FPUflagU );
}

2
pcsx2/FiFo.cpp
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@ -60,7 +60,7 @@ void __fastcall ReadFIFO_VIF1(mem128_t* out)
GUNIT_LOG("ReadFIFO_VIF1");
if (vif1.GSLastDownloadSize <= 16)
gifRegs.stat.OPH = false;
vif1Regs.stat.FQC = min((u32)16, vif1.GSLastDownloadSize);
vif1Regs.stat.FQC = std::min((u32)16, vif1.GSLastDownloadSize);
}
}

10
pcsx2/Gif.cpp
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@ -232,7 +232,7 @@ void GIFdma()
if (ptag == NULL) return;
//DevCon.Warning("GIF Reading Tag MSK = %x", vif1Regs.mskpath3);
GIF_LOG("gifdmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx tadr=%lx", ptag[1]._u32, ptag[0]._u32, gifch.qwc, ptag->ID, gifch.madr, gifch.tadr);
gifRegs.stat.FQC = min((u16)0x10, gifch.qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // APATH=3]
gifRegs.stat.FQC = std::min((u16)0x10, gifch.qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // APATH=3]
if (dmacRegs.ctrl.STD == STD_GIF)
{
// there are still bugs, need to also check if gifch.madr +16*qwc >= stadr, if not, stall
@ -259,7 +259,7 @@ void GIFdma()
}
clearFIFOstuff(true);
gifRegs.stat.FQC = min((u16)0x10, gifch.qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // APATH=3]
gifRegs.stat.FQC = std::min((u16)0x10, gifch.qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // APATH=3]
#if USE_OLD_GIF == 1 // ...
if (vif1Regs.mskpath3 || gifRegs.mode.M3R) {
@ -276,7 +276,7 @@ void GIFdma()
// Transfer Dn_QWC from Dn_MADR to GIF
if (gifch.qwc > 0) // Normal Mode
{
gifRegs.stat.FQC = min((u16)0x10, gifch.qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // APATH=3]
gifRegs.stat.FQC = std::min((u16)0x10, gifch.qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // APATH=3]
if (CheckPaths(DMAC_GIF) == false) return;
@ -287,7 +287,7 @@ void GIFdma()
prevcycles = 0;
CPU_INT(DMAC_GIF, gscycles);
gifRegs.stat.FQC = min((u16)0x10, gifch.qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // OPH=1 | APATH=3]
gifRegs.stat.FQC = std::min((u16)0x10, gifch.qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // OPH=1 | APATH=3]
}
void dmaGIF()
@ -338,7 +338,7 @@ static u16 QWCinGIFMFIFO(u32 DrainADDR)
static __fi bool mfifoGIFrbTransfer()
{
u16 mfifoqwc = min(QWCinGIFMFIFO(gifch.madr), gifch.qwc);
u16 mfifoqwc = std::min(QWCinGIFMFIFO(gifch.madr), gifch.qwc);
if (mfifoqwc == 0) return true; //Lets skip all this, we don't have the data
if(!gifUnit.CanDoPath3()) {

2
pcsx2/HwRead.cpp
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@ -97,7 +97,7 @@ mem32_t __fastcall _hwRead32(u32 mem)
if ((mem & 0x1000ff00) == 0x1000f300)
{
int ret = 0;
u32 sif2fifosize = min(sif2.fifo.size, 7);
u32 sif2fifosize = std::min(sif2.fifo.size, 7);
switch (mem & 0xf0)
{

4
pcsx2/IPU/IPU_Fifo.cpp
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@ -67,7 +67,7 @@ wxString IPU_Fifo_Output::desc() const
int IPU_Fifo_Input::write(u32* pMem, int size)
{
int transsize;
int firsttrans = min(size, 8 - (int)g_BP.IFC);
int firsttrans = std::min(size, 8 - (int)g_BP.IFC);
g_BP.IFC += firsttrans;
transsize = firsttrans;
@ -112,7 +112,7 @@ int IPU_Fifo_Output::write(const u32 *value, uint size)
/*do {*/
//IPU0dma();
uint transsize = min(size, 8 - (uint)ipuRegs.ctrl.OFC);
uint transsize = std::min(size, 8 - (uint)ipuRegs.ctrl.OFC);
if(!transsize) return 0;
ipuRegs.ctrl.OFC += transsize;

2
pcsx2/IPU/IPUdma.cpp
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@ -219,7 +219,7 @@ void IPU0dma()
pMem = dmaGetAddr(ipu0ch.madr, true);
readsize = min(ipu0ch.qwc, (u16)ipuRegs.ctrl.OFC);
readsize = std::min(ipu0ch.qwc, (u16)ipuRegs.ctrl.OFC);
ipu_fifo.out.read(pMem, readsize);
ipu0ch.madr += readsize << 4;

8
pcsx2/IPU/yuv2rgb.cpp
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@ -45,15 +45,15 @@ void yuv2rgb_reference(void)
for (int y = 0; y < 16; y++)
for (int x = 0; x < 16; x++)
{
s32 lum = (IPU_Y_COEFF * (max(0, (s32)mb8.Y[y][x] - IPU_Y_BIAS))) >> 6;
s32 lum = (IPU_Y_COEFF * (std::max(0, (s32)mb8.Y[y][x] - IPU_Y_BIAS))) >> 6;
s32 rcr = (IPU_RCR_COEFF * ((s32)mb8.Cr[y>>1][x>>1] - 128)) >> 6;
s32 gcr = (IPU_GCR_COEFF * ((s32)mb8.Cr[y>>1][x>>1] - 128)) >> 6;
s32 gcb = (IPU_GCB_COEFF * ((s32)mb8.Cb[y>>1][x>>1] - 128)) >> 6;
s32 bcb = (IPU_BCB_COEFF * ((s32)mb8.Cb[y>>1][x>>1] - 128)) >> 6;
rgb32.c[y][x].r = max(0, min(255, (lum + rcr + 1) >> 1));
rgb32.c[y][x].g = max(0, min(255, (lum + gcr + gcb + 1) >> 1));
rgb32.c[y][x].b = max(0, min(255, (lum + bcb + 1) >> 1));
rgb32.c[y][x].r = std::max(0, std::min(255, (lum + rcr + 1) >> 1));
rgb32.c[y][x].g = std::max(0, std::min(255, (lum + gcr + gcb + 1) >> 1));
rgb32.c[y][x].b = std::max(0, std::min(255, (lum + bcb + 1) >> 1));
rgb32.c[y][x].a = 0x80; // the norm to save doing this on the alpha pass
}
}

4
pcsx2/MultipartFileReader.cpp
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@ -167,7 +167,7 @@ void MultipartFileReader::BeginRead(void* pBuffer, uint sector, uint count)
for(uint i = GetFirstPart(sector); i < m_numparts; i++)
{
uint num = min(count, m_parts[i].end - sector);
uint num = std::min(count, m_parts[i].end - sector);
m_parts[i].reader->BeginRead(lBuffer, sector - m_parts[i].start, num);
m_parts[i].isReading = true;
@ -188,7 +188,7 @@ int MultipartFileReader::FinishRead(void)
{
if(m_parts[i].isReading)
{
ret = min(ret, m_parts[i].reader->FinishRead());
ret = std::min(ret, m_parts[i].reader->FinishRead());
m_parts[i].isReading = false;
if(ret < 0)

3
pcsx2/PrecompiledHeader.h
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@ -53,9 +53,6 @@
#include <sys/stat.h>
#include <pthread.h>
using std::min;
using std::max;
// As plugins which use C have to be used with PCSX2, the BOOL type is redefined
// to prevent any C/C++ compatibility issues.

4
pcsx2/Sif.h
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@ -50,7 +50,7 @@ struct sifFifo
{
if (words > 0)
{
const int wP0 = min((FIFO_SIF_W - writePos), words);
const int wP0 = std::min((FIFO_SIF_W - writePos), words);
const int wP1 = words - wP0;
memcpy_fast(&data[writePos], from, wP0 << 2);
@ -66,7 +66,7 @@ struct sifFifo
{
if (words > 0)
{
const int wP0 = min((FIFO_SIF_W - readPos), words);
const int wP0 = std::min((FIFO_SIF_W - readPos), words);
const int wP1 = words - wP0;
memcpy_fast(to, &data[readPos], wP0 << 2);

4
pcsx2/Sif0.cpp
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@ -35,7 +35,7 @@ static __fi void Sif0Init()
// Write from Fifo to EE.
static __fi bool WriteFifoToEE()
{
const int readSize = min((s32)sif0ch.qwc, sif0.fifo.size >> 2);
const int readSize = std::min((s32)sif0ch.qwc, sif0.fifo.size >> 2);
tDMA_TAG *ptag;
@ -65,7 +65,7 @@ static __fi bool WriteFifoToEE()
static __fi bool WriteIOPtoFifo()
{
// There's some data ready to transfer into the fifo..
const int writeSize = min(sif0.iop.counter, sif0.fifo.sif_free());
const int writeSize = std::min(sif0.iop.counter, sif0.fifo.sif_free());
SIF_LOG("Write IOP to Fifo: +++++++++++ %lX of %lX", writeSize, sif0.iop.counter);

8
pcsx2/Sif1.cpp
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@ -38,7 +38,7 @@ static __fi bool WriteEEtoFifo()
// There's some data ready to transfer into the fifo..
SIF_LOG("Sif 1: Write EE to Fifo");
const int writeSize = min((s32)sif1ch.qwc, sif1.fifo.sif_free() >> 2);
const int writeSize = std::min((s32)sif1ch.qwc, sif1.fifo.sif_free() >> 2);
tDMA_TAG *ptag;
@ -65,7 +65,7 @@ static __fi bool WriteFifoToIOP()
// If we're reading something, continue to do so.
SIF_LOG("Sif1: Write Fifo to IOP");
const int readSize = min (sif1.iop.counter, sif1.fifo.size);
const int readSize = std::min(sif1.iop.counter, sif1.fifo.size);
SIF_LOG("Sif 1 IOP doing transfer %04X to %08X", readSize, HW_DMA10_MADR);
@ -148,7 +148,7 @@ static __fi void EndEE()
}
CPU_INT(DMAC_SIF1, /*min((int)(*/sif1.ee.cycles*BIAS/*), 384)*/);
CPU_INT(DMAC_SIF1, /*std::min((int)(*/sif1.ee.cycles*BIAS/*), 384)*/);
}
// Stop processing IOP, and signal an interrupt.
@ -169,7 +169,7 @@ static __fi void EndIOP()
sif1.iop.cycles = 1;
}
// iop is 1/8th the clock rate of the EE and psxcycles is in words (not quadwords)
PSX_INT(IopEvt_SIF1, /*min((*/sif1.iop.cycles/* * 26*//*), 1024)*/);
PSX_INT(IopEvt_SIF1, /*std::min((*/sif1.iop.cycles/* * 26*//*), 1024)*/);
}
// Handle the EE transfer.

2
pcsx2/Sio.cpp
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@ -132,7 +132,7 @@ SIO_WRITE sioWriteStart(u8 data)
// On mismatch, sio2.cmdlength (size1) is smaller than what it should (Persona 3)
// while size2 is the proper length. -KrossX
sio.bufSize = size2; //max(size1, size2);
sio.bufSize = size2; //std::max(size1, size2);
if(sio.bufSize)
sio.bufSize--;

4
pcsx2/Vif.cpp
View File

@ -172,7 +172,7 @@ __fi void vif1FBRST(u32 value) {
vif1.MaskRow._u64[0] = SaveRow._u64[0];
vif1.MaskRow._u64[1] = SaveRow._u64[1];
cpuRegs.interrupt &= ~((1 << 1) | (1 << 10)); //Stop all vif1 DMA's
///vif1ch.qwc -= min((int)vif1ch.qwc, 16); //not sure if the dma should stop, FFWDing could be tricky
///vif1ch.qwc -= std::min((int)vif1ch.qwc, 16); //not sure if the dma should stop, FFWDing could be tricky
vif1ch.qwc = 0;
psHu64(VIF1_FIFO) = 0;
@ -318,7 +318,7 @@ __fi void vif1STAT(u32 value) {
// As far as the GS is concerned, the transfer starts as soon as TRXDIR is accessed, which is why fatal frame
// was expecting data, the GS should already be sending it over (buffering in the FIFO)
vif1Regs.stat.FQC = min((u32)16, vif1.GSLastDownloadSize);
vif1Regs.stat.FQC = std::min((u32)16, vif1.GSLastDownloadSize);
//Console.Warning("Reversing VIF Transfer for %x QWC", vif1.GSLastDownloadSize);
}

12
pcsx2/Vif0_Dma.cpp
View File

@ -163,7 +163,7 @@ __fi void vif0Interrupt()
g_vif0Cycles = 0;
vif0Regs.stat.FQC = min(vif0ch.qwc, (u16)8);
vif0Regs.stat.FQC = std::min(vif0ch.qwc, (u16)8);
if (!(vif0ch.chcr.STR)) Console.WriteLn("vif0 running when CHCR == %x", vif0ch.chcr._u32);
@ -185,7 +185,7 @@ __fi void vif0Interrupt()
// One game doesn't like vif stalling at end, can't remember what. Spiderman isn't keen on it tho
//vif0ch.chcr.STR = false;
vif0Regs.stat.FQC = min((u16)0x8, vif0ch.qwc);
vif0Regs.stat.FQC = std::min((u16)0x8, vif0ch.qwc);
if(vif0ch.qwc > 0 || !vif0.done)
{
VIF_LOG("VIF0 Stalled");
@ -216,7 +216,7 @@ __fi void vif0Interrupt()
if (vif0.inprogress & 0x1)
{
_VIF0chain();
vif0Regs.stat.FQC = min(vif0ch.qwc, (u16)8);
vif0Regs.stat.FQC = std::min(vif0ch.qwc, (u16)8);
CPU_INT(DMAC_VIF0, g_vif0Cycles);
return;
}
@ -231,7 +231,7 @@ __fi void vif0Interrupt()
}
if ((vif0.inprogress & 0x1) == 0) vif0SetupTransfer();
vif0Regs.stat.FQC = min(vif0ch.qwc, (u16)8);
vif0Regs.stat.FQC = std::min(vif0ch.qwc, (u16)8);
CPU_INT(DMAC_VIF0, g_vif0Cycles);
return;
}
@ -248,7 +248,7 @@ __fi void vif0Interrupt()
#endif
vif0ch.chcr.STR = false;
vif0Regs.stat.FQC = min((u16)0x8, vif0ch.qwc);
vif0Regs.stat.FQC = std::min((u16)0x8, vif0ch.qwc);
vif0.vifstalled.enabled = false;
vif0.irqoffset.enabled = false;
if(vif0.queued_program == true) vifExecQueue(0);
@ -300,7 +300,7 @@ void dmaVIF0()
vif0.inprogress &= ~0x1;
}
vif0Regs.stat.FQC = min((u16)0x8, vif0ch.qwc);
vif0Regs.stat.FQC = std::min((u16)0x8, vif0ch.qwc);
//Using a delay as Beyond Good and Evil does the DMA twice with 2 different TADR's (no checks in the middle, all one block of code),
//the first bit it sends isnt required for it to work.

18
pcsx2/Vif1_Dma.cpp
View File

@ -53,7 +53,7 @@ void vif1TransferToMemory()
// stuff from the GS. The *only* way to handle this case safely is to flush the GS
// completely and execute the transfer there-after.
//Console.Warning("Real QWC %x", vif1ch.qwc);
const u32 size = min(vif1.GSLastDownloadSize, (u32)vif1ch.qwc);
const u32 size = std::min(vif1.GSLastDownloadSize, (u32)vif1ch.qwc);
const u128* pMemEnd = vif1.GSLastDownloadSize + pMem;
if (size) {
@ -88,7 +88,7 @@ void vif1TransferToMemory()
vif1ch.madr += vif1ch.qwc * 16; // mgs3 scene changes
if (vif1.GSLastDownloadSize >= vif1ch.qwc) {
vif1.GSLastDownloadSize -= vif1ch.qwc;
vif1Regs.stat.FQC = min((u32)16, vif1.GSLastDownloadSize);
vif1Regs.stat.FQC = std::min((u32)16, vif1.GSLastDownloadSize);
}
else {
vif1Regs.stat.FQC = 0;
@ -281,7 +281,7 @@ __fi void vif1Interrupt()
//Console.WriteLn("VIFMFIFO\n");
// Test changed because the Final Fantasy 12 opening somehow has the tag in *Undefined* mode, which is not in the documentation that I saw.
if (vif1ch.chcr.MOD == NORMAL_MODE) Console.WriteLn("MFIFO mode is normal (which isn't normal here)! %x", vif1ch.chcr._u32);
vif1Regs.stat.FQC = min((u16)0x10, vif1ch.qwc);
vif1Regs.stat.FQC = std::min((u16)0x10, vif1ch.qwc);
vifMFIFOInterrupt();
return;
}
@ -299,7 +299,7 @@ __fi void vif1Interrupt()
return;
}
vif1Regs.stat.VGW = 0; //Path 3 isn't busy so we don't need to wait for it.
vif1Regs.stat.FQC = min(vif1ch.qwc, (u16)16);
vif1Regs.stat.FQC = std::min(vif1ch.qwc, (u16)16);
//Simulated GS transfer time done, clear the flags
}
@ -330,7 +330,7 @@ __fi void vif1Interrupt()
//NFSHPS stalls when the whole packet has gone across (it stalls in the last 32bit cmd)
//In this case VIF will end
vif1Regs.stat.FQC = min((u16)0x10, vif1ch.qwc);
vif1Regs.stat.FQC = std::min((u16)0x10, vif1ch.qwc);
if((vif1ch.qwc > 0 || !vif1.done) && !CHECK_VIF1STALLHACK)
{
VIF_LOG("VIF1 Stalled");
@ -356,7 +356,7 @@ __fi void vif1Interrupt()
_VIF1chain();
// VIF_NORMAL_FROM_MEM_MODE is a very slow operation.
// Timesplitters 2 depends on this beeing a bit higher than 128.
if (vif1ch.chcr.DIR) vif1Regs.stat.FQC = min(vif1ch.qwc, (u16)16);
if (vif1ch.chcr.DIR) vif1Regs.stat.FQC = std::min(vif1ch.qwc, (u16)16);
if(!(vif1Regs.stat.VGW && gifUnit.gifPath[GIF_PATH_3].state != GIF_PATH_IDLE)) //If we're waiting on GIF, stop looping, (can be over 1000 loops!)
CPU_INT(DMAC_VIF1, g_vif1Cycles);
@ -373,7 +373,7 @@ __fi void vif1Interrupt()
}
if ((vif1.inprogress & 0x1) == 0) vif1SetupTransfer();
if (vif1ch.chcr.DIR) vif1Regs.stat.FQC = min(vif1ch.qwc, (u16)16);
if (vif1ch.chcr.DIR) vif1Regs.stat.FQC = std::min(vif1ch.qwc, (u16)16);
if(!(vif1Regs.stat.VGW && gifUnit.gifPath[GIF_PATH_3].state != GIF_PATH_IDLE)) //If we're waiting on GIF, stop looping, (can be over 1000 loops!)
CPU_INT(DMAC_VIF1, g_vif1Cycles);
@ -397,7 +397,7 @@ __fi void vif1Interrupt()
gifRegs.stat.OPH = false;
}
if (vif1ch.chcr.DIR) vif1Regs.stat.FQC = min(vif1ch.qwc, (u16)16);
if (vif1ch.chcr.DIR) vif1Regs.stat.FQC = std::min(vif1ch.qwc, (u16)16);
vif1ch.chcr.STR = false;
vif1.vifstalled.enabled = false;
@ -467,7 +467,7 @@ void dmaVIF1()
vif1.inprogress &= ~0x1;
}
if (vif1ch.chcr.DIR) vif1Regs.stat.FQC = min((u16)0x10, vif1ch.qwc);
if (vif1ch.chcr.DIR) vif1Regs.stat.FQC = std::min((u16)0x10, vif1ch.qwc);
// Chain Mode
CPU_INT(DMAC_VIF1, 4);

10
pcsx2/Vif1_MFIFO.cpp
View File

@ -53,7 +53,7 @@ static __fi bool mfifoVIF1rbTransfer()
{
u32 maddr = dmacRegs.rbor.ADDR;
u32 msize = dmacRegs.rbor.ADDR + dmacRegs.rbsr.RMSK + 16;
u16 mfifoqwc = min(QWCinVIFMFIFO(vif1ch.madr), vif1ch.qwc);
u16 mfifoqwc = std::min(QWCinVIFMFIFO(vif1ch.madr), vif1ch.qwc);
u32 *src;
bool ret;
@ -332,7 +332,7 @@ void vifMFIFOInterrupt()
if (vif1Regs.stat.test(VIF1_STAT_VSS | VIF1_STAT_VIS | VIF1_STAT_VFS)) {
//vif1Regs.stat.FQC = 0; // FQC=0
//vif1ch.chcr.STR = false;
vif1Regs.stat.FQC = min((u16)0x10, vif1ch.qwc);
vif1Regs.stat.FQC = std::min((u16)0x10, vif1ch.qwc);
if((vif1ch.qwc > 0 || !vif1.done) && !(vif1.inprogress & 0x10)) {
VIF_LOG("VIF1 MFIFO Stalled");
return;
@ -365,7 +365,7 @@ void vifMFIFOInterrupt()
}
mfifoVIF1transfer(0);
vif1Regs.stat.FQC = min((u16)0x10, vif1ch.qwc);
vif1Regs.stat.FQC = std::min((u16)0x10, vif1ch.qwc);
case 1: //Transfer data
if(vif1.inprogress & 0x1) //Just in case the tag breaks early (or something wierd happens)!
@ -374,7 +374,7 @@ void vifMFIFOInterrupt()
if(!(vif1Regs.stat.VGW && gifUnit.gifPath[GIF_PATH_3].state != GIF_PATH_IDLE)) //If we're waiting on GIF, stop looping, (can be over 1000 loops!)
CPU_INT(DMAC_MFIFO_VIF, (g_vif1Cycles == 0 ? 4 : g_vif1Cycles) );
vif1Regs.stat.FQC = min((u16)0x10, vif1ch.qwc);
vif1Regs.stat.FQC = std::min((u16)0x10, vif1ch.qwc);
return;
}
return;
@ -384,7 +384,7 @@ void vifMFIFOInterrupt()
vif1.irqoffset.enabled = false;
vif1.done = 1;
g_vif1Cycles = 0;
vif1Regs.stat.FQC = min((u16)0x10, vif1ch.qwc);
vif1Regs.stat.FQC = std::min((u16)0x10, vif1ch.qwc);
vif1ch.chcr.STR = false;
hwDmacIrq(DMAC_VIF1);
DMA_LOG("VIF1 MFIFO DMA End");

2
pcsx2/Vif_Codes.cpp
View File

@ -503,7 +503,7 @@ vifOp(vifCode_Offset) {
template<int idx> static __fi int _vifCode_STColRow(const u32* data, u32* pmem2) {
vifStruct& vifX = GetVifX;
int ret = min(4 - vifX.tag.addr, vifX.vifpacketsize);
int ret = std::min(4 - vifX.tag.addr, vifX.vifpacketsize);
pxAssume(vifX.tag.addr < 4);
pxAssume(ret > 0);

4
pcsx2/Vif_Transfer.cpp
View File

@ -75,8 +75,8 @@ _vifT static __fi bool vifTransfer(u32 *data, int size, bool TTE) {
//Make this a minimum of 1 cycle so if it's the end of the packet it doesnt just fall through.
//Metal Saga can do this, just to be safe :)
if (!idx) g_vif0Cycles += max(1, (int)((transferred * BIAS) >> 2));
else g_vif1Cycles += max(1, (int)((transferred * BIAS) >> 2));
if (!idx) g_vif0Cycles += std::max(1, (int)((transferred * BIAS) >> 2));
else g_vif1Cycles += std::max(1, (int)((transferred * BIAS) >> 2));
vifX.irqoffset.value = transferred % 4; // cannot lose the offset

2
pcsx2/Vif_Unpack.cpp
View File

@ -64,7 +64,7 @@ static __ri void writeXYZW(u32 offnum, u32 &dest, u32 data) {
}
break;
case 1: dest = vif.MaskRow._u32[offnum]; break;
case 2: dest = vif.MaskCol._u32[min(vif.cl,3)]; break;
case 2: dest = vif.MaskCol._u32[std::min(vif.cl,3)]; break;
case 3: break;
}
}

8
pcsx2/gui/Debugger/CtrlDisassemblyView.cpp
View File

@ -276,9 +276,9 @@ wxColor scaleColor(wxColor color, float factor)
unsigned char b = color.Blue();
unsigned char a = color.Alpha();
r = min(255,max((int)(r*factor),0));
g = min(255,max((int)(g*factor),0));
b = min(255,max((int)(b*factor),0));
r = std::min(255,std::max((int)(r*factor),0));
g = std::min(255,std::max((int)(g*factor),0));
b = std::min(255,std::max((int)(b*factor),0));
return wxColor(r,g,b,a);
}
@ -534,7 +534,7 @@ void CtrlDisassemblyView::render(wxDC& dc)
{
if (enabled)
textColor = 0x0000FF;
int yOffset = max(-1,(rowHeight-14+1)/2);
int yOffset = std::max(-1,(rowHeight-14+1)/2);
dc.DrawIcon(enabled ? bpEnabled : bpDisabled,2,rowY1+1+yOffset);
}

4
pcsx2/gui/FrameForGS.cpp
View File

@ -167,7 +167,7 @@ void GSPanel::DoResize()
float zoom = g_Conf->GSWindow.Zoom.ToFloat()/100.0;
if( zoom == 0 )//auto zoom in untill black-bars are gone (while keeping the aspect ratio).
zoom = max( (float)arr, (float)(1.0/arr) );
zoom = std::max( (float)arr, (float)(1.0/arr) );
viewport.Scale(zoom, zoom*g_Conf->GSWindow.StretchY.ToFloat()/100.0 );
SetSize( viewport );
@ -175,7 +175,7 @@ void GSPanel::DoResize()
int cx, cy;
GetPosition(&cx, &cy);
float unit = .01*(float)min(viewport.x, viewport.y);
float unit = .01*(float)std::min(viewport.x, viewport.y);
SetPosition( wxPoint( cx + unit*g_Conf->GSWindow.OffsetX.ToFloat(), cy + unit*g_Conf->GSWindow.OffsetY.ToFloat() ) );
#ifdef GSWindowScaleDebug
Console.WriteLn(Color_Yellow, "GSWindowScaleDebug: zoom %f, viewport.x %d, viewport.y %d", zoom, viewport.GetX(), viewport.GetY());

4
pcsx2/sif2.cpp
View File

@ -61,7 +61,7 @@ __fi bool ReadFifoSingleWord()
// Write from Fifo to EE.
static __fi bool WriteFifoToEE()
{
const int readSize = min((s32)sif2dma.qwc, sif2.fifo.size >> 2);
const int readSize = std::min((s32)sif2dma.qwc, sif2.fifo.size >> 2);
tDMA_TAG *ptag;
@ -91,7 +91,7 @@ static __fi bool WriteFifoToEE()
static __fi bool WriteIOPtoFifo()
{
// There's some data ready to transfer into the fifo..
const int writeSize = min(sif2.iop.counter, sif2.fifo.sif_free());
const int writeSize = std::min(sif2.iop.counter, sif2.fifo.sif_free());
SIF_LOG("Write IOP to Fifo: +++++++++++ %lX of %lX", writeSize, sif2.iop.counter);

2
pcsx2/windows/VCprojects/IopSif.cpp
View File

@ -100,7 +100,7 @@ s32 DoSifRead(u32 iopAvailable)
{
u32 eeAvailable = PrepareEERead();
u32 transferSizeBytes = min(min(iopAvailable,eeAvailable),fifoSize);
u32 transferSizeBytes = std::min(std::min(iopAvailable,eeAvailable),fifoSize);
u32 transferSizeWords = transferSizeBytes >> 2;
u32 transferSizeQWords = transferSizeBytes >> 4;

6
pcsx2/x86/iR3000A.cpp
View File

@ -933,7 +933,7 @@ static __fi u32 psxRecClearMem(u32 pc)
if (pexblock->startpc + pexblock->size * 4 <= lowerextent)
break;
lowerextent = min(lowerextent, pexblock->startpc);
lowerextent = std::min(lowerextent, pexblock->startpc);
blockidx--;
}
@ -943,8 +943,8 @@ static __fi u32 psxRecClearMem(u32 pc)
if (pexblock->startpc >= upperextent)
break;
lowerextent = min(lowerextent, pexblock->startpc);
upperextent = max(upperextent, pexblock->startpc + pexblock->size * 4);
lowerextent = std::min(lowerextent, pexblock->startpc);
upperextent = std::max(upperextent, pexblock->startpc + pexblock->size * 4);
blockidx++;
}

8
pcsx2/x86/ix86-32/iR5900-32.cpp
View File

@ -901,12 +901,12 @@ void recClear(u32 addr, u32 size)
}
if (blockend <= addr) {
lowerextent = max(lowerextent, blockend);
lowerextent = std::max(lowerextent, blockend);
break;
}
lowerextent = min(lowerextent, blockstart);
upperextent = max(upperextent, blockend);
lowerextent = std::min(lowerextent, blockstart);
upperextent = std::max(upperextent, blockend);
// This might end up inside a block that doesn't contain the clearing range,
// so set it to recompile now. This will become JITCompile if we clear it.
pblock->SetFnptr((uptr)JITCompileInBlock);
@ -918,7 +918,7 @@ void recClear(u32 addr, u32 size)
recBlocks.Remove((blockidx + 1), toRemoveLast);
}
upperextent = min(upperextent, ceiling);
upperextent = std::min(upperextent, ceiling);
for (int i = 0; pexblock = recBlocks[i]; i++) {
if (s_pCurBlock == PC_GETBLOCK(pexblock->startpc))

4
pcsx2/x86/microVU.cpp
View File

@ -365,13 +365,13 @@ uint recMicroVU1::GetCacheReserve() const {
void recMicroVU0::SetCacheReserve(uint reserveInMegs) const {
DevCon.WriteLn("microVU0: Changing cache size [%dmb]", reserveInMegs);
microVU0.cacheSize = min(reserveInMegs, mVU0cacheReserve);
microVU0.cacheSize = std::min(reserveInMegs, mVU0cacheReserve);
safe_delete(microVU0.cache_reserve); // I assume this unmaps the memory
mVUreserveCache(microVU0); // Need rec-reset after this
}
void recMicroVU1::SetCacheReserve(uint reserveInMegs) const {
DevCon.WriteLn("microVU1: Changing cache size [%dmb]", reserveInMegs);
microVU1.cacheSize = min(reserveInMegs, mVU1cacheReserve);
microVU1.cacheSize = std::min(reserveInMegs, mVU1cacheReserve);
safe_delete(microVU1.cache_reserve); // I assume this unmaps the memory
mVUreserveCache(microVU1); // Need rec-reset after this
}

42
pcsx2/x86/microVU_Analyze.inl
View File

@ -26,10 +26,10 @@
// Read a VF reg
__ri void analyzeReg1(mV, int xReg, microVFreg& vfRead) {
if (xReg) {
if (_X) { mVUstall = max(mVUstall, mVUregs.VF[xReg].x); vfRead.reg = xReg; vfRead.x = 1; }
if (_Y) { mVUstall = max(mVUstall, mVUregs.VF[xReg].y); vfRead.reg = xReg; vfRead.y = 1; }
if (_Z) { mVUstall = max(mVUstall, mVUregs.VF[xReg].z); vfRead.reg = xReg; vfRead.z = 1; }
if (_W) { mVUstall = max(mVUstall, mVUregs.VF[xReg].w); vfRead.reg = xReg; vfRead.w = 1; }
if (_X) { mVUstall = std::max(mVUstall, mVUregs.VF[xReg].x); vfRead.reg = xReg; vfRead.x = 1; }
if (_Y) { mVUstall = std::max(mVUstall, mVUregs.VF[xReg].y); vfRead.reg = xReg; vfRead.y = 1; }
if (_Z) { mVUstall = std::max(mVUstall, mVUregs.VF[xReg].z); vfRead.reg = xReg; vfRead.z = 1; }
if (_W) { mVUstall = std::max(mVUstall, mVUregs.VF[xReg].w); vfRead.reg = xReg; vfRead.w = 1; }
}
}
@ -48,22 +48,22 @@ __ri void analyzeReg2(mV, int xReg, microVFreg& vfWrite, bool isLowOp) {
__ri void analyzeReg3(mV, int xReg, microVFreg& vfRead) {
if (xReg) {
if (_bc_x) {
mVUstall = max(mVUstall, mVUregs.VF[xReg].x);
mVUstall = std::max(mVUstall, mVUregs.VF[xReg].x);
vfRead.reg = xReg;
vfRead.x = 1;
}
else if (_bc_y) {
mVUstall = max(mVUstall, mVUregs.VF[xReg].y);
mVUstall = std::max(mVUstall, mVUregs.VF[xReg].y);
vfRead.reg = xReg;
vfRead.y = 1;
}
else if (_bc_z) {
mVUstall = max(mVUstall, mVUregs.VF[xReg].z);
mVUstall = std::max(mVUstall, mVUregs.VF[xReg].z);
vfRead.reg = xReg;
vfRead.z = 1;
}
else {
mVUstall = max(mVUstall, mVUregs.VF[xReg].w);
mVUstall = std::max(mVUstall, mVUregs.VF[xReg].w);
vfRead.reg = xReg;
vfRead.w = 1;
}
@ -73,7 +73,7 @@ __ri void analyzeReg3(mV, int xReg, microVFreg& vfRead) {
// For Clip Opcode
__ri void analyzeReg4(mV, int xReg, microVFreg& vfRead) {
if (xReg) {
mVUstall = max(mVUstall, mVUregs.VF[xReg].w);
mVUstall = std::max(mVUstall, mVUregs.VF[xReg].w);
vfRead.reg = xReg;
vfRead.w = 1;
}
@ -83,10 +83,10 @@ __ri void analyzeReg4(mV, int xReg, microVFreg& vfRead) {
__ri void analyzeReg5(mV, int xReg, int fxf, microVFreg& vfRead) {
if (xReg) {
switch (fxf) {
case 0: mVUstall = max(mVUstall, mVUregs.VF[xReg].x); vfRead.reg = xReg; vfRead.x = 1; break;
case 1: mVUstall = max(mVUstall, mVUregs.VF[xReg].y); vfRead.reg = xReg; vfRead.y = 1; break;
case 2: mVUstall = max(mVUstall, mVUregs.VF[xReg].z); vfRead.reg = xReg; vfRead.z = 1; break;
case 3: mVUstall = max(mVUstall, mVUregs.VF[xReg].w); vfRead.reg = xReg; vfRead.w = 1; break;
case 0: mVUstall = std::max(mVUstall, mVUregs.VF[xReg].x); vfRead.reg = xReg; vfRead.x = 1; break;
case 1: mVUstall = std::max(mVUstall, mVUregs.VF[xReg].y); vfRead.reg = xReg; vfRead.y = 1; break;
case 2: mVUstall = std::max(mVUstall, mVUregs.VF[xReg].z); vfRead.reg = xReg; vfRead.z = 1; break;
case 3: mVUstall = std::max(mVUstall, mVUregs.VF[xReg].w); vfRead.reg = xReg; vfRead.w = 1; break;
}
}
}
@ -94,17 +94,17 @@ __ri void analyzeReg5(mV, int xReg, int fxf, microVFreg& vfRead) {
// Flips xyzw stalls to yzwx (MR32 Opcode)
__ri void analyzeReg6(mV, int xReg, microVFreg& vfRead) {
if (xReg) {
if (_X) { mVUstall = max(mVUstall, mVUregs.VF[xReg].y); vfRead.reg = xReg; vfRead.y = 1; }
if (_Y) { mVUstall = max(mVUstall, mVUregs.VF[xReg].z); vfRead.reg = xReg; vfRead.z = 1; }
if (_Z) { mVUstall = max(mVUstall, mVUregs.VF[xReg].w); vfRead.reg = xReg; vfRead.w = 1; }
if (_W) { mVUstall = max(mVUstall, mVUregs.VF[xReg].x); vfRead.reg = xReg; vfRead.x = 1; }
if (_X) { mVUstall = std::max(mVUstall, mVUregs.VF[xReg].y); vfRead.reg = xReg; vfRead.y = 1; }
if (_Y) { mVUstall = std::max(mVUstall, mVUregs.VF[xReg].z); vfRead.reg = xReg; vfRead.z = 1; }
if (_Z) { mVUstall = std::max(mVUstall, mVUregs.VF[xReg].w); vfRead.reg = xReg; vfRead.w = 1; }
if (_W) { mVUstall = std::max(mVUstall, mVUregs.VF[xReg].x); vfRead.reg = xReg; vfRead.x = 1; }
}
}
// Reading a VI reg
__ri void analyzeVIreg1(mV, int xReg, microVIreg& viRead) {
if (xReg) {
mVUstall = max(mVUstall, mVUregs.VI[xReg]);
mVUstall = std::max(mVUstall, mVUregs.VI[xReg]);
viRead.reg = xReg;
viRead.used = 1;
}
@ -121,10 +121,10 @@ __ri void analyzeVIreg2(mV, int xReg, microVIreg& viWrite, int aCycles) {
}
}
#define analyzeQreg(x) { mVUregsTemp.q = x; mVUstall = max(mVUstall, mVUregs.q); }
#define analyzePreg(x) { mVUregsTemp.p = x; mVUstall = max(mVUstall, (u8)((mVUregs.p) ? (mVUregs.p - 1) : 0)); }
#define analyzeQreg(x) { mVUregsTemp.q = x; mVUstall = std::max(mVUstall, mVUregs.q); }
#define analyzePreg(x) { mVUregsTemp.p = x; mVUstall = std::max(mVUstall, (u8)((mVUregs.p) ? (mVUregs.p - 1) : 0)); }
#define analyzeRreg() { mVUregsTemp.r = 1; }
#define analyzeXGkick1() { mVUstall = max(mVUstall, mVUregs.xgkick); }
#define analyzeXGkick1() { mVUstall = std::max(mVUstall, mVUregs.xgkick); }
#define analyzeXGkick2(x) { mVUregsTemp.xgkick = x; }
#define setConstReg(x, v) { if (x) { mVUconstReg[x].isValid = 1; mVUconstReg[x].regValue = v; } }

6
pcsx2/x86/microVU_Compile.inl
View File

@ -75,11 +75,11 @@ void mVUsetupRange(microVU& mVU, s32 pc, bool isStartPC) {
std::deque<microRange>::iterator it(ranges->begin());
for (++it; it != ranges->end(); ++it) {
if((it[0].start >= rStart) && (it[0].start <= rEnd)) {
it[0].end = max(it[0].end, rEnd);
it[0].end = std::max(it[0].end, rEnd);
mergedRange = true;
}
else if ((it[0].end >= rStart) && (it[0].end <= rEnd)) {
it[0].start = min(it[0].start, rStart);
it[0].start = std::min(it[0].start, rStart);
mergedRange = true;
}
}
@ -243,7 +243,7 @@ __ri void eBitWarning(mV) {
//------------------------------------------------------------------
__fi void optimizeReg(u8& rState) { rState = (rState==1) ? 0 : rState; }
__fi void calcCycles(u8& reg, u8 x) { reg = ((reg > x) ? (reg - x) : 0); }
__fi void tCycles(u8& dest, u8& src) { dest = max(dest, src); }
__fi void tCycles(u8& dest, u8& src) { dest = std::max(dest, src); }
__fi void incP(mV) { mVU.p ^= 1; }
__fi void incQ(mV) { mVU.q ^= 1; }

2
pcsx2/x86/microVU_Flags.inl
View File

@ -85,7 +85,7 @@ int sortFlag(int* fFlag, int* bFlag, int cycles) {
}
void sortFullFlag(int* fFlag, int* bFlag) {
int m = max(max(fFlag[0], fFlag[1]), max(fFlag[2], fFlag[3]));
int m = std::max(std::max(fFlag[0], fFlag[1]), std::max(fFlag[2], fFlag[3]));
for(int i = 0; i < 4; i++) {
int t = 3 - (m - fFlag[i]);
bFlag[i] = (t < 0) ? 0 : t+1;

4
pcsx2/x86/microVU_Lower.inl
View File

@ -1147,13 +1147,13 @@ mVUop(mVU_RXOR) {
//------------------------------------------------------------------
mVUop(mVU_WAITP) {
pass1 { mVUstall = max(mVUstall, (u8)((mVUregs.p) ? (mVUregs.p - 1) : 0)); }
pass1 { mVUstall = std::max(mVUstall, (u8)((mVUregs.p) ? (mVUregs.p - 1) : 0)); }
pass2 { mVU.profiler.EmitOp(opWAITP); }
pass3 { mVUlog("WAITP"); }
}
mVUop(mVU_WAITQ) {
pass1 { mVUstall = max(mVUstall, mVUregs.q); }
pass1 { mVUstall = std::max(mVUstall, mVUregs.q); }
pass2 { mVU.profiler.EmitOp(opWAITQ); }
pass3 { mVUlog("WAITQ"); }
}

2
pcsx2/x86/sVU_zerorec.cpp
View File

@ -4338,7 +4338,7 @@ void recVUMI_XGKICK(VURegs *VU, int info)
recVUMI_XGKICK_(VU);
}
else {
s_ScheduleXGKICK = (CHECK_XGKICKHACK) ? (min((u32)4, (s_pCurBlock->endpc-pc)/8)) : 2;
s_ScheduleXGKICK = (CHECK_XGKICKHACK) ? (std::min((u32)4, (s_pCurBlock->endpc-pc)/8)) : 2;
}
}