diff --git a/pcsx2/windows/VCprojects/pcsx2_2008.vcproj b/pcsx2/windows/VCprojects/pcsx2_2008.vcproj
index cd443e42ad..380a14991c 100644
--- a/pcsx2/windows/VCprojects/pcsx2_2008.vcproj
+++ b/pcsx2/windows/VCprojects/pcsx2_2008.vcproj
@@ -2509,6 +2509,10 @@
RelativePath="..\..\x86\microVU_Execute.inl"
>
+
+
diff --git a/pcsx2/x86/microVU.cpp b/pcsx2/x86/microVU.cpp
index 9e362768af..ae11ad3b1a 100644
--- a/pcsx2/x86/microVU.cpp
+++ b/pcsx2/x86/microVU.cpp
@@ -28,6 +28,7 @@
PCSX2_ALIGNED16(microVU microVU0);
PCSX2_ALIGNED16(microVU microVU1);
+FILE *mVUlogFile[2] = {NULL, NULL};
declareAllVariables // Declares All Global Variables :D
//------------------------------------------------------------------
@@ -44,7 +45,8 @@ microVUt(void) mVUinit(VURegs* vuRegsPtr) {
mVU->progSize = (vuIndex ? 0x4000 : 0x1000) / 4;
mVU->cache = NULL;
memset(&mVU->prog, 0, sizeof(mVU->prog));
- mVUlog((vuIndex) ? "microVU1: init" : "microVU0: init");
+ mVUprint((vuIndex) ? "microVU1: init" : "microVU0: init");
+ mVUsetupLog();
mVUreset();
}
@@ -55,7 +57,7 @@ microVUt(void) mVUreset() {
microVU* mVU = mVUx;
mVUclose(); // Close
- mVUlog((vuIndex) ? "microVU1: reset" : "microVU0: reset");
+ mVUprint((vuIndex) ? "microVU1: reset" : "microVU0: reset");
// Dynarec Cache
mVU->cache = SysMmapEx((vuIndex ? 0x1e840000 : 0x0e840000), mVU->cacheSize, 0, (vuIndex ? "Micro VU1" : "Micro VU0"));
@@ -95,7 +97,7 @@ microVUt(void) mVUreset() {
microVUt(void) mVUclose() {
microVU* mVU = mVUx;
- mVUlog((vuIndex) ? "microVU1: close" : "microVU0: close");
+ mVUprint((vuIndex) ? "microVU1: close" : "microVU0: close");
if ( mVU->cache ) { HostSys::Munmap( mVU->cache, mVU->cacheSize ); mVU->cache = NULL; }
@@ -124,7 +126,8 @@ microVUt(void) mVUclear(u32 addr, u32 size) {
//------------------------------------------------------------------
// Clears program data (Sets used to 1 because calling this function implies the program will be used at least once)
-__forceinline void mVUclearProg(microVU* mVU, int progIndex) {
+microVUt(void) mVUclearProg(int progIndex) {
+ microVU* mVU = mVUx;
mVU->prog.prog[progIndex].used = 1;
mVU->prog.prog[progIndex].x86ptr = mVU->prog.prog[progIndex].x86start;
for (u32 i = 0; i < (mVU->progSize / 2); i++) {
@@ -133,15 +136,19 @@ __forceinline void mVUclearProg(microVU* mVU, int progIndex) {
}
// Caches Micro Program
-__forceinline void mVUcacheProg(microVU* mVU, int progIndex) {
+microVUt(void) mVUcacheProg(int progIndex) {
+ microVU* mVU = mVUx;
memcpy_fast(mVU->prog.prog[progIndex].data, mVU->regs->Micro, mVU->microSize);
+ mVUdumpProg(progIndex);
}
// Finds the least used program, (if program list full clears and returns an old program; if not-full, returns free program)
-__forceinline int mVUfindLeastUsedProg(microVU* mVU) {
+microVUt(int) mVUfindLeastUsedProg() {
+ microVU* mVU = mVUx;
if (mVU->prog.total < mVU->prog.max) {
mVU->prog.total++;
- mVUcacheProg(mVU, mVU->prog.total); // Cache Micro Program
+ mVUcacheProg(mVU->prog.total); // Cache Micro Program
+ Console::Notice("microVU: Program Total = %d", params mVU->prog.total);
return mVU->prog.total;
}
else {
@@ -153,27 +160,28 @@ __forceinline int mVUfindLeastUsedProg(microVU* mVU) {
j = i;
}
}
- mVUclearProg(mVU, j); // Clear old data if overwriting old program
- mVUcacheProg(mVU, j); // Cache Micro Program
- mVUlog("microVU: Program Cache got Full!");
+ mVUclearProg(j); // Clear old data if overwriting old program
+ mVUcacheProg(j); // Cache Micro Program
+ Console::Notice("microVU: Program Cache got Full!");
return j;
}
}
// Searches for Cached Micro Program and sets prog.cur to it (returns 1 if program found, else returns 0)
-__forceinline int mVUsearchProg(microVU* mVU) {
+microVUt(int) mVUsearchProg() {
+ microVU* mVU = mVUx;
if (mVU->prog.cleared) { // If cleared, we need to search for new program
for (int i = 0; i <= mVU->prog.total; i++) {
//if (i == mVU->prog.cur) continue; // We can skip the current program. (ToDo: Verify that games don't clear, and send the same microprogram :/)
if (!memcmp_mmx(mVU->prog.prog[i].data, mVU->regs->Micro, mVU->microSize)) {
- //if (i == mVU->prog.cur) { mVUlog("microVU: Same micro program sent!"); }
+ //if (i == mVU->prog.cur) { mVUprint("microVU: Same micro program sent!"); }
mVU->prog.cur = i;
mVU->prog.cleared = 0;
mVU->prog.prog[i].used++;
return 1;
}
}
- mVU->prog.cur = mVUfindLeastUsedProg(mVU); // If cleared and program not found, make a new program instance
+ mVU->prog.cur = mVUfindLeastUsedProg(); // If cleared and program not found, make a new program instance
mVU->prog.cleared = 0;
return 0;
}
diff --git a/pcsx2/x86/microVU.h b/pcsx2/x86/microVU.h
index c163025bb1..0447c68676 100644
--- a/pcsx2/x86/microVU.h
+++ b/pcsx2/x86/microVU.h
@@ -17,7 +17,8 @@
*/
#pragma once
-//#define mVUdebug // Prints Extra Info to Console
+#define mVUdebug // Prints Extra Info to Console
+//#define mVUlogProg // Dumps MicroPrograms into microVU0.txt/microVU1.txt
#include "Common.h"
#include "VU.h"
#include "GS.h"
@@ -48,16 +49,16 @@ public:
}
microBlock* search(microRegInfo* pState) {
if (listSize < 0) return NULL;
- if (blockList[0].pState.needExactMatch) { // Needs Detailed Search (Exact Match of Pipeline State)
+ //if (blockList[0].pState.needExactMatch) { // Needs Detailed Search (Exact Match of Pipeline State)
for (int i = 0; i <= listSize; i++) {
if (!memcmp(pState, &blockList[i].pState, sizeof(microRegInfo))) return &blockList[i];
}
- }
+ /*}
else { // Can do Simple Search (Only Matches the Important Pipeline Stuff)
for (int i = 0; i <= listSize; i++) {
if ((blockList[i].pState.q == pState->q) && (blockList[i].pState.p == pState->p)) { return &blockList[i]; }
}
- }
+ }*/
return NULL;
}
};
@@ -118,6 +119,9 @@ extern PCSX2_ALIGNED16(microVU microVU1);
extern void (*mVU_UPPER_OPCODE[64])( VURegs* VU, s32 info );
extern void (*mVU_LOWER_OPCODE[128])( VURegs* VU, s32 info );
+// Used for logging microPrograms
+extern FILE *mVUlogFile[2];
+
// Main Functions
microVUt(void) mVUinit(VURegs*);
microVUt(void) mVUreset();
@@ -125,10 +129,10 @@ microVUt(void) mVUclose();
microVUt(void) mVUclear(u32, u32);
// Private Functions
-__forceinline void mVUclearProg(microVU* mVU, int progIndex);
-__forceinline int mVUfindLeastUsedProg(microVU* mVU);
-__forceinline int mVUsearchProg(microVU* mVU);
-__forceinline void mVUcacheProg(microVU* mVU, int progIndex);
+microVUt(void) mVUclearProg(microVU* mVU, int progIndex);
+microVUt(int) mVUfindLeastUsedProg(microVU* mVU);
+microVUt(int) mVUsearchProg(microVU* mVU);
+microVUt(void) mVUcacheProg(microVU* mVU, int progIndex);
void* __fastcall mVUexecuteVU0(u32 startPC, u32 cycles);
void* __fastcall mVUexecuteVU1(u32 startPC, u32 cycles);
@@ -140,6 +144,7 @@ typedef void (*mVUrecCall)(u32, u32) __attribute__((__fastcall)); // Not sure if
// Include all the *.inl files (Needed because C++ sucks with templates and *.cpp files)
#include "microVU_Misc.inl"
+#include "microVU_Log.inl"
#include "microVU_Analyze.inl"
#include "microVU_Alloc.inl"
#include "microVU_Upper.inl"
diff --git a/pcsx2/x86/microVU_Analyze.inl b/pcsx2/x86/microVU_Analyze.inl
index 506144262b..0605559741 100644
--- a/pcsx2/x86/microVU_Analyze.inl
+++ b/pcsx2/x86/microVU_Analyze.inl
@@ -51,7 +51,7 @@
microVUt(void) mVUanalyzeFMAC1(int Fd, int Fs, int Ft) {
microVU* mVU = mVUx;
- //mVUlog("microVU: FMAC1 Opcode");
+ //mVUprint("microVU: FMAC1 Opcode");
mVUinfo |= _doStatus;
analyzeReg1(Fs);
analyzeReg1(Ft);
@@ -64,7 +64,7 @@ microVUt(void) mVUanalyzeFMAC1(int Fd, int Fs, int Ft) {
microVUt(void) mVUanalyzeFMAC2(int Fs, int Ft) {
microVU* mVU = mVUx;
- //mVUlog("microVU: FMAC2 Opcode");
+ //mVUprint("microVU: FMAC2 Opcode");
analyzeReg1(Fs);
analyzeReg2(Ft);
}
@@ -84,7 +84,7 @@ microVUt(void) mVUanalyzeFMAC2(int Fs, int Ft) {
microVUt(void) mVUanalyzeFMAC3(int Fd, int Fs, int Ft) {
microVU* mVU = mVUx;
- //mVUlog("microVU: FMAC3 Opcode");
+ //mVUprint("microVU: FMAC3 Opcode");
mVUinfo |= _doStatus;
analyzeReg1(Fs);
analyzeReg3(Ft);
@@ -114,7 +114,7 @@ microVUt(void) mVUanalyzeFMAC4(int Fs, int Ft) {
microVUt(void) mVUanalyzeIALU1(int Id, int Is, int It) {
microVU* mVU = mVUx;
- //mVUlog("microVU: IALU1 Opcode");
+ //mVUprint("microVU: IALU1 Opcode");
if (!Id) { mVUinfo |= _isNOP; }
analyzeVIreg1(Is);
analyzeVIreg1(It);
@@ -123,7 +123,7 @@ microVUt(void) mVUanalyzeIALU1(int Id, int Is, int It) {
microVUt(void) mVUanalyzeIALU2(int Is, int It) {
microVU* mVU = mVUx;
- //mVUlog("microVU: IALU2 Opcode");
+ //mVUprint("microVU: IALU2 Opcode");
if (!It) { mVUinfo |= _isNOP; }
analyzeVIreg1(Is);
analyzeVIreg2(It, 1);
@@ -145,7 +145,7 @@ microVUt(void) mVUanalyzeIALU2(int Is, int It) {
microVUt(void) mVUanalyzeMR32(int Fs, int Ft) {
microVU* mVU = mVUx;
- mVUlog("microVU: MR32 Opcode");
+ mVUprint("microVU: MR32 Opcode");
if (!Ft) { mVUinfo |= _isNOP; }
analyzeReg6(Fs);
analyzeReg2(Ft);
@@ -171,7 +171,7 @@ microVUt(void) mVUanalyzeMR32(int Fs, int Ft) {
microVUt(void) mVUanalyzeFDIV(int Fs, int Fsf, int Ft, int Ftf, u8 xCycles) {
microVU* mVU = mVUx;
- mVUlog("microVU: DIV Opcode");
+ mVUprint("microVU: DIV Opcode");
analyzeReg5(Fs, Fsf);
analyzeReg5(Ft, Ftf);
analyzeQreg(xCycles);
@@ -183,14 +183,14 @@ microVUt(void) mVUanalyzeFDIV(int Fs, int Fsf, int Ft, int Ftf, u8 xCycles) {
microVUt(void) mVUanalyzeEFU1(int Fs, int Fsf, u8 xCycles) {
microVU* mVU = mVUx;
- mVUlog("microVU: EFU Opcode");
+ mVUprint("microVU: EFU Opcode");
analyzeReg5(Fs, Fsf);
analyzePreg(xCycles);
}
microVUt(void) mVUanalyzeEFU2(int Fs, u8 xCycles) {
microVU* mVU = mVUx;
- mVUlog("microVU: EFU Opcode");
+ mVUprint("microVU: EFU Opcode");
analyzeReg1(Fs);
analyzePreg(xCycles);
}
@@ -201,7 +201,7 @@ microVUt(void) mVUanalyzeEFU2(int Fs, u8 xCycles) {
microVUt(void) mVUanalyzeMFP(int Ft) {
microVU* mVU = mVUx;
- mVUlog("microVU: MFP Opcode");
+ mVUprint("microVU: MFP Opcode");
if (!Ft) { mVUinfo |= _isNOP; }
analyzeReg2(Ft);
}
@@ -212,7 +212,7 @@ microVUt(void) mVUanalyzeMFP(int Ft) {
microVUt(void) mVUanalyzeLQ(int Ft, int Is, bool writeIs) {
microVU* mVU = mVUx;
- //mVUlog("microVU: LQ Opcode");
+ //mVUprint("microVU: LQ Opcode");
analyzeVIreg1(Is);
analyzeReg2(Ft);
if (!Ft) { mVUinfo |= (writeIs && Is) ? _noWriteVF : _isNOP; }
@@ -238,14 +238,14 @@ microVUt(void) mVUanalyzeSQ(int Fs, int It, bool writeIt) {
microVUt(void) mVUanalyzeR1(int Fs, int Fsf) {
microVU* mVU = mVUx;
- mVUlog("microVU: R-reg Opcode");
+ mVUprint("microVU: R-reg Opcode");
analyzeReg5(Fs, Fsf);
analyzeRreg();
}
microVUt(void) mVUanalyzeR2(int Ft, bool canBeNOP) {
microVU* mVU = mVUx;
- mVUlog("microVU: R-reg Opcode");
+ mVUprint("microVU: R-reg Opcode");
if (!Ft) { mVUinfo |= ((canBeNOP) ? _isNOP : _noWriteVF); }
analyzeReg2(Ft);
analyzeRreg();
@@ -257,7 +257,7 @@ microVUt(void) mVUanalyzeR2(int Ft, bool canBeNOP) {
microVUt(void) mVUanalyzeSflag(int It) {
microVU* mVU = mVUx;
- mVUlog("microVU: Sflag Opcode");
+ mVUprint("microVU: Sflag Opcode");
if (!It) { mVUinfo |= _isNOP; }
else { // Sets _isSflag at instruction that FSxxx opcode reads it's status flag from
mVUinfo |= _swapOps;
@@ -273,7 +273,7 @@ microVUt(void) mVUanalyzeSflag(int It) {
microVUt(void) mVUanalyzeFSSET() {
microVU* mVU = mVUx;
mVUinfo |= _isFSSET;
- mVUlog("microVU: FSSET Opcode");
+ mVUprint("microVU: FSSET Opcode");
// mVUinfo &= ~_doStatus;
// Note: I'm not entirely sure if the non-sticky flags
// should be taken from the current upper instruction
@@ -287,7 +287,7 @@ microVUt(void) mVUanalyzeFSSET() {
microVUt(void) mVUanalyzeMflag(int Is, int It) {
microVU* mVU = mVUx;
- mVUlog("microVU: Mflag Opcode");
+ mVUprint("microVU: Mflag Opcode");
if (!It) { mVUinfo |= _isNOP; }
else { // Need set _doMac for 4 previous Ops (need to do all 4 because stalls could change the result needed)
mVUinfo |= _swapOps;
diff --git a/pcsx2/x86/microVU_Compile.inl b/pcsx2/x86/microVU_Compile.inl
index a7d67983ef..09a81815f5 100644
--- a/pcsx2/x86/microVU_Compile.inl
+++ b/pcsx2/x86/microVU_Compile.inl
@@ -25,7 +25,7 @@
#define branchCase(JMPcc, nJMPcc) \
mVUsetupBranch(bStatus, bMac); \
- mVUlog("mVUcompile branchCase"); \
+ mVUprint("mVUcompile branchCase"); \
CMP16ItoM((uptr)&mVU->branch, 0); \
incPC2(1); \
pBlock = mVUblocks[iPC/2]->search((microRegInfo*)&mVUregs); \
@@ -142,7 +142,7 @@ microVUt(void) mVUsetFlags(int* bStatus, int* bMac) {
// Recompiles Code for Proper Flags and Q/P regs on Block Linkings
microVUt(void) mVUsetupBranch(int* bStatus, int* bMac) {
microVU* mVU = mVUx;
- mVUlog("mVUsetupBranch");
+ mVUprint("mVUsetupBranch");
PUSH32R(gprR); // Backup gprR
MOV32RtoM((uptr)&mVU->espBackup, gprESP);
@@ -268,7 +268,7 @@ microVUt(void*) __fastcall mVUcompile(u32 startPC, uptr pState) {
microVU* mVU = mVUx;
u8* thisPtr = x86Ptr;
- if (startPC > ((vuIndex) ? 0x3fff : 0xfff)) { mVUlog("microVU: invalid startPC"); }
+ if (startPC > ((vuIndex) ? 0x3fff : 0xfff)) { mVUprint("microVU: invalid startPC"); }
startPC &= (vuIndex ? 0x3ff8 : 0xff8);
// Searches for Existing Compiled Block (if found, then returns; else, compile)
@@ -336,7 +336,7 @@ microVUt(void*) __fastcall mVUcompile(u32 startPC, uptr pState) {
case 8: branchCase(JNZ32, JZ32); // IBNEQ
case 1: case 2: // B/BAL
- mVUlog("mVUcompile B/BAL");
+ mVUprint("mVUcompile B/BAL");
incPC(-3); // Go back to branch opcode (to get branch imm addr)
mVUsetupBranch(bStatus, bMac);
@@ -348,7 +348,7 @@ microVUt(void*) __fastcall mVUcompile(u32 startPC, uptr pState) {
return thisPtr;
case 9: case 10: // JR/JALR
- mVUlog("mVUcompile JR/JALR");
+ mVUprint("mVUcompile JR/JALR");
memcpy_fast(&pBlock->pStateEnd, &mVUregs, sizeof(microRegInfo));
mVUsetupBranch(bStatus, bMac);
@@ -364,7 +364,7 @@ microVUt(void*) __fastcall mVUcompile(u32 startPC, uptr pState) {
return thisPtr;
}
// Conditional Branches
- mVUlog("mVUcompile conditional branch");
+ mVUprint("mVUcompile conditional branch");
if (pBlock) { // Branch non-taken has already been compiled
incPC(-3); // Go back to branch opcode (to get branch imm addr)
// Check if branch-block has already been compiled
@@ -386,8 +386,8 @@ microVUt(void*) __fastcall mVUcompile(u32 startPC, uptr pState) {
return thisPtr;
}
}
- mVUlog("mVUcompile ebit");
- if (x == (vuIndex?(0x3fff/8):(0xfff/8))) { mVUlog("microVU: Possible infinite compiling loop!"); }
+ mVUprint("mVUcompile ebit");
+ if (x == (vuIndex?(0x3fff/8):(0xfff/8))) { mVUprint("microVU: Possible infinite compiling loop!"); }
// Do E-bit end stuff here
mVUendProgram();
diff --git a/pcsx2/x86/microVU_Execute.inl b/pcsx2/x86/microVU_Execute.inl
index 6714813aec..ebb5b3c633 100644
--- a/pcsx2/x86/microVU_Execute.inl
+++ b/pcsx2/x86/microVU_Execute.inl
@@ -15,6 +15,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
*/
+
#pragma once
#ifdef PCSX2_MICROVU
@@ -22,7 +23,7 @@
// Dispatcher Functions
//------------------------------------------------------------------
-void testFunction() { mVUlog("microVU: Entered Execution Mode"); }
+void testFunction() { mVUprint("microVU: Entered Execution Mode"); }
// Generates the code for entering recompiled blocks
microVUt(void) mVUdispatcherA() {
@@ -128,9 +129,9 @@ microVUt(void) mVUdispatcherB() {
microVUt(void*) __fastcall mVUexecute(u32 startPC, u32 cycles) {
microVU* mVU = mVUx;
- //mVUlog("microVU%x: startPC = 0x%x, cycles = 0x%x", params vuIndex, startPC, cycles);
+ //mVUprint("microVU%x: startPC = 0x%x, cycles = 0x%x", params vuIndex, startPC, cycles);
- mVUsearchProg(mVU); // Find and set correct program
+ mVUsearchProg(); // Find and set correct program
mVU->cycles = cycles;
mVU->totalCycles = cycles;
@@ -145,7 +146,7 @@ microVUt(void*) __fastcall mVUexecute(u32 startPC, u32 cycles) {
microVUt(void) mVUcleanUp() {
microVU* mVU = mVUx;
- mVUlog("microVU: Program exited successfully!");
+ //mVUprint("microVU: Program exited successfully!");
mVUcurProg.x86ptr = x86Ptr;
mVUcacheCheck(x86Ptr, mVUcurProg.x86start, (uptr)(mVUcurProg.x86end - mVUcurProg.x86start));
}
diff --git a/pcsx2/x86/microVU_Log.inl b/pcsx2/x86/microVU_Log.inl
new file mode 100644
index 0000000000..c04ea798a2
--- /dev/null
+++ b/pcsx2/x86/microVU_Log.inl
@@ -0,0 +1,91 @@
+/* Pcsx2 - Pc Ps2 Emulator
+* Copyright (C) 2009 Pcsx2-Playground Team
+*
+* This program is free software; you can redistribute it and/or modify
+* it under the terms of the GNU General Public License as published by
+* the Free Software Foundation; either version 2 of the License, or
+* (at your option) any later version.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+* GNU General Public License for more details.
+*
+* You should have received a copy of the GNU General Public License
+* along with this program; if not, write to the Free Software
+* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
+*/
+
+#pragma once
+#ifdef PCSX2_MICROVU
+
+microVUt(void) __mVUsetupLog() {
+ if (!vuIndex) { if (!mVUlogFile[0]) mVUlogFile[0] = fopen(LOGS_DIR "\\microVU0.txt", "w"); }
+ else { if (!mVUlogFile[1]) mVUlogFile[1] = fopen(LOGS_DIR "\\microVU1.txt", "w"); }
+}
+
+// writes text directly to the microVU.txt, no newlines appended.
+microVUx(void) __mVULog(const char* fmt, ...) {
+ char tmp[2024];
+ va_list list;
+
+ va_start(list, fmt);
+
+ // concatenate the log message after the prefix:
+ int length = vsprintf(tmp, fmt, list);
+ va_end(list);
+
+ if (mVUlogFile[vuIndex]) {
+ fputs(tmp, mVUlogFile[vuIndex]);
+ //fputs("\n", mVUlogFile[vuIndex]);
+ fflush(mVUlogFile[vuIndex]);
+ }
+}
+
+#define commaIf() { if (bitX[6]) { mVUlog(","); bitX[6] = 0; } }
+
+microVUt(void) __mVUdumpProgram(int progIndex) {
+ microVU* mVU = mVUx;
+ bool bitX[7];
+ mVUlog("*********************\n", progIndex);
+ mVUlog("* Micro-Program #%02d *\n", progIndex);
+ mVUlog("*********************\n\n", progIndex);
+ for (u32 i = 0; i < mVU->progSize; i+=2) {
+
+ mVU->code = mVU->prog.prog[progIndex].data[i+1];
+ mVUlog("[%04x] (%08x) ", i*4, mVU->code);
+
+ bitX[0] = 0;
+ bitX[1] = 0;
+ bitX[2] = 0;
+ bitX[3] = 0;
+ bitX[4] = 0;
+ bitX[5] = 0;
+ bitX[6] = 0;
+
+ if (mVU->code & _Ibit_) {bitX[0] = 1; bitX[5] = 1;}
+ if (mVU->code & _Ebit_) {bitX[1] = 1; bitX[5] = 1;}
+ if (mVU->code & _Mbit_) {bitX[2] = 1; bitX[5] = 1;}
+ if (mVU->code & _Dbit_) {bitX[3] = 1; bitX[5] = 1;}
+ if (mVU->code & _Tbit_) {bitX[4] = 1; bitX[5] = 1;}
+
+ mVUopU();
+
+ if (bitX[5]) {
+ mVUlog(" (");
+ if (bitX[0]) { mVUlog("I"); bitX[6] = 1; }
+ if (bitX[1]) { commaIf(); mVUlog("E"); bitX[6] = 1; }
+ if (bitX[2]) { commaIf(); mVUlog("M"); bitX[6] = 1; }
+ if (bitX[3]) { commaIf(); mVUlog("D"); bitX[6] = 1; }
+ if (bitX[4]) { commaIf(); mVUlog("T"); }
+ mVUlog(")");
+ }
+
+ mVU->code = mVU->prog.prog[progIndex].data[i];
+ mVUlog("\n[%04x] (%08x) ", i*4, mVU->code);
+ mVUopL();
+ mVUlog("\n\n");
+ }
+}
+
+#endif //PCSX2_MICROVU
diff --git a/pcsx2/x86/microVU_Lower.inl b/pcsx2/x86/microVU_Lower.inl
index 8626ec175f..0ae4c5011b 100644
--- a/pcsx2/x86/microVU_Lower.inl
+++ b/pcsx2/x86/microVU_Lower.inl
@@ -45,8 +45,8 @@
microVUf(void) mVU_DIV() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeFDIV(_Fs_, _Fsf_, _Ft_, _Ftf_, 7); }
- else {
+ pass1 { mVUanalyzeFDIV(_Fs_, _Fsf_, _Ft_, _Ftf_, 7); }
+ pass2 {
u8 *ajmp, *bjmp, *cjmp, *djmp;
getReg5(xmmFs, _Fs_, _Fsf_);
getReg5(xmmFt, _Ft_, _Ftf_);
@@ -76,12 +76,13 @@ microVUf(void) mVU_DIV() {
mVUunpack_xyzw(xmmFs, xmmFs, 0);
mVUmergeRegs(xmmPQ, xmmFs, writeQ ? 4 : 8);
}
+ pass3 { mVUlog("DIV"); }
}
microVUf(void) mVU_SQRT() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeFDIV(0, 0, _Ft_, _Ftf_, 7); }
- else {
+ pass1 { mVUanalyzeFDIV(0, 0, _Ft_, _Ftf_, 7); }
+ pass2 {
u8 *ajmp;
getReg5(xmmFt, _Ft_, _Ftf_);
@@ -93,12 +94,13 @@ microVUf(void) mVU_SQRT() {
mVUunpack_xyzw(xmmFt, xmmFt, 0);
mVUmergeRegs(xmmPQ, xmmFt, writeQ ? 4 : 8);
}
+ pass3 { mVUlog("SQRT"); }
}
microVUf(void) mVU_RSQRT() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeFDIV(_Fs_, _Fsf_, _Ft_, _Ftf_, 13); }
- else {
+ pass1 { mVUanalyzeFDIV(_Fs_, _Fsf_, _Ft_, _Ftf_, 13); }
+ pass2 {
u8 *ajmp, *bjmp, *cjmp, *djmp;
getReg5(xmmFs, _Fs_, _Fsf_);
getReg5(xmmFt, _Ft_, _Ftf_);
@@ -130,6 +132,7 @@ microVUf(void) mVU_RSQRT() {
mVUunpack_xyzw(xmmFs, xmmFs, 0);
mVUmergeRegs(xmmPQ, xmmFs, writeQ ? 4 : 8);
}
+ pass3 { mVUlog("RSQRT"); }
}
//------------------------------------------------------------------
@@ -166,8 +169,8 @@ microVUt(void) mVU_EATAN_() {
microVUf(void) mVU_EATAN() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeEFU1(_Fs_, _Fsf_, 54); }
- else {
+ pass1 { mVUanalyzeEFU1(_Fs_, _Fsf_, 54); }
+ pass2 {
getReg5(xmmFs, _Fs_, _Fsf_);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance
@@ -178,12 +181,13 @@ microVUf(void) mVU_EATAN() {
mVU_EATAN_();
}
+ pass3 { mVUlog("EATAN"); }
}
microVUf(void) mVU_EATANxy() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeEFU2(_Fs_, 54); }
- else {
+ pass1 { mVUanalyzeEFU2(_Fs_, 54); }
+ pass2 {
getReg6(xmmFt, _Fs_);
SSE2_PSHUFD_XMM_to_XMM(xmmFs, xmmFt, 0x01);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance
@@ -195,12 +199,13 @@ microVUf(void) mVU_EATANxy() {
mVU_EATAN_();
}
+ pass3 { mVUlog("EATANxy"); }
}
microVUf(void) mVU_EATANxz() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeEFU2(_Fs_, 54); }
- else {
+ pass1 { mVUanalyzeEFU2(_Fs_, 54); }
+ pass2 {
getReg6(xmmFt, _Fs_);
SSE2_PSHUFD_XMM_to_XMM(xmmFs, xmmFt, 0x02);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance
@@ -212,6 +217,7 @@ microVUf(void) mVU_EATANxz() {
mVU_EATAN_();
}
+ pass3 { mVUlog("EATANxz"); }
}
#define eexpHelper(addr) { \
@@ -223,8 +229,8 @@ microVUf(void) mVU_EATANxz() {
microVUf(void) mVU_EEXP() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeEFU1(_Fs_, _Fsf_, 44); }
- else {
+ pass1 { mVUanalyzeEFU1(_Fs_, _Fsf_, 44); }
+ pass2 {
getReg5(xmmFs, _Fs_, _Fsf_);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance
SSE_MOVSS_XMM_to_XMM(xmmPQ, xmmFs);
@@ -251,6 +257,7 @@ microVUf(void) mVU_EEXP() {
SSE_MOVSS_XMM_to_XMM(xmmPQ, xmmT1);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back
}
+ pass3 { mVUlog("EEXP"); }
}
microVUt(void) mVU_sumXYZ() {
@@ -271,20 +278,21 @@ microVUt(void) mVU_sumXYZ() {
microVUf(void) mVU_ELENG() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeEFU2(_Fs_, 18); }
- else {
+ pass1 { mVUanalyzeEFU2(_Fs_, 18); }
+ pass2 {
getReg6(xmmFs, _Fs_);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance
mVU_sumXYZ();
SSE_SQRTSS_XMM_to_XMM(xmmPQ, xmmPQ);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back
}
+ pass3 { mVUlog("ELENG"); }
}
microVUf(void) mVU_ERCPR() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeEFU1(_Fs_, _Fsf_, 12); }
- else {
+ pass1 { mVUanalyzeEFU1(_Fs_, _Fsf_, 12); }
+ pass2 {
getReg5(xmmFs, _Fs_, _Fsf_);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance
SSE_MOVSS_XMM_to_XMM(xmmPQ, xmmFs);
@@ -293,12 +301,13 @@ microVUf(void) mVU_ERCPR() {
SSE_MOVSS_XMM_to_XMM(xmmPQ, xmmFs);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back
}
+ pass3 { mVUlog("ERCPR"); }
}
microVUf(void) mVU_ERLENG() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeEFU2(_Fs_, 24); }
- else {
+ pass1 { mVUanalyzeEFU2(_Fs_, 24); }
+ pass2 {
getReg6(xmmFs, _Fs_);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance
mVU_sumXYZ();
@@ -308,12 +317,13 @@ microVUf(void) mVU_ERLENG() {
SSE_MOVSS_XMM_to_XMM(xmmPQ, xmmFs);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back
}
+ pass3 { mVUlog("ERLENG"); }
}
microVUf(void) mVU_ERSADD() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeEFU2(_Fs_, 18); }
- else {
+ pass1 { mVUanalyzeEFU2(_Fs_, 18); }
+ pass2 {
getReg6(xmmFs, _Fs_);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance
mVU_sumXYZ();
@@ -323,12 +333,13 @@ microVUf(void) mVU_ERSADD() {
SSE_MOVSS_XMM_to_XMM(xmmPQ, xmmFs);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back
}
+ pass3 { mVUlog("ERSADD"); }
}
microVUf(void) mVU_ERSQRT() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeEFU1(_Fs_, _Fsf_, 18); }
- else {
+ pass1 { mVUanalyzeEFU1(_Fs_, _Fsf_, 18); }
+ pass2 {
getReg5(xmmFs, _Fs_, _Fsf_);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance
SSE_SQRTSS_XMM_to_XMM(xmmPQ, xmmFs);
@@ -337,17 +348,19 @@ microVUf(void) mVU_ERSQRT() {
SSE_MOVSS_XMM_to_XMM(xmmPQ, xmmFs);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back
}
+ pass3 { mVUlog("ERSQRT"); }
}
microVUf(void) mVU_ESADD() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeEFU2(_Fs_, 11); }
- else {
+ pass1 { mVUanalyzeEFU2(_Fs_, 11); }
+ pass2 {
getReg6(xmmFs, _Fs_);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance
mVU_sumXYZ();
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back
}
+ pass3 { mVUlog("ESADD"); }
}
#define esinHelper(addr) { \
@@ -359,8 +372,8 @@ microVUf(void) mVU_ESADD() {
microVUf(void) mVU_ESIN() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeEFU2(_Fs_, 29); }
- else {
+ pass1 { mVUanalyzeEFU2(_Fs_, 29); }
+ pass2 {
getReg5(xmmFs, _Fs_, _Fsf_);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance
SSE_MOVSS_XMM_to_XMM(xmmPQ, xmmFs);
@@ -381,23 +394,25 @@ microVUf(void) mVU_ESIN() {
SSE_ADDSS_XMM_to_XMM(xmmPQ, xmmT1);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back
}
+ pass3 { mVUlog("ESIN"); }
}
microVUf(void) mVU_ESQRT() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeEFU1(_Fs_, _Fsf_, 12); }
- else {
+ pass1 { mVUanalyzeEFU1(_Fs_, _Fsf_, 12); }
+ pass2 {
getReg5(xmmFs, _Fs_, _Fsf_);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance
SSE_SQRTSS_XMM_to_XMM(xmmPQ, xmmFs);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back
}
+ pass3 { mVUlog("ESQRT"); }
}
microVUf(void) mVU_ESUM() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeEFU2(_Fs_, 12); }
- else {
+ pass1 { mVUanalyzeEFU2(_Fs_, 12); }
+ pass2 {
getReg6(xmmFs, _Fs_);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance
SSE2_PSHUFD_XMM_to_XMM(xmmFt, xmmFs, 0x1b);
@@ -407,6 +422,7 @@ microVUf(void) mVU_ESUM() {
SSE_MOVSS_XMM_to_XMM(xmmPQ, xmmFs);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back
}
+ pass3 { mVUlog("ESUM"); }
}
//------------------------------------------------------------------
@@ -415,57 +431,62 @@ microVUf(void) mVU_ESUM() {
microVUf(void) mVU_FCAND() {
microVU* mVU = mVUx;
- if (!recPass) {mVUlog("clip broken");}
- else {
+ pass1 { mVUprint("clip broken"); }
+ pass2 {
mVUallocCFLAGa(gprT1, fvcInstance);
AND32ItoR(gprT1, _Imm24_);
ADD32ItoR(gprT1, 0xffffff);
SHR32ItoR(gprT1, 24);
mVUallocVIb(gprT1, 1);
}
+ pass3 { mVUlog("FCAND"); }
}
microVUf(void) mVU_FCEQ() {
microVU* mVU = mVUx;
- if (!recPass) {mVUlog("clip broken");}
- else {
+ pass1 { mVUprint("clip broken"); }
+ pass2 {
mVUallocCFLAGa(gprT1, fvcInstance);
XOR32ItoR(gprT1, _Imm24_);
SUB32ItoR(gprT1, 1);
SHR32ItoR(gprT1, 31);
mVUallocVIb(gprT1, 1);
}
+ pass3 { mVUlog("FCEQ"); }
}
microVUf(void) mVU_FCGET() {
microVU* mVU = mVUx;
- if (!recPass) {mVUlog("clip broken");}
- else {
+ pass1 { mVUprint("clip broken"); }
+ pass2 {
mVUallocCFLAGa(gprT1, fvcInstance);
AND32ItoR(gprT1, 0xfff);
mVUallocVIb(gprT1, _Ft_);
}
+ pass3 { mVUlog("FCGET"); }
}
microVUf(void) mVU_FCOR() {
microVU* mVU = mVUx;
- if (!recPass) {mVUlog("clip broken");}
- else {
+ pass1 { mVUprint("clip broken"); }
+ pass2 {
mVUallocCFLAGa(gprT1, fvcInstance);
OR32ItoR(gprT1, _Imm24_);
ADD32ItoR(gprT1, 1); // If 24 1's will make 25th bit 1, else 0
SHR32ItoR(gprT1, 24); // Get the 25th bit (also clears the rest of the garbage in the reg)
mVUallocVIb(gprT1, 1);
}
+ pass3 { mVUlog("FCOR"); }
}
microVUf(void) mVU_FCSET() {
microVU* mVU = mVUx;
- if (!recPass) {mVUlog("clip broken");}
- else {
+ pass1 { mVUprint("clip broken"); }
+ pass2 {
MOV32ItoR(gprT1, _Imm24_);
mVUallocCFLAGb(gprT1, fcInstance);
}
+ pass3 { mVUlog("FCSET"); }
}
//------------------------------------------------------------------
@@ -474,19 +495,20 @@ microVUf(void) mVU_FCSET() {
microVUf(void) mVU_FMAND() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeMflag(_Fs_, _Ft_); }
- else {
+ pass1 { mVUanalyzeMflag(_Fs_, _Ft_); }
+ pass2 {
mVUallocMFLAGa(gprT1, fvmInstance);
mVUallocVIa(gprT2, _Fs_);
AND16RtoR(gprT1, gprT2);
mVUallocVIb(gprT1, _Ft_);
}
+ pass3 { mVUlog("FMAND"); }
}
microVUf(void) mVU_FMEQ() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeMflag(_Fs_, _Ft_); }
- else {
+ pass1 { mVUanalyzeMflag(_Fs_, _Ft_); }
+ pass2 {
mVUallocMFLAGa(gprT1, fvmInstance);
mVUallocVIa(gprT2, _Fs_);
XOR32RtoR(gprT1, gprT2);
@@ -494,17 +516,19 @@ microVUf(void) mVU_FMEQ() {
SHR32ItoR(gprT1, 31);
mVUallocVIb(gprT1, _Ft_);
}
+ pass3 { mVUlog("FMEQ"); }
}
microVUf(void) mVU_FMOR() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeMflag(_Fs_, _Ft_); }
- else {
+ pass1 { mVUanalyzeMflag(_Fs_, _Ft_); }
+ pass2 {
mVUallocMFLAGa(gprT1, fvmInstance);
mVUallocVIa(gprT2, _Fs_);
OR16RtoR(gprT1, gprT2);
mVUallocVIb(gprT1, _Ft_);
}
+ pass3 { mVUlog("FMOR"); }
}
//------------------------------------------------------------------
@@ -513,46 +537,50 @@ microVUf(void) mVU_FMOR() {
microVUf(void) mVU_FSAND() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeSflag(_Ft_); }
- else {
+ pass1 { mVUanalyzeSflag(_Ft_); }
+ pass2 {
mVUallocSFLAGa(gprT1, fvsInstance);
AND16ItoR(gprT1, _Imm12_);
mVUallocVIb(gprT1, _Ft_);
}
+ pass3 { mVUlog("FSAND"); }
}
microVUf(void) mVU_FSEQ() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeSflag(_Ft_); }
- else {
+ pass1 { mVUanalyzeSflag(_Ft_); }
+ pass2 {
mVUallocSFLAGa(gprT1, fvsInstance);
XOR16ItoR(gprT1, _Imm12_);
SUB16ItoR(gprT1, 1);
SHR16ItoR(gprT1, 15);
mVUallocVIb(gprT1, _Ft_);
}
+ pass3 { mVUlog("FSEQ"); }
}
microVUf(void) mVU_FSOR() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeSflag(_Ft_); }
- else {
+ pass1 { mVUanalyzeSflag(_Ft_); }
+ pass2 {
mVUallocSFLAGa(gprT1, fvsInstance);
OR16ItoR(gprT1, _Imm12_);
mVUallocVIb(gprT1, _Ft_);
}
+ pass3 { mVUlog("FSOR"); }
}
microVUf(void) mVU_FSSET() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeFSSET(); }
- else {
+ pass1 { mVUanalyzeFSSET(); }
+ pass2 {
int flagReg1, flagReg2;
getFlagReg(flagReg1, fsInstance);
if (!(doStatus||doDivFlag)) { getFlagReg(flagReg2, fpsInstance); MOV16RtoR(flagReg1, flagReg2); } // Get status result from last status setting instruction
AND16ItoR(flagReg1, 0x03f); // Remember not to modify upper 16 bits because of mac flag
OR16ItoR (flagReg1, (_Imm12_ & 0xfc0));
}
+ pass3 { mVUlog("FSSET"); }
}
//------------------------------------------------------------------
@@ -561,9 +589,8 @@ microVUf(void) mVU_FSSET() {
microVUf(void) mVU_IADD() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeIALU1(_Fd_, _Fs_, _Ft_); }
- else {
- mVUlog("IADD");
+ pass1 { mVUanalyzeIALU1(_Fd_, _Fs_, _Ft_); }
+ pass2 {
mVUallocVIa(gprT1, _Fs_);
if (_Ft_ != _Fs_) {
mVUallocVIa(gprT2, _Ft_);
@@ -572,35 +599,35 @@ microVUf(void) mVU_IADD() {
else ADD16RtoR(gprT1, gprT1);
mVUallocVIb(gprT1, _Fd_);
}
+ pass3 { mVUlog("IADD"); }
}
microVUf(void) mVU_IADDI() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeIALU2(_Fs_, _Ft_); }
- else {
- mVUlog("IADDI");
+ pass1 { mVUanalyzeIALU2(_Fs_, _Ft_); }
+ pass2 {
mVUallocVIa(gprT1, _Fs_);
ADD16ItoR(gprT1, _Imm5_);
mVUallocVIb(gprT1, _Ft_);
}
+ pass3 { mVUlog("IADDI"); }
}
microVUf(void) mVU_IADDIU() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeIALU2(_Fs_, _Ft_); }
- else {
- mVUlog("IADDIU");
+ pass1 { mVUanalyzeIALU2(_Fs_, _Ft_); }
+ pass2 {
mVUallocVIa(gprT1, _Fs_);
ADD16ItoR(gprT1, _Imm15_);
mVUallocVIb(gprT1, _Ft_);
}
+ pass3 { mVUlog("IADDIU"); }
}
microVUf(void) mVU_IAND() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeIALU1(_Fd_, _Fs_, _Ft_); }
- else {
- mVUlog("IAND");
+ pass1 { mVUanalyzeIALU1(_Fd_, _Fs_, _Ft_); }
+ pass2 {
mVUallocVIa(gprT1, _Fs_);
if (_Ft_ != _Fs_) {
mVUallocVIa(gprT2, _Ft_);
@@ -608,13 +635,13 @@ microVUf(void) mVU_IAND() {
}
mVUallocVIb(gprT1, _Fd_);
}
+ pass3 { mVUlog("IAND"); }
}
microVUf(void) mVU_IOR() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeIALU1(_Fd_, _Fs_, _Ft_); }
- else {
- mVUlog("IOR");
+ pass1 { mVUanalyzeIALU1(_Fd_, _Fs_, _Ft_); }
+ pass2 {
mVUallocVIa(gprT1, _Fs_);
if (_Ft_ != _Fs_) {
mVUallocVIa(gprT2, _Ft_);
@@ -622,13 +649,13 @@ microVUf(void) mVU_IOR() {
}
mVUallocVIb(gprT1, _Fd_);
}
+ pass3 { mVUlog("IOR"); }
}
microVUf(void) mVU_ISUB() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeIALU1(_Fd_, _Fs_, _Ft_); }
- else {
- mVUlog("ISUB");
+ pass1 { mVUanalyzeIALU1(_Fd_, _Fs_, _Ft_); }
+ pass2 {
if (_Ft_ != _Fs_) {
mVUallocVIa(gprT1, _Fs_);
mVUallocVIa(gprT2, _Ft_);
@@ -640,17 +667,18 @@ microVUf(void) mVU_ISUB() {
}
else { PXORRtoR(mmVI(_Fd_), mmVI(_Fd_)); }
}
+ pass3 { mVUlog("ISUB"); }
}
microVUf(void) mVU_ISUBIU() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeIALU2(_Fs_, _Ft_); }
- else {
- mVUlog("ISUBIU");
+ pass1 { mVUanalyzeIALU2(_Fs_, _Ft_); }
+ pass2 {
mVUallocVIa(gprT1, _Fs_);
SUB16ItoR(gprT1, _Imm15_);
mVUallocVIb(gprT1, _Ft_);
}
+ pass3 { mVUlog("ISUBIU"); }
}
//------------------------------------------------------------------
@@ -659,56 +687,56 @@ microVUf(void) mVU_ISUBIU() {
microVUf(void) mVU_MFIR() {
microVU* mVU = mVUx;
- if (!recPass) { if (!_Ft_) { mVUinfo |= _isNOP; } analyzeVIreg1(_Fs_); analyzeReg2(_Ft_); }
- else {
- mVUlog("MFIR");
+ pass1 { if (!_Ft_) { mVUinfo |= _isNOP; } analyzeVIreg1(_Fs_); analyzeReg2(_Ft_); }
+ pass2 {
mVUallocVIa(gprT1, _Fs_);
MOVSX32R16toR(gprT1, gprT1);
SSE2_MOVD_R_to_XMM(xmmT1, gprT1);
if (!_XYZW_SS) { mVUunpack_xyzw(xmmT1, xmmT1, 0); }
mVUsaveReg(xmmT1, (uptr)&mVU->regs->VF[_Ft_].UL[0], _X_Y_Z_W, 1);
}
+ pass3 { mVUlog("MFIR"); }
}
microVUf(void) mVU_MFP() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeMFP(_Ft_); }
- else {
- mVUlog("MFP");
+ pass1 { mVUanalyzeMFP(_Ft_); }
+ pass2 {
getPreg(xmmFt);
mVUsaveReg(xmmFt, (uptr)&mVU->regs->VF[_Ft_].UL[0], _X_Y_Z_W, 1);
}
+ pass3 { mVUlog("MFP"); }
}
microVUf(void) mVU_MOVE() {
microVU* mVU = mVUx;
- if (!recPass) { if (!_Ft_ || (_Ft_ == _Fs_)) { mVUinfo |= _isNOP; } analyzeReg1(_Fs_); analyzeReg2(_Ft_); }
- else {
- mVUlog("MOVE");
+ pass1 { if (!_Ft_ || (_Ft_ == _Fs_)) { mVUinfo |= _isNOP; } analyzeReg1(_Fs_); analyzeReg2(_Ft_); }
+ pass2 {
mVUloadReg(xmmT1, (uptr)&mVU->regs->VF[_Fs_].UL[0], _X_Y_Z_W);
mVUsaveReg(xmmT1, (uptr)&mVU->regs->VF[_Ft_].UL[0], _X_Y_Z_W, 1);
}
+ pass3 { mVUlog("MOVE"); }
}
microVUf(void) mVU_MR32() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeMR32(_Fs_, _Ft_); }
- else {
- mVUlog("MR32");
+ pass1 { mVUanalyzeMR32(_Fs_, _Ft_); }
+ pass2 {
mVUloadReg(xmmT1, (uptr)&mVU->regs->VF[_Fs_].UL[0], (_X_Y_Z_W == 8) ? 4 : 15);
if (_X_Y_Z_W != 8) { SSE2_PSHUFD_XMM_to_XMM(xmmT1, xmmT1, 0x39); }
mVUsaveReg(xmmT1, (uptr)&mVU->regs->VF[_Ft_].UL[0], _X_Y_Z_W, 0);
}
+ pass3 { mVUlog("MR32"); }
}
microVUf(void) mVU_MTIR() {
microVU* mVU = mVUx;
- if (!recPass) { if (!_Ft_) { mVUinfo |= _isNOP; } analyzeReg5(_Fs_, _Fsf_); analyzeVIreg2(_Ft_, 1); }
- else {
- mVUlog("MTIR");
+ pass1 { if (!_Ft_) { mVUinfo |= _isNOP; } analyzeReg5(_Fs_, _Fsf_); analyzeVIreg2(_Ft_, 1); }
+ pass2 {
MOVZX32M16toR(gprT1, (uptr)&mVU->regs->VF[_Fs_].UL[_Fsf_]);
mVUallocVIb(gprT1, _Ft_);
}
+ pass3 { mVUlog("MTIR"); }
}
//------------------------------------------------------------------
@@ -717,9 +745,8 @@ microVUf(void) mVU_MTIR() {
microVUf(void) mVU_ILW() {
microVU* mVU = mVUx;
- if (!recPass) { if (!_Ft_) { mVUinfo |= _isNOP; } analyzeVIreg1(_Fs_); analyzeVIreg2(_Ft_, 4); }
- else {
- mVUlog("ILW");
+ pass1 { if (!_Ft_) { mVUinfo |= _isNOP; } analyzeVIreg1(_Fs_); analyzeVIreg2(_Ft_, 4); }
+ pass2 {
if (!_Fs_) {
MOVZX32M16toR(gprT1, (uptr)mVU->regs->Mem + getVUmem(_Imm11_) + offsetSS);
mVUallocVIb(gprT1, _Ft_);
@@ -733,13 +760,13 @@ microVUf(void) mVU_ILW() {
mVUallocVIb(gprT1, _Ft_);
}
}
+ pass3 { mVUlog("ILW"); }
}
microVUf(void) mVU_ILWR() {
microVU* mVU = mVUx;
- if (!recPass) { if (!_Ft_) { mVUinfo |= _isNOP; } analyzeVIreg1(_Fs_); analyzeVIreg2(_Ft_, 4); }
- else {
- mVUlog("ILWR");
+ pass1 { if (!_Ft_) { mVUinfo |= _isNOP; } analyzeVIreg1(_Fs_); analyzeVIreg2(_Ft_, 4); }
+ pass2 {
if (!_Fs_) {
MOVZX32M16toR(gprT1, (uptr)mVU->regs->Mem + offsetSS);
mVUallocVIb(gprT1, _Ft_);
@@ -752,6 +779,7 @@ microVUf(void) mVU_ILWR() {
mVUallocVIb(gprT1, _Ft_);
}
}
+ pass3 { mVUlog("ILWR"); }
}
//------------------------------------------------------------------
@@ -760,9 +788,8 @@ microVUf(void) mVU_ILWR() {
microVUf(void) mVU_ISW() {
microVU* mVU = mVUx;
- if (!recPass) { analyzeVIreg1(_Fs_); analyzeVIreg1(_Ft_); }
- else {
- mVUlog("ISW");
+ pass1 { analyzeVIreg1(_Fs_); analyzeVIreg1(_Ft_); }
+ pass2 {
if (!_Fs_) {
int imm = getVUmem(_Imm11_);
mVUallocVIa(gprT1, _Ft_);
@@ -782,13 +809,13 @@ microVUf(void) mVU_ISW() {
if (_W) MOV32RtoRm(gprT1, gprT2, (uptr)mVU->regs->Mem+12);
}
}
+ pass3 { mVUlog("ISW"); }
}
microVUf(void) mVU_ISWR() {
microVU* mVU = mVUx;
- if (!recPass) { analyzeVIreg1(_Fs_); analyzeVIreg1(_Ft_); }
- else {
- mVUlog("ISWR");
+ pass1 { analyzeVIreg1(_Fs_); analyzeVIreg1(_Ft_); }
+ pass2 {
if (!_Fs_) {
mVUallocVIa(gprT1, _Ft_);
if (_X) MOV32RtoM((uptr)mVU->regs->Mem, gprT1);
@@ -806,6 +833,7 @@ microVUf(void) mVU_ISWR() {
if (_W) MOV32RtoRm(gprT1, gprT2, (uptr)mVU->regs->Mem+12);
}
}
+ pass3 { mVUlog("ISWR"); }
}
//------------------------------------------------------------------
@@ -814,15 +842,13 @@ microVUf(void) mVU_ISWR() {
microVUf(void) mVU_LQ() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeLQ(_Ft_, _Fs_, 0); }
- else {
+ pass1 { mVUanalyzeLQ(_Ft_, _Fs_, 0); }
+ pass2 {
if (!_Fs_) {
- mVUlog("LQ1");
mVUloadReg(xmmFt, (uptr)mVU->regs->Mem + getVUmem(_Imm11_), _X_Y_Z_W);
mVUsaveReg(xmmFt, (uptr)&mVU->regs->VF[_Ft_].UL[0], _X_Y_Z_W, 1);
}
else {
- mVUlog("LQ2");
mVUallocVIa(gprT1, _Fs_);
ADD32ItoR(gprT1, _Imm11_);
mVUaddrFix(gprT1);
@@ -830,19 +856,18 @@ microVUf(void) mVU_LQ() {
mVUsaveReg(xmmFt, (uptr)&mVU->regs->VF[_Ft_].UL[0], _X_Y_Z_W, 1);
}
}
+ pass3 { mVUlog("LQ"); }
}
microVUf(void) mVU_LQD() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeLQ(_Ft_, _Fs_, 1); }
- else {
+ pass1 { mVUanalyzeLQ(_Ft_, _Fs_, 1); }
+ pass2 {
if (!_Fs_ && !noWriteVF) {
- mVUlog("LQD1");
mVUloadReg(xmmFt, (uptr)mVU->regs->Mem, _X_Y_Z_W);
mVUsaveReg(xmmFt, (uptr)&mVU->regs->VF[_Ft_].UL[0], _X_Y_Z_W, 1);
}
else {
- mVUlog("LQD2");
mVUallocVIa(gprT1, _Fs_);
SUB16ItoR(gprT1, 1);
mVUallocVIb(gprT1, _Fs_);
@@ -853,19 +878,18 @@ microVUf(void) mVU_LQD() {
}
}
}
+ pass3 { mVUlog("LQD"); }
}
microVUf(void) mVU_LQI() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeLQ(_Ft_, _Fs_, 1); }
- else {
+ pass1 { mVUanalyzeLQ(_Ft_, _Fs_, 1); }
+ pass2 {
if (!_Fs_ && !noWriteVF) {
- mVUlog("LQI1");
mVUloadReg(xmmFt, (uptr)mVU->regs->Mem, _X_Y_Z_W);
mVUsaveReg(xmmFt, (uptr)&mVU->regs->VF[_Ft_].UL[0], _X_Y_Z_W, 1);
}
else {
- mVUlog("LQI2");
mVUallocVIa((!noWriteVF) ? gprT1 : gprT2, _Fs_);
if (!noWriteVF) {
MOV32RtoR(gprT2, gprT1);
@@ -877,6 +901,7 @@ microVUf(void) mVU_LQI() {
mVUallocVIb(gprT2, _Fs_);
}
}
+ pass3 { mVUlog("LQI"); }
}
//------------------------------------------------------------------
@@ -885,9 +910,8 @@ microVUf(void) mVU_LQI() {
microVUf(void) mVU_SQ() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeSQ(_Fs_, _Ft_, 0); }
- else {
- mVUlog("SQ");
+ pass1 { mVUanalyzeSQ(_Fs_, _Ft_, 0); }
+ pass2 {
if (!_Ft_) {
getReg7(xmmFs, _Fs_);
mVUsaveReg(xmmFs, (uptr)mVU->regs->Mem + getVUmem(_Imm11_), _X_Y_Z_W, 1);
@@ -900,13 +924,13 @@ microVUf(void) mVU_SQ() {
mVUsaveReg2(xmmFs, gprT1, (uptr)mVU->regs->Mem, _X_Y_Z_W);
}
}
+ pass3 { mVUlog("SQ"); }
}
microVUf(void) mVU_SQD() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeSQ(_Fs_, _Ft_, 1); }
- else {
- mVUlog("SQD");
+ pass1 { mVUanalyzeSQ(_Fs_, _Ft_, 1); }
+ pass2 {
if (!_Ft_) {
getReg7(xmmFs, _Fs_);
mVUsaveReg(xmmFs, (uptr)mVU->regs->Mem, _X_Y_Z_W, 1);
@@ -920,13 +944,13 @@ microVUf(void) mVU_SQD() {
mVUsaveReg2(xmmFs, gprT1, (uptr)mVU->regs->Mem, _X_Y_Z_W);
}
}
+ pass3 { mVUlog("SQD"); }
}
microVUf(void) mVU_SQI() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeSQ(_Fs_, _Ft_, 1); }
- else {
- mVUlog("SQI");
+ pass1 { mVUanalyzeSQ(_Fs_, _Ft_, 1); }
+ pass2 {
if (!_Ft_) {
getReg7(xmmFs, _Fs_);
mVUsaveReg(xmmFs, (uptr)mVU->regs->Mem, _X_Y_Z_W, 1);
@@ -941,6 +965,7 @@ microVUf(void) mVU_SQI() {
mVUallocVIb(gprT2, _Ft_); // ToDo: Backup to memory check.
}
}
+ pass3 { mVUlog("SQI"); }
}
//------------------------------------------------------------------
@@ -949,9 +974,8 @@ microVUf(void) mVU_SQI() {
microVUf(void) mVU_RINIT() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeR1(_Fs_, _Fsf_); }
- else {
- mVUlog("RINIT");
+ pass1 { mVUanalyzeR1(_Fs_, _Fsf_); }
+ pass2 {
if (_Fs_ || (_Fsf_ == 3)) {
getReg8(gprR, _Fs_, _Fsf_);
AND32ItoR(gprR, 0x007fffff);
@@ -959,6 +983,7 @@ microVUf(void) mVU_RINIT() {
}
else MOV32ItoR(gprR, 0x3f800000);
}
+ pass3 { mVUlog("RINIT"); }
}
microVUt(void) mVU_RGET_() {
@@ -973,15 +998,15 @@ microVUt(void) mVU_RGET_() {
microVUf(void) mVU_RGET() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeR2(_Ft_, 1); }
- else { mVUlog("RGET"); mVU_RGET_(); }
+ pass1 { mVUanalyzeR2(_Ft_, 1); }
+ pass2 { mVU_RGET_(); }
+ pass3 { mVUlog("RGET"); }
}
microVUf(void) mVU_RNEXT() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeR2(_Ft_, 0); }
- else {
- mVUlog("RNEXT");
+ pass1 { mVUanalyzeR2(_Ft_, 0); }
+ pass2 {
// algorithm from www.project-fao.org
MOV32RtoR(gprT1, gprR);
SHR32ItoR(gprT1, 4);
@@ -998,19 +1023,20 @@ microVUf(void) mVU_RNEXT() {
OR32ItoR (gprR, 0x3f800000);
mVU_RGET_();
}
+ pass3 { mVUlog("RNEXT"); }
}
microVUf(void) mVU_RXOR() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeR1(_Fs_, _Fsf_); }
- else {
- mVUlog("RXOR");
+ pass1 { mVUanalyzeR1(_Fs_, _Fsf_); }
+ pass2 {
if (_Fs_ || (_Fsf_ == 3)) {
getReg8(gprT1, _Fs_, _Fsf_);
AND32ItoR(gprT1, 0x7fffff);
XOR32RtoR(gprR, gprT1);
}
}
+ pass3 { mVUlog("RXOR"); }
}
//------------------------------------------------------------------
@@ -1019,12 +1045,14 @@ microVUf(void) mVU_RXOR() {
microVUf(void) mVU_WAITP() {
microVU* mVU = mVUx;
- if (!recPass) { mVUstall = aMax(mVUstall, ((mVUregs.p) ? (mVUregs.p - 1) : 0)); }
+ pass1 { mVUstall = aMax(mVUstall, ((mVUregs.p) ? (mVUregs.p - 1) : 0)); }
+ pass3 { mVUlog("WAITP"); }
}
microVUf(void) mVU_WAITQ() {
microVU* mVU = mVUx;
- if (!recPass) { mVUstall = aMax(mVUstall, mVUregs.q); }
+ pass1 { mVUstall = aMax(mVUstall, mVUregs.q); }
+ pass3 { mVUlog("WAITQ"); }
}
//------------------------------------------------------------------
@@ -1033,20 +1061,22 @@ microVUf(void) mVU_WAITQ() {
microVUf(void) mVU_XTOP() {
microVU* mVU = mVUx;
- if (!recPass) { if (!_Ft_) { mVUinfo |= _isNOP; } analyzeVIreg2(_Ft_, 1); }
- else {
+ pass1 { if (!_Ft_) { mVUinfo |= _isNOP; } analyzeVIreg2(_Ft_, 1); }
+ pass2 {
MOVZX32M16toR(gprT1, (uptr)&mVU->regs->vifRegs->top);
mVUallocVIb(gprT1, _Ft_);
}
+ pass3 { mVUlog("XTOP"); }
}
microVUf(void) mVU_XITOP() {
microVU* mVU = mVUx;
- if (!recPass) { if (!_Ft_) { mVUinfo |= _isNOP; } analyzeVIreg2(_Ft_, 1); }
- else {
+ pass1 { if (!_Ft_) { mVUinfo |= _isNOP; } analyzeVIreg2(_Ft_, 1); }
+ pass2 {
MOVZX32M16toR(gprT1, (uptr)&mVU->regs->vifRegs->itop);
mVUallocVIb(gprT1, _Ft_);
}
+ pass3 { mVUlog("XITOP"); }
}
//------------------------------------------------------------------
@@ -1063,14 +1093,15 @@ void __fastcall mVU_XGKICK_(u32 addr) {
microVUf(void) mVU_XGKICK() {
microVU* mVU = mVUx;
- if (!recPass) { mVUanalyzeXGkick(_Fs_, 4); }
- else {
- mVUlog("XGkick");
+ pass1 { mVUanalyzeXGkick(_Fs_, 4); }
+ pass2 {
+ mVUprint("XGkick");
mVUallocVIa(gprT2, _Fs_); // gprT2 = ECX for __fastcall
PUSH32R(gprR); // gprR = EDX is volatile so backup
CALLFunc((uptr)mVU_XGKICK_);
POP32R(gprR); // Restore
}
+ pass3 { mVUlog("XGKICK"); }
}
//------------------------------------------------------------------
@@ -1080,98 +1111,107 @@ microVUf(void) mVU_XGKICK() {
microVUf(void) mVU_B() {
microVU* mVU = mVUx;
mVUbranch = 1;
+ pass3 { mVUlog("B"); }
}
microVUf(void) mVU_BAL() {
microVU* mVU = mVUx;
mVUbranch = 2;
- if (!recPass) { analyzeVIreg2(_Ft_, 1); }
- else {
+ pass1 { analyzeVIreg2(_Ft_, 1); }
+ pass2 {
MOV32ItoR(gprT1, bSaveAddr);
mVUallocVIb(gprT1, _Ft_);
// Note: Not sure if the lower instruction in the branch-delay slot
// should read the previous VI-value or the VI-value resulting from this branch.
// This code does the latter...
}
+ pass3 { mVUlog("BAL"); }
}
microVUf(void) mVU_IBEQ() {
microVU* mVU = mVUx;
mVUbranch = 3;
- if (!recPass) { mVUanalyzeBranch2(_Fs_, _Ft_); }
- else {
+ pass1 { mVUanalyzeBranch2(_Fs_, _Ft_); }
+ pass2 {
if (memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup[0]);
else mVUallocVIa(gprT1, _Fs_);
if (memReadIt) XOR32MtoR(gprT1, (uptr)&mVU->VIbackup[0]);
else { mVUallocVIa(gprT2, _Ft_); XOR32RtoR(gprT1, gprT2); }
MOV32RtoM((uptr)&mVU->branch, gprT1);
}
+ pass3 { mVUlog("IBEQ"); }
}
microVUf(void) mVU_IBGEZ() {
microVU* mVU = mVUx;
mVUbranch = 4;
- if (!recPass) { mVUanalyzeBranch1(_Fs_); }
- else {
+ pass1 { mVUanalyzeBranch1(_Fs_); }
+ pass2 {
if (memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup[0]);
else mVUallocVIa(gprT1, _Fs_);
MOV32RtoM((uptr)&mVU->branch, gprT1);
}
+ pass3 { mVUlog("IBGEZ"); }
}
microVUf(void) mVU_IBGTZ() {
microVU* mVU = mVUx;
mVUbranch = 5;
- if (!recPass) { mVUanalyzeBranch1(_Fs_); }
- else {
+ pass1 { mVUanalyzeBranch1(_Fs_); }
+ pass2 {
if (memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup[0]);
else mVUallocVIa(gprT1, _Fs_);
MOV32RtoM((uptr)&mVU->branch, gprT1);
}
+ pass3 { mVUlog("IBGTZ"); }
}
microVUf(void) mVU_IBLEZ() {
microVU* mVU = mVUx;
mVUbranch = 6;
- if (!recPass) { mVUanalyzeBranch1(_Fs_); }
- else {
+ pass1 { mVUanalyzeBranch1(_Fs_); }
+ pass2 {
if (memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup[0]);
else mVUallocVIa(gprT1, _Fs_);
MOV32RtoM((uptr)&mVU->branch, gprT1);
}
+ pass3 { mVUlog("IBLEZ"); }
}
microVUf(void) mVU_IBLTZ() {
microVU* mVU = mVUx;
mVUbranch = 7;
- if (!recPass) { mVUanalyzeBranch1(_Fs_); }
- else {
+ pass1 { mVUanalyzeBranch1(_Fs_); }
+ pass2 {
if (memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup[0]);
else mVUallocVIa(gprT1, _Fs_);
MOV32RtoM((uptr)&mVU->branch, gprT1);
}
+ pass3 { mVUlog("IBLTZ"); }
}
microVUf(void) mVU_IBNE() {
microVU* mVU = mVUx;
mVUbranch = 8;
- if (!recPass) { mVUanalyzeBranch2(_Fs_, _Ft_); }
- else {
+ pass1 { mVUanalyzeBranch2(_Fs_, _Ft_); }
+ pass2 {
if (memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup[0]);
else mVUallocVIa(gprT1, _Fs_);
if (memReadIt) XOR32MtoR(gprT1, (uptr)&mVU->VIbackup[0]);
else { mVUallocVIa(gprT2, _Ft_); XOR32RtoR(gprT1, gprT2); }
MOV32RtoM((uptr)&mVU->branch, gprT1);
}
+ pass3 { mVUlog("IBNE"); }
}
microVUf(void) mVU_JR() {
microVU* mVU = mVUx;
mVUbranch = 9;
- if (!recPass) { mVUanalyzeBranch1(_Fs_); }
- else {
+ pass1 { mVUanalyzeBranch1(_Fs_); }
+ pass2 {
if (memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup[0]);
else mVUallocVIa(gprT1, _Fs_);
MOV32RtoM((uptr)&mVU->branch, gprT1);
}
+ pass3 { mVUlog("JR"); }
}
microVUf(void) mVU_JALR() {
microVU* mVU = mVUx;
mVUbranch = 10;
- if (!recPass) { mVUanalyzeBranch1(_Fs_); analyzeVIreg2(_Ft_, 1); }
- else {
+ pass1 { mVUanalyzeBranch1(_Fs_); analyzeVIreg2(_Ft_, 1); }
+ pass2 {
if (memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup[0]);
else mVUallocVIa(gprT1, _Fs_);
MOV32RtoM((uptr)&mVU->branch, gprT1);
@@ -1181,6 +1221,7 @@ microVUf(void) mVU_JALR() {
// should read the previous VI-value or the VI-value resulting from this branch.
// This code does the latter...
}
+ pass3 { mVUlog("JALR"); }
}
#endif //PCSX2_MICROVU
diff --git a/pcsx2/x86/microVU_Misc.h b/pcsx2/x86/microVU_Misc.h
index 2f0ea1c8ad..5046494b53 100644
--- a/pcsx2/x86/microVU_Misc.h
+++ b/pcsx2/x86/microVU_Misc.h
@@ -138,6 +138,10 @@ declareAllVariables
#define microVUf(aType) template aType
#define microVUq(aType) template __forceinline aType
+#define pass1 if (recPass == 0)
+#define pass2 if (recPass == 1)
+#define pass3 if (recPass == 2)
+
#define mVUcurProg mVU->prog.prog[mVU->prog.cur]
#define mVUblocks mVU->prog.prog[mVU->prog.cur].block
#define mVUallocInfo mVU->prog.prog[mVU->prog.cur].allocInfo
@@ -226,7 +230,7 @@ declareAllVariables
#define mmVI(_VIreg_) (_VIreg_ - 1)
#ifdef mVUdebug
-#define mVUlog Console::Status
+#define mVUprint Console::Status
#define mVUdebug1() { \
if (curI & _Ibit_) { SysPrintf("microVU: I-bit set!\n"); } \
if (curI & _Ebit_) { SysPrintf("microVU: E-bit set!\n"); } \
@@ -235,10 +239,20 @@ declareAllVariables
if (curI & _Tbit_) { SysPrintf("microVU: T-bit set!\n"); } \
}
#else
-#define mVUlog 0&&
+#define mVUprint 0&&
#define mVUdebug1() {}
#endif
+#ifdef mVUlogProg
+#define mVUlog __mVULog
+#define mVUsetupLog __mVUsetupLog
+#define mVUdumpProg __mVUdumpProgram
+#else
+#define mVUlog 0&&
+#define mVUsetupLog()
+#define mVUdumpProg 0&&
+#endif
+
#define mVUcacheCheck(ptr, start, limit) { \
uptr diff = ptr - start; \
if (diff >= limit) { Console::Error("microVU Error: Program went over it's cache limit. Size = %x", params diff); } \
diff --git a/pcsx2/x86/microVU_Tables.inl b/pcsx2/x86/microVU_Tables.inl
index c6e76ab38e..41b8b9a1c7 100644
--- a/pcsx2/x86/microVU_Tables.inl
+++ b/pcsx2/x86/microVU_Tables.inl
@@ -178,6 +178,76 @@ void (* mVULOWER_OPCODE11 [128])() = {
mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>,
mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>,
};
+
+void (* mVULOWER_OPCODE02 [128])() = {
+ mVU_LQ<0,2> , mVU_SQ<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVU_ILW<0,2> , mVU_ISW<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVU_IADDIU<0,2> , mVU_ISUBIU<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVU_FCEQ<0,2> , mVU_FCSET<0,2> , mVU_FCAND<0,2> , mVU_FCOR<0,2>, /* 0x10 */
+ mVU_FSEQ<0,2> , mVU_FSSET<0,2> , mVU_FSAND<0,2> , mVU_FSOR<0,2>,
+ mVU_FMEQ<0,2> , mVUunknown<0,2> , mVU_FMAND<0,2> , mVU_FMOR<0,2>,
+ mVU_FCGET<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVU_B<0,2> , mVU_BAL<0,2> , mVUunknown<0,2> , mVUunknown<0,2>, /* 0x20 */
+ mVU_JR<0,2> , mVU_JALR<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVU_IBEQ<0,2> , mVU_IBNE<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVU_IBLTZ<0,2> , mVU_IBGTZ<0,2> , mVU_IBLEZ<0,2> , mVU_IBGEZ<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>, /* 0x30 */
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVULowerOP<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>, /* 0x40*/
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>, /* 0x50 */
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>, /* 0x60 */
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>, /* 0x70 */
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+};
+
+void (* mVULOWER_OPCODE12 [128])() = {
+ mVU_LQ<1,2> , mVU_SQ<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVU_ILW<1,2> , mVU_ISW<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVU_IADDIU<1,2> , mVU_ISUBIU<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVU_FCEQ<1,2> , mVU_FCSET<1,2> , mVU_FCAND<1,2> , mVU_FCOR<1,2>, /* 0x10 */
+ mVU_FSEQ<1,2> , mVU_FSSET<1,2> , mVU_FSAND<1,2> , mVU_FSOR<1,2>,
+ mVU_FMEQ<1,2> , mVUunknown<1,2> , mVU_FMAND<1,2> , mVU_FMOR<1,2>,
+ mVU_FCGET<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVU_B<1,2> , mVU_BAL<1,2> , mVUunknown<1,2> , mVUunknown<1,2>, /* 0x20 */
+ mVU_JR<1,2> , mVU_JALR<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVU_IBEQ<1,2> , mVU_IBNE<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVU_IBLTZ<1,2> , mVU_IBGTZ<1,2> , mVU_IBLEZ<1,2> , mVU_IBGEZ<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>, /* 0x30 */
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVULowerOP<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>, /* 0x40*/
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>, /* 0x50 */
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>, /* 0x60 */
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>, /* 0x70 */
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+};
//------------------------------------------------------------------
//------------------------------------------------------------------
@@ -226,6 +296,28 @@ void (* mVULowerOP_T3_00_OPCODE11 [32])() = {
mVUunknown<1,1> , mVU_MFP<1,1> , mVU_XTOP<1,1> , mVU_XGKICK<1,1>,
mVU_ESADD<1,1> , mVU_EATANxy<1,1> , mVU_ESQRT<1,1> , mVU_ESIN<1,1>,
};
+
+void (* mVULowerOP_T3_00_OPCODE02 [32])() = {
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVU_MOVE<0,2> , mVU_LQI<0,2> , mVU_DIV<0,2> , mVU_MTIR<0,2>,
+ mVU_RNEXT<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>, /* 0x10 */
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVU_MFP<0,2> , mVU_XTOP<0,2> , mVU_XGKICK<0,2>,
+ mVU_ESADD<0,2> , mVU_EATANxy<0,2> , mVU_ESQRT<0,2> , mVU_ESIN<0,2>,
+};
+
+void (* mVULowerOP_T3_00_OPCODE12 [32])() = {
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVU_MOVE<1,2> , mVU_LQI<1,2> , mVU_DIV<1,2> , mVU_MTIR<1,2>,
+ mVU_RNEXT<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>, /* 0x10 */
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVU_MFP<1,2> , mVU_XTOP<1,2> , mVU_XGKICK<1,2>,
+ mVU_ESADD<1,2> , mVU_EATANxy<1,2> , mVU_ESQRT<1,2> , mVU_ESIN<1,2>,
+};
//------------------------------------------------------------------
//------------------------------------------------------------------
@@ -274,6 +366,29 @@ void (* mVULowerOP_T3_01_OPCODE11 [32])() = {
mVUunknown<1,1> , mVUunknown<1,1> , mVU_XITOP<1,1> , mVUunknown<1,1>,
mVU_ERSADD<1,1> , mVU_EATANxz<1,1> , mVU_ERSQRT<1,1> , mVU_EATAN<1,1>,
};
+
+void (* mVULowerOP_T3_01_OPCODE02 [32])() = {
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVU_MR32<0,2> , mVU_SQI<0,2> , mVU_SQRT<0,2> , mVU_MFIR<0,2>,
+ mVU_RGET<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>, /* 0x10 */
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVU_XITOP<0,2> , mVUunknown<0,2>,
+ mVU_ERSADD<0,2> , mVU_EATANxz<0,2> , mVU_ERSQRT<0,2> , mVU_EATAN<0,2>,
+};
+
+void (* mVULowerOP_T3_01_OPCODE12 [32])() = {
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVU_MR32<1,2> , mVU_SQI<1,2> , mVU_SQRT<1,2> , mVU_MFIR<1,2>,
+ mVU_RGET<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>, /* 0x10 */
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVU_XITOP<1,2> , mVUunknown<1,2>,
+ mVU_ERSADD<1,2> , mVU_EATANxz<1,2> , mVU_ERSQRT<1,2> , mVU_EATAN<1,2>,
+};
+
//------------------------------------------------------------------
//------------------------------------------------------------------
@@ -322,6 +437,28 @@ void (* mVULowerOP_T3_10_OPCODE11 [32])() = {
mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>,
mVU_ELENG<1,1> , mVU_ESUM<1,1> , mVU_ERCPR<1,1> , mVU_EEXP<1,1>,
};
+
+void (* mVULowerOP_T3_10_OPCODE02 [32])() = {
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVU_LQD<0,2> , mVU_RSQRT<0,2> , mVU_ILWR<0,2>,
+ mVU_RINIT<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>, /* 0x10 */
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVU_ELENG<0,2> , mVU_ESUM<0,2> , mVU_ERCPR<0,2> , mVU_EEXP<0,2>,
+};
+
+void (* mVULowerOP_T3_10_OPCODE12 [32])() = {
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVU_LQD<1,2> , mVU_RSQRT<1,2> , mVU_ILWR<1,2>,
+ mVU_RINIT<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>, /* 0x10 */
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVU_ELENG<1,2> , mVU_ESUM<1,2> , mVU_ERCPR<1,2> , mVU_EEXP<1,2>,
+};
//------------------------------------------------------------------
//------------------------------------------------------------------
@@ -370,6 +507,28 @@ void (* mVULowerOP_T3_11_OPCODE11 [32])() = {
mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>,
mVU_ERLENG<1,1> , mVUunknown<1,1> , mVU_WAITP<1,1> , mVUunknown<1,1>,
};
+
+void (* mVULowerOP_T3_11_OPCODE02 [32])() = {
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVU_SQD<0,2> , mVU_WAITQ<0,2> , mVU_ISWR<0,2>,
+ mVU_RXOR<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>, /* 0x10 */
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVU_ERLENG<0,2> , mVUunknown<0,2> , mVU_WAITP<0,2> , mVUunknown<0,2>,
+};
+
+void (* mVULowerOP_T3_11_OPCODE12 [32])() = {
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVU_SQD<1,2> , mVU_WAITQ<1,2> , mVU_ISWR<1,2>,
+ mVU_RXOR<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>, /* 0x10 */
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVU_ERLENG<1,2> , mVUunknown<1,2> , mVU_WAITP<1,2> , mVUunknown<1,2>,
+};
//------------------------------------------------------------------
//------------------------------------------------------------------
@@ -450,6 +609,44 @@ void (* mVULowerOP_OPCODE11 [64])() = {
mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>,
mVULowerOP_T3_00<1,1>, mVULowerOP_T3_01<1,1>, mVULowerOP_T3_10<1,1>, mVULowerOP_T3_11<1,1>,
};
+
+void (* mVULowerOP_OPCODE02 [64])() = {
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>, /* 0x10 */
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>, /* 0x20 */
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVU_IADD<0,2> , mVU_ISUB<0,2> , mVU_IADDI<0,2> , mVUunknown<0,2>, /* 0x30 */
+ mVU_IAND<0,2> , mVU_IOR<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVULowerOP_T3_00<0,2>, mVULowerOP_T3_01<0,2>, mVULowerOP_T3_10<0,2>, mVULowerOP_T3_11<0,2>,
+};
+
+void (* mVULowerOP_OPCODE12 [64])() = {
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>, /* 0x10 */
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>, /* 0x20 */
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVU_IADD<1,2> , mVU_ISUB<1,2> , mVU_IADDI<1,2> , mVUunknown<1,2>, /* 0x30 */
+ mVU_IAND<1,2> , mVU_IOR<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVULowerOP_T3_00<1,2>, mVULowerOP_T3_01<1,2>, mVULowerOP_T3_10<1,2>, mVULowerOP_T3_11<1,2>,
+};
//------------------------------------------------------------------
//------------------------------------------------------------------
@@ -530,6 +727,44 @@ void (* mVU_UPPER_OPCODE11 [64])() = {
mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>,
mVU_UPPER_FD_00<1,1>, mVU_UPPER_FD_01<1,1>, mVU_UPPER_FD_10<1,1>, mVU_UPPER_FD_11<1,1>,
};
+
+void (* mVU_UPPER_OPCODE02 [64])() = {
+ mVU_ADDx<0,2> , mVU_ADDy<0,2> , mVU_ADDz<0,2> , mVU_ADDw<0,2>,
+ mVU_SUBx<0,2> , mVU_SUBy<0,2> , mVU_SUBz<0,2> , mVU_SUBw<0,2>,
+ mVU_MADDx<0,2> , mVU_MADDy<0,2> , mVU_MADDz<0,2> , mVU_MADDw<0,2>,
+ mVU_MSUBx<0,2> , mVU_MSUBy<0,2> , mVU_MSUBz<0,2> , mVU_MSUBw<0,2>,
+ mVU_MAXx<0,2> , mVU_MAXy<0,2> , mVU_MAXz<0,2> , mVU_MAXw<0,2>, /* 0x10 */
+ mVU_MINIx<0,2> , mVU_MINIy<0,2> , mVU_MINIz<0,2> , mVU_MINIw<0,2>,
+ mVU_MULx<0,2> , mVU_MULy<0,2> , mVU_MULz<0,2> , mVU_MULw<0,2>,
+ mVU_MULq<0,2> , mVU_MAXi<0,2> , mVU_MULi<0,2> , mVU_MINIi<0,2>,
+ mVU_ADDq<0,2> , mVU_MADDq<0,2> , mVU_ADDi<0,2> , mVU_MADDi<0,2>, /* 0x20 */
+ mVU_SUBq<0,2> , mVU_MSUBq<0,2> , mVU_SUBi<0,2> , mVU_MSUBi<0,2>,
+ mVU_ADD<0,2> , mVU_MADD<0,2> , mVU_MUL<0,2> , mVU_MAX<0,2>,
+ mVU_SUB<0,2> , mVU_MSUB<0,2> , mVU_OPMSUB<0,2> , mVU_MINI<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>, /* 0x30 */
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVU_UPPER_FD_00<0,2>, mVU_UPPER_FD_01<0,2>, mVU_UPPER_FD_10<0,2>, mVU_UPPER_FD_11<0,2>,
+};
+
+void (* mVU_UPPER_OPCODE12 [64])() = {
+ mVU_ADDx<1,2> , mVU_ADDy<1,2> , mVU_ADDz<1,2> , mVU_ADDw<1,2>,
+ mVU_SUBx<1,2> , mVU_SUBy<1,2> , mVU_SUBz<1,2> , mVU_SUBw<1,2>,
+ mVU_MADDx<1,2> , mVU_MADDy<1,2> , mVU_MADDz<1,2> , mVU_MADDw<1,2>,
+ mVU_MSUBx<1,2> , mVU_MSUBy<1,2> , mVU_MSUBz<1,2> , mVU_MSUBw<1,2>,
+ mVU_MAXx<1,2> , mVU_MAXy<1,2> , mVU_MAXz<1,2> , mVU_MAXw<1,2>, /* 0x10 */
+ mVU_MINIx<1,2> , mVU_MINIy<1,2> , mVU_MINIz<1,2> , mVU_MINIw<1,2>,
+ mVU_MULx<1,2> , mVU_MULy<1,2> , mVU_MULz<1,2> , mVU_MULw<1,2>,
+ mVU_MULq<1,2> , mVU_MAXi<1,2> , mVU_MULi<1,2> , mVU_MINIi<1,2>,
+ mVU_ADDq<1,2> , mVU_MADDq<1,2> , mVU_ADDi<1,2> , mVU_MADDi<1,2>, /* 0x20 */
+ mVU_SUBq<1,2> , mVU_MSUBq<1,2> , mVU_SUBi<1,2> , mVU_MSUBi<1,2>,
+ mVU_ADD<1,2> , mVU_MADD<1,2> , mVU_MUL<1,2> , mVU_MAX<1,2>,
+ mVU_SUB<1,2> , mVU_MSUB<1,2> , mVU_OPMSUB<1,2> , mVU_MINI<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>, /* 0x30 */
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVU_UPPER_FD_00<1,2>, mVU_UPPER_FD_01<1,2>, mVU_UPPER_FD_10<1,2>, mVU_UPPER_FD_11<1,2>,
+};
//------------------------------------------------------------------
//------------------------------------------------------------------
@@ -578,6 +813,28 @@ void (* mVU_UPPER_FD_00_TABLE11 [32])() = {
mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>,
mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>,
};
+
+void (* mVU_UPPER_FD_00_TABLE02 [32])() = {
+ mVU_ADDAx<0,2> , mVU_SUBAx<0,2> , mVU_MADDAx<0,2> , mVU_MSUBAx<0,2>,
+ mVU_ITOF0<0,2> , mVU_FTOI0<0,2> , mVU_MULAx<0,2> , mVU_MULAq<0,2>,
+ mVU_ADDAq<0,2> , mVU_SUBAq<0,2> , mVU_ADDA<0,2> , mVU_SUBA<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+};
+
+void (* mVU_UPPER_FD_00_TABLE12 [32])() = {
+ mVU_ADDAx<1,2> , mVU_SUBAx<1,2> , mVU_MADDAx<1,2> , mVU_MSUBAx<1,2>,
+ mVU_ITOF0<1,2> , mVU_FTOI0<1,2> , mVU_MULAx<1,2> , mVU_MULAq<1,2>,
+ mVU_ADDAq<1,2> , mVU_SUBAq<1,2> , mVU_ADDA<1,2> , mVU_SUBA<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+};
//------------------------------------------------------------------
//------------------------------------------------------------------
@@ -626,6 +883,28 @@ void (* mVU_UPPER_FD_01_TABLE11 [32])() = {
mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>,
mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>,
};
+
+void (* mVU_UPPER_FD_01_TABLE02 [32])() = {
+ mVU_ADDAy<0,2> , mVU_SUBAy<0,2> , mVU_MADDAy<0,2> , mVU_MSUBAy<0,2>,
+ mVU_ITOF4<0,2> , mVU_FTOI4<0,2> , mVU_MULAy<0,2> , mVU_ABS<0,2>,
+ mVU_MADDAq<0,2> , mVU_MSUBAq<0,2> , mVU_MADDA<0,2> , mVU_MSUBA<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+};
+
+void (* mVU_UPPER_FD_01_TABLE12 [32])() = {
+ mVU_ADDAy<1,2> , mVU_SUBAy<1,2> , mVU_MADDAy<1,2> , mVU_MSUBAy<1,2>,
+ mVU_ITOF4<1,2> , mVU_FTOI4<1,2> , mVU_MULAy<1,2> , mVU_ABS<1,2>,
+ mVU_MADDAq<1,2> , mVU_MSUBAq<1,2> , mVU_MADDA<1,2> , mVU_MSUBA<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+};
//------------------------------------------------------------------
//------------------------------------------------------------------
@@ -674,6 +953,28 @@ void (* mVU_UPPER_FD_10_TABLE11 [32])() = {
mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>,
mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>,
};
+
+void (* mVU_UPPER_FD_10_TABLE02 [32])() = {
+ mVU_ADDAz<0,2> , mVU_SUBAz<0,2> , mVU_MADDAz<0,2> , mVU_MSUBAz<0,2>,
+ mVU_ITOF12<0,2> , mVU_FTOI12<0,2> , mVU_MULAz<0,2> , mVU_MULAi<0,2>,
+ mVU_ADDAi<0,2> , mVU_SUBAi<0,2> , mVU_MULA<0,2> , mVU_OPMULA<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+};
+
+void (* mVU_UPPER_FD_10_TABLE12 [32])() = {
+ mVU_ADDAz<1,2> , mVU_SUBAz<1,2> , mVU_MADDAz<1,2> , mVU_MSUBAz<1,2>,
+ mVU_ITOF12<1,2> , mVU_FTOI12<1,2> , mVU_MULAz<1,2> , mVU_MULAi<1,2>,
+ mVU_ADDAi<1,2> , mVU_SUBAi<1,2> , mVU_MULA<1,2> , mVU_OPMULA<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+};
//------------------------------------------------------------------
//------------------------------------------------------------------
@@ -722,19 +1023,45 @@ void (* mVU_UPPER_FD_11_TABLE11 [32])() = {
mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>,
mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>,
};
+
+void (* mVU_UPPER_FD_11_TABLE02 [32])() = {
+ mVU_ADDAw<0,2> , mVU_SUBAw<0,2> , mVU_MADDAw<0,2> , mVU_MSUBAw<0,2>,
+ mVU_ITOF15<0,2> , mVU_FTOI15<0,2> , mVU_MULAw<0,2> , mVU_CLIP<0,2>,
+ mVU_MADDAi<0,2> , mVU_MSUBAi<0,2> , mVUunknown<0,2> , mVU_NOP<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+ mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2> , mVUunknown<0,2>,
+};
+
+void (* mVU_UPPER_FD_11_TABLE12 [32])() = {
+ mVU_ADDAw<1,2> , mVU_SUBAw<1,2> , mVU_MADDAw<1,2> , mVU_MSUBAw<1,2>,
+ mVU_ITOF15<1,2> , mVU_FTOI15<1,2> , mVU_MULAw<1,2> , mVU_CLIP<1,2>,
+ mVU_MADDAi<1,2> , mVU_MSUBAi<1,2> , mVUunknown<1,2> , mVU_NOP<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+ mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2> , mVUunknown<1,2>,
+};
//------------------------------------------------------------------
//------------------------------------------------------------------
// Table Functions
//------------------------------------------------------------------
#define doTableStuff(tableName, args) { \
- if (recPass) { \
+ pass1 { \
+ if (vuIndex) tableName##10[ args ](); \
+ else tableName##00[ args ](); \
+ } \
+ pass2 { \
if (vuIndex) tableName##11[ args ](); \
else tableName##01[ args ](); \
} \
- else { \
- if (vuIndex) tableName##10[ args ](); \
- else tableName##00[ args ](); \
+ pass3 { \
+ if (vuIndex) tableName##12[ args ](); \
+ else tableName##02[ args ](); \
} \
}
@@ -750,8 +1077,9 @@ microVUf(void) mVULowerOP_T3_11() { doTableStuff(mVULowerOP_T3_11_OPCODE, ((mVUg
microVUf(void) mVUopU() { doTableStuff(mVU_UPPER_OPCODE, (mVUgetCode & 0x3f)); } // Gets Upper Opcode
microVUf(void) mVUopL() { doTableStuff(mVULOWER_OPCODE, (mVUgetCode >> 25)); } // Gets Lower Opcode
microVUf(void) mVUunknown() {
- //if (recPass) return;
SysPrintf("mVUunknown<%d,%d> : Unknown Micro VU opcode called (%x)\n", vuIndex, recPass, mVUgetCode);
+ //pass2 { write8(0xcc); }
+ pass3 { mVUlog("Unknown", mVUgetCode); }
}
#endif //PCSX2_MICROVU
diff --git a/pcsx2/x86/microVU_Upper.inl b/pcsx2/x86/microVU_Upper.inl
index dcbc757a13..51a2a325d6 100644
--- a/pcsx2/x86/microVU_Upper.inl
+++ b/pcsx2/x86/microVU_Upper.inl
@@ -79,10 +79,10 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX
//------------------------------------------------------------------
// FMAC1 - Normal FMAC Opcodes
-#define mVU_FMAC1(operation) { \
+#define mVU_FMAC1(operation, OPname) { \
microVU* mVU = mVUx; \
- if (!recPass) { mVUanalyzeFMAC1(_Fd_, _Fs_, _Ft_); } \
- else { \
+ pass1 { mVUanalyzeFMAC1(_Fd_, _Fs_, _Ft_); } \
+ pass2 { \
int Fd, Fs, Ft; \
mVUallocFMAC1a(Fd, Fs, Ft); \
if (_XYZW_SS) SSE_##operation##SS_XMM_to_XMM(Fs, Ft); \
@@ -90,12 +90,13 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX
mVUupdateFlags(Fd, xmmT1, xmmT2, _X_Y_Z_W, 1); \
mVUallocFMAC1b(Fd); \
} \
+ pass3 { mVUlog(OPname); } \
}
// FMAC3 - BC(xyzw) FMAC Opcodes
-#define mVU_FMAC3(operation) { \
+#define mVU_FMAC3(operation, OPname) { \
microVU* mVU = mVUx; \
- if (!recPass) { mVUanalyzeFMAC3(_Fd_, _Fs_, _Ft_); } \
- else { \
+ pass1 { mVUanalyzeFMAC3(_Fd_, _Fs_, _Ft_); } \
+ pass2 { \
int Fd, Fs, Ft; \
mVUallocFMAC3a(Fd, Fs, Ft); \
if (_XYZW_SS) SSE_##operation##SS_XMM_to_XMM(Fs, Ft); \
@@ -103,12 +104,13 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX
mVUupdateFlags(Fd, xmmT1, xmmT2, _X_Y_Z_W, 1); \
mVUallocFMAC3b(Fd); \
} \
+ pass3 { mVUlog(OPname); } \
}
// FMAC4 - FMAC Opcodes Storing Result to ACC
-#define mVU_FMAC4(operation) { \
+#define mVU_FMAC4(operation, OPname) { \
microVU* mVU = mVUx; \
- if (!recPass) { mVUanalyzeFMAC1(0, _Fs_, _Ft_); } \
- else { \
+ pass1 { mVUanalyzeFMAC1(0, _Fs_, _Ft_); } \
+ pass2 { \
int ACC, Fs, Ft; \
mVUallocFMAC4a(ACC, Fs, Ft); \
if (_X_Y_Z_W == 8) SSE_##operation##SS_XMM_to_XMM(Fs, Ft); \
@@ -116,12 +118,13 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX
mVUupdateFlags(Fs, xmmT1, xmmT2, _X_Y_Z_W, 0); \
mVUallocFMAC4b(ACC, Fs); \
} \
+ pass3 { mVUlog(OPname); } \
}
// FMAC5 - FMAC BC(xyzw) Opcodes Storing Result to ACC
-#define mVU_FMAC5(operation) { \
+#define mVU_FMAC5(operation, OPname) { \
microVU* mVU = mVUx; \
- if (!recPass) { mVUanalyzeFMAC3(0, _Fs_, _Ft_); } \
- else { \
+ pass1 { mVUanalyzeFMAC3(0, _Fs_, _Ft_); } \
+ pass2 { \
int ACC, Fs, Ft; \
mVUallocFMAC5a(ACC, Fs, Ft); \
if (_X_Y_Z_W == 8) SSE_##operation##SS_XMM_to_XMM(Fs, Ft); \
@@ -129,12 +132,13 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX
mVUupdateFlags(Fs, xmmT1, xmmT2, _X_Y_Z_W, 0); \
mVUallocFMAC5b(ACC, Fs); \
} \
+ pass3 { mVUlog(OPname); } \
}
// FMAC6 - Normal FMAC Opcodes (I Reg)
-#define mVU_FMAC6(operation) { \
+#define mVU_FMAC6(operation, OPname) { \
microVU* mVU = mVUx; \
- if (!recPass) { mVUanalyzeFMAC1(_Fd_, _Fs_, 0); } \
- else { \
+ pass1 { mVUanalyzeFMAC1(_Fd_, _Fs_, 0); } \
+ pass2 { \
int Fd, Fs, Ft; \
mVUallocFMAC6a(Fd, Fs, Ft); \
if (_XYZW_SS) SSE_##operation##SS_XMM_to_XMM(Fs, Ft); \
@@ -142,12 +146,13 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX
mVUupdateFlags(Fd, xmmT1, xmmT2, _X_Y_Z_W, 1); \
mVUallocFMAC6b(Fd); \
} \
+ pass3 { mVUlog(OPname); } \
}
// FMAC7 - FMAC Opcodes Storing Result to ACC (I Reg)
-#define mVU_FMAC7(operation) { \
+#define mVU_FMAC7(operation, OPname) { \
microVU* mVU = mVUx; \
- if (!recPass) { mVUanalyzeFMAC1(0, _Fs_, 0); } \
- else { \
+ pass1 { mVUanalyzeFMAC1(0, _Fs_, 0); } \
+ pass2 { \
int ACC, Fs, Ft; \
mVUallocFMAC7a