Fixing up Fatal Frame, removed redundant path3 masking code from the olden days!

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1295 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
refraction 2009-05-30 16:57:15 +00:00
parent 187dffc5f4
commit 4fc4a634b3
5 changed files with 15 additions and 41 deletions

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@ -27,7 +27,6 @@
#include "Common.h"
#include "Threading.h"
#define GSPATH3FIX
PCSX2_ALIGNED16( extern u8 g_RealGSMem[0x2000] );
#define GSCSRr *((u64*)(g_RealGSMem+0x1000))

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@ -57,6 +57,7 @@ __forceinline void gsInterrupt() {
//Console::WriteLn("Eh? why are you still interrupting! chcr %x, qwc %x, done = %x", params gif->chcr, gif->qwc, done);
return;
}
if(Path3progress == 2) psHu32(GIF_STAT)&= ~(GIF_STAT_APATH3 | GIF_STAT_OPH); // OPH=0 | APATH=0
if (gif->qwc > 0 || gspath3done == 0) {
if (!(psHu32(DMAC_CTRL) & 0x1)) {
@ -74,6 +75,7 @@ __forceinline void gsInterrupt() {
gspath3done = 0;
gscycles = 0;
gif->chcr &= ~0x100;
psHu32(GIF_STAT)&= ~(GIF_STAT_APATH3 | GIF_STAT_OPH); // OPH=0 | APATH=0
GSCSRr &= ~0xC000; //Clear FIFO stuff
GSCSRr |= 0x4000; //FIFO empty
psHu32(GIF_STAT) &= ~GIF_STAT_P3Q;
@ -107,7 +109,6 @@ static u32 WRITERING_DMA(u32 *pMem, u32 qwc)
memcpy_aligned(pgsmem, pMem, sizetoread<<4);
mtgsThread->SendDataPacket();
if(Path3progress == 2) psHu32(GIF_STAT)&= ~(GIF_STAT_APATH3 | GIF_STAT_OPH); // OPH=0 | APATH=0
return sizetoread;
}
else
@ -120,11 +121,8 @@ static u32 WRITERING_DMA(u32 *pMem, u32 qwc)
}
int _GIFchain() {
#ifdef GSPATH3FIX
u32 qwc = ((psHu32(GIF_MODE) & 0x4) && (vif1Regs->mskpath3)) ? min(8, (int)gif->qwc) : min( gifsplit, (int)gif->qwc );
#else
u32 qwc = gif->qwc;
#endif
u32 *pMem;
pMem = (u32*)dmaGetAddr(gif->madr);
@ -181,18 +179,6 @@ void GIFdma()
}
#ifndef GSPATH3FIX
if ( !(psHu32(GIF_MODE) & 0x4) ) {
if (vif1Regs->mskpath3 || psHu32(GIF_MODE) & 0x1) {
gif->chcr &= ~0x100;
psHu32(GIF_STAT)&= ~0xE00; // OPH=0 | APATH=0
hwDmacIrq(2);
return;
}
}
#endif
if ((psHu32(DMAC_CTRL) & 0xC0) == 0x80 && prevcycles != 0) { // STD == GIF
Console::WriteLn("GS Stall Control Source = %x, Drain = %x\n MADR = %x, STADR = %x", params (psHu32(0xe000) >> 4) & 0x3, (psHu32(0xe000) >> 6) & 0x3, gif->madr, psHu32(DMAC_STADR));
@ -216,7 +202,6 @@ void GIFdma()
return;
}
#ifdef GSPATH3FIX
if (vif1Regs->mskpath3 || (psHu32(GIF_MODE) & 0x1)) {
if(gif->qwc == 0) {
if((gif->chcr & 0x10e) == 0x104) {
@ -253,7 +238,7 @@ void GIFdma()
GIFdmaEnd();
return;
}
#endif
// Transfer Dn_QWC from Dn_MADR to GIF
if ((gif->chcr & 0xc) == 0 || gif->qwc > 0) { // Normal Mode

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@ -97,6 +97,7 @@ static void DmaExec( void (*func)(), u32 mem, u32 value )
//Its invalid for the hardware to write a DMA while it is active, not without Suspending the DMAC
if((value & 0x100) && (psHu32(mem) & 0x100) == 0x100 && (psHu32(DMAC_CTRL) & 0x1) == 1) {
DMA_LOG( "DMAExec32 Attempt to run DMA while one is already active mem = %x", mem );
return;
}
// Upper 16bits of QWC should not be written since QWC is 16bits in size.
@ -1001,9 +1002,8 @@ void __fastcall hwWrite64_page_03( u32 mem, const mem64_t* srcval )
case GIF_MODE:
{
#ifdef GSPATH3FIX
Console::Status("GIFMODE64 %x", params value);
#endif
psHu64(GIF_MODE) = value;
// set/clear bits 0 and 2 as per the GIF_MODE value.

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@ -1891,7 +1891,7 @@ static int __fastcall Vif1TransDirectHL(u32 *data)
}
else
{
psHu32(GIF_STAT) &= ~GIF_STAT_APATH2;
psHu32(GIF_STAT) &= ~(GIF_STAT_APATH2 | GIF_STAT_OPH);
ret = vif1.tag.size;
vif1.tag.size = 0;
vif1.cmd = 0;
@ -2017,7 +2017,6 @@ static void Vif1CMDMskPath3() // MSKPATH3
vif1Regs->mskpath3 = (vif1Regs->code >> 15) & 0x1;
//Console::WriteLn("VIF MSKPATH3 %x", params vif1Regs->mskpath3);
#ifdef GSPATH3FIX
if ((vif1Regs->code >> 15) & 0x1)
{
psHu32(GIF_STAT) |= 0x2;
@ -2027,18 +2026,6 @@ static void Vif1CMDMskPath3() // MSKPATH3
Path3progress = 1; //Let the Gif know it can transfer again (making sure any vif stall isnt unset prematurely)
psHu32(GIF_STAT) &= ~0x2;
}
#else
if (vif1Regs->mskpath3)
{
if (gif->qwc) _GIFchain(); // Finish the transfer first
psHu32(GIF_STAT) |= 0x2;
}
else
{
psHu32(GIF_STAT) &= ~0x2;
if (gif->qwc) _GIFchain(); // Finish the transfer first
}
#endif
vif1.cmd &= ~0x7f;
}
@ -2122,7 +2109,7 @@ static void Vif1CMDDirectHL() // DIRECT/HL
}
}
psHu32(GIF_STAT) |= GIF_STAT_APATH2;
psHu32(GIF_STAT) |= (GIF_STAT_APATH2 | GIF_STAT_OPH);
}
static void Vif1CMDNull() // invalid opcode
@ -2263,6 +2250,8 @@ int VIF1transfer(u32 *data, int size, int istag)
if (vif1.tag.size == 0) break;
}
}
if(!vif1.cmd) vif1Regs->stat &= ~VIF1_STAT_VPS_D;
if(vif1Regs->stat & VIF1_STAT_VGW) break;
} // End of Transfer loop
@ -2555,9 +2544,10 @@ __forceinline void vif1Interrupt()
}
#ifdef PCSX2_DEVBUILD
if (vif1ch->qwc > 0) Console::WriteLn("VIF1 Ending with %x QWC left");
if (vif1.cmd != 0) Console::WriteLn("vif1.cmd still set %x", params vif1.cmd);
if (vif1.cmd != 0) Console::WriteLn("vif1.cmd still set %x tag size %x", params vif1.cmd, vif1.tag.size);
#endif
vif1Regs->stat &= ~VIF1_STAT_VPS; //Vif goes idle as the stall happened between commands;
vif1ch->chcr &= ~0x100;
g_vifCycles = 0;
hwDmacIrq(DMAC_VIF1);

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@ -4414,7 +4414,7 @@ void recVUMI_XGKICK_(VURegs *VU)
CALLFunc((uptr)GSgifTransfer1);
#endif
}
psHu32(GIF_STAT) &= ~0x100;
psHu32(GIF_STAT) &= ~(GIF_STAT_APATH1 | GIF_STAT_OPH); //Probably should be in the recompilation but im a rec nab :( (Refraction)
s_ScheduleXGKICK = 0;
}
@ -4435,7 +4435,7 @@ void recVUMI_XGKICK(VURegs *VU, int info)
SHL32ItoR(isreg, 4);
AND32ItoR(isreg, 0x3fff);
s_XGKICKReg = isreg;
psHu32(GIF_STAT) |= 0x100;
psHu32(GIF_STAT) |= (GIF_STAT_APATH1 | GIF_STAT_OPH); //Probably should be in the recompilation but im a rec nab :( (Refraction)
if (!SUPERVU_XGKICKDELAY || pc == s_pCurBlock->endpc)