Sif: Rename functions. Move iopsifbusy.

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2538 96395faa-99c1-11dd-bbfe-3dabce05a288

pcsx2/IopDma.cpp

@@ -25,9 +25,6 @@ using namespace R3000A;
 // Dma8     in PsxSpd.c
 // Dma11/12 in PsxSio2.c
 
-bool iopsifbusy[2] = { false, false };
-extern bool eesifbusy[2];
-
 #ifndef ENABLE_NEW_IOPDMA_SPU2
 static void __fastcall psxDmaGeneric(u32 madr, u32 bcr, u32 chcr, u32 spuCore, _SPU2writeDMA4Mem spu2WriteFunc, _SPU2readDMA4Mem spu2ReadFunc)
 {
@@ -201,7 +198,7 @@ void psxDma10(u32 madr, u32 bcr, u32 chcr)
 	}
 }
 
-/* psxDma11 & psxDma 12 are in IopSio2,cpp, along with the appropriate interrupt functions. */
+/* psxDma11 & psxDma 12 are in IopSio2.cpp, along with the appropriate interrupt functions. */
 
 void dev9Interrupt()
 {

pcsx2/Sif.cpp

@@ -22,7 +22,7 @@
 
 extern _sif sif0, sif1;
 bool eesifbusy[2] = { false, false };
-extern bool iopsifbusy[2];
+bool iopsifbusy[2] = { false, false };
 
 void sifInit()
 {

pcsx2/Sif0.cpp

@@ -36,7 +36,7 @@ static __forceinline void Sif0Init()
 }
 
 // Write from Fifo to EE.
-static __forceinline bool SifEERead()
+static __forceinline bool WriteFifoToEE()
 {
 	const int readSize = min((s32)sif0dma->qwc, sif0.fifo.size >> 2);
 	//if (readSize <= 0)
@@ -49,7 +49,7 @@ static __forceinline bool SifEERead()
 		ptag = sif0dma->getAddr(sif0dma->madr, DMAC_SIF0);
 		if (ptag == NULL)
 		{
-			DevCon.Warning("SIFEERead: ptag == NULL");
+			DevCon.Warning("WriteFifoToEE: ptag == NULL");
 			return false;
 		}
 
@@ -64,21 +64,21 @@ static __forceinline bool SifEERead()
 	//}
 	//else
 	//{
-		//DevCon.Warning("SifEERead readSize is 0");
+		//DevCon.Warning("WriteFifoToEE: readSize is 0");
 	//	return false;
 	//}
 	return true;
 }
 
 // Write IOP to Fifo.
-static __forceinline bool SifIOPWrite()
+static __forceinline bool WriteIOPtoFifo()
 {
 	// There's some data ready to transfer into the fifo..
 	const int writeSize = min(sif0.counter, sif0.fifo.free());
 	
 	//if (writeSize <= 0)
 	//{
-		//DevCon.Warning("SifIOPWrite writeSize is 0"); 
+		//DevCon.Warning("WriteIOPtoFifo: writeSize is 0"); 
 	//	return false;
 	//}
 	//else
@@ -94,7 +94,7 @@ static __forceinline bool SifIOPWrite()
 }
 
 // Read Fifo into an ee tag, transfer it to sif0dma, and process it.
-static __forceinline bool SIFEEReadTag()
+static __forceinline bool ProcessEETag()
 {
 	static __aligned16 u32 tag[4];
 			
@@ -134,8 +134,8 @@ static __forceinline bool SIFEEReadTag()
 	return true;
 }
 
-// Read Fifo into an ee tag, and transfer it to hw_dma(9). And presumably process it.
+// Read Fifo into an iop tag, and transfer it to hw_dma(9). And presumably process it.
-static __forceinline bool SIFIOPWriteTag()
+static __forceinline bool ProcessIOPTag()
 {
 	// Process DMA tag at hw_dma(9).tadr
 	sif0.data = *(sifData *)iopPhysMem(hw_dma(9).tadr);
@@ -154,7 +154,7 @@ static __forceinline bool SIFIOPWriteTag()
 }
 
 // Stop transferring ee, and signal an interrupt.
-static __forceinline void SIF0EEend()
+static __forceinline void EndEE()
 {
 	eesifbusy[0] = false;
 	if (cycles == 0) DevCon.Warning("EESIF0cycles = 0"); // No transfer happened
@@ -162,7 +162,7 @@ static __forceinline void SIF0EEend()
 }
 
 // Stop transferring iop, and signal an interrupt.
-static __forceinline void SIF0IOPend()
+static __forceinline void EndIOP()
 {
 	iopsifbusy[0] = false;
 					
@@ -174,7 +174,7 @@ static __forceinline void SIF0IOPend()
 }
 
 // Handle the EE transfer.
-static __forceinline void SIF0EEDma()
+static __forceinline void HandleEETransfer()
 {
 #ifdef PCSX2_DEVBUILD
 	if (dmacRegs->ctrl.STS == STS_SIF0)
@@ -187,42 +187,50 @@ static __forceinline void SIF0EEDma()
 	{
 		if ((sif0dma->chcr.MOD == NORMAL_MODE) || sif0.end)
 		{
+			// Stop transferring ee, and signal an interrupt.
 			done = true;
-			SIF0EEend();
+			EndEE();
 		}
 		else if (sif0.fifo.size >= 4) // Read a tag
 		{
+			// Read Fifo into an ee tag, transfer it to sif0dma
+			// and process it.
 			done = false;
-			SIFEEReadTag();
+			ProcessEETag();
 		}
 	}
 	
 	if (sif0dma->qwc > 0) // If we're reading something continue to do so
 	{
-		SifEERead();
+		// Write from Fifo to EE.
+		WriteFifoToEE();
 	}
 }
 
 // Handle the IOP transfer.
 // Note: Test any changes in this function against Grandia III.
-static __forceinline void SIF0IOPDma()
+static __forceinline void HandleIOPTransfer()
 {
 	if (sif0.counter <= 0) // If there's no more to transfer
 	{
 		if (sif0_tag.IRQ  || (sif0_tag.ID & 4))
 		{
+			// Stop transferring iop, and signal an interrupt.
 			done = true;
-			SIF0IOPend();
+			EndIOP();
 		}
-		else  // Chain mode
+		else
 		{
+			// Read Fifo into an iop tag, and transfer it to hw_dma(9). 
+			// And presumably process it.
 			done = false;
-			SIFIOPWriteTag();
+			ProcessIOPTag();
 		}
 	}
 	else
 	{
-		SifIOPWrite();
+		// Write IOP to Fifo.
+		WriteIOPtoFifo();
 	}
 }
 
@@ -238,8 +246,8 @@ __forceinline void SIF0Dma()
 	
 	do
 	{
-		if (iopsifbusy[0]) SIF0IOPDma();
+		if (iopsifbusy[0]) HandleIOPTransfer();
-		if (eesifbusy[0]) SIF0EEDma();
+		if (eesifbusy[0]) HandleEETransfer();
 	} while (!done);
 	
 	SIF_LOG("SIF0 DMA end...");

pcsx2/Sif1.cpp

@@ -36,14 +36,14 @@ static __forceinline void Sif1Init()
 }
 
 // Write from the EE to Fifo.
-static __forceinline bool SifEEWrite()
+static __forceinline bool WriteEEtoFifo()
 {
 	// There's some data ready to transfer into the fifo..
 		
 	const int writeSize = min((s32)sif1dma->qwc, sif1.fifo.free() >> 2);
 	//if (writeSize <= 0)
 	//{
-		//DevCon.Warning("SifEEWrite writeSize is 0");
+		//DevCon.Warning("WriteEEtoFifo: writeSize is 0");
 	//	return false;
 	//}
 	//else
@@ -53,7 +53,7 @@ static __forceinline bool SifEEWrite()
 		ptag = sif1dma->getAddr(sif1dma->madr, DMAC_SIF1);
 		if (ptag == NULL) 
 		{
-			DevCon.Warning("SIFEEWrite: ptag == NULL");
+			DevCon.Warning("WriteEEtoFifo: ptag == NULL");
 			return false;
 		}
 
@@ -67,13 +67,13 @@ static __forceinline bool SifEEWrite()
 }
 
 // Read from the fifo and write to IOP
-static __forceinline bool SifIOPRead()
+static __forceinline bool WriteFifoToIOP()
 {
 	// If we're reading something, continue to do so.
 	const int readSize = min (sif1.counter, sif1.fifo.size);
 	//if (readSize <= 0)
 	//{
-		//DevCon.Warning("SifIOPRead readSize is 0");
+		//DevCon.Warning("WriteFifoToIOP: readSize is 0");
 	//	return false;
 	//}
 	//else
@@ -90,7 +90,7 @@ static __forceinline bool SifIOPRead()
 }
 
 // Get a tag and process it.
-static __forceinline bool SIFEEWriteTag()
+static __forceinline bool ProcessEETag()
 {
 	// Chain mode
 	tDMA_TAG *ptag;
@@ -99,7 +99,7 @@ static __forceinline bool SIFEEWriteTag()
 	ptag = sif1dma->DMAtransfer(sif1dma->tadr, DMAC_SIF1);
 	if (ptag == NULL)
 	{
-		Console.WriteLn("SIF1EEDma: ptag = NULL");
+		Console.WriteLn("ProcessEETag: ptag = NULL");
 		return false;
 	}
 
@@ -171,19 +171,19 @@ static __forceinline bool SIFIOPReadTag()
 }
 
 // Stop processing EE, and signal an interrupt.
-static __forceinline void SIF1EEend()
+static __forceinline void EndEE()
 {
 	eesifbusy[1] = false;
 			
 	// Voodoocycles : Okami wants around 100 cycles when booting up
 	// Other games reach like 50k cycles here, but the EE will long have given up by then and just retry.
 	// (Cause of double interrupts on the EE)
-	if (cycles == 0) DevCon.Warning("EESIF1cycles  = 0"); // No transfer happened
+	if (cycles == 0) DevCon.Warning("SIF1 EE: cycles = 0"); // No transfer happened
 	else CPU_INT(DMAC_SIF1, min((int)(cycles*BIAS), 384)); // Hence no Interrupt (fixes Eternal Poison reboot when selecting new game)
 }
 
 // Stop processing IOP, and signal an interrupt.
-static __forceinline void SIF1IOPend()
+static __forceinline void EndIOP()
 {
 	iopsifbusy[1] = false;
 
@@ -191,12 +191,12 @@ static __forceinline void SIF1IOPend()
 	//The *24 are needed for ecco the dolphin (CDVD hangs) and silver surfer (Pad not detected)
 	//Greater than *35 break rebooting when trying to play Tekken5 arcade history
 	//Total cycles over 1024 makes SIF too slow to keep up the sound stream in so3...
-	if (psxCycles == 0) DevCon.Warning("IOPSIF1cycles = 0"); // No transfer happened
+	if (psxCycles == 0) DevCon.Warning("SIF1 IOP: cycles = 0"); // No transfer happened
 	else PSX_INT(IopEvt_SIF1, min((psxCycles * 26), 1024)); // Hence no Interrupt
 }
 
 // Handle the EE transfer.
-static __forceinline void SIF1EEDma()
+static __forceinline void HandleEETransfer()
 {
 #ifdef PCSX2_DEVBUILD
 	if (dmacRegs->ctrl.STD == STD_SIF1)
@@ -212,26 +212,26 @@ static __forceinline void SIF1EEDma()
 		if ((sif1dma->chcr.MOD == NORMAL_MODE) || sif1.end)
 		{
 			done = true;
-			SIF1EEend();
+			EndEE();
 		}
 		else
 		{
 			done = false;
-			if (!SIFEEWriteTag()) return;
+			if (!ProcessEETag()) return;
 		}
 	}
 	else
 	{
-		SifEEWrite();
+		WriteEEtoFifo();
 	}
 }
 
 // Handle the IOP transfer.
-static __forceinline void SIF1IOPDma()
+static __forceinline void HandleIOPTransfer()
 {
 	if (sif1.counter > 0)
 	{
-		SifIOPRead();
+		WriteFifoToIOP();
 	}
 	
 	if (sif1.counter <= 0)
@@ -239,7 +239,7 @@ static __forceinline void SIF1IOPDma()
 		if (sif1_tag.IRQ  || (sif1_tag.ID & 4))
 		{
 			done = true;
-			SIF1IOPend();
+			EndIOP();
 		}
 		else if (sif1.fifo.size >= 4)
 		{
@@ -262,8 +262,8 @@ __forceinline void SIF1Dma()
 	
 	do
 	{
-		if (eesifbusy[1]) SIF1EEDma();
+		if (eesifbusy[1]) HandleEETransfer();
-		if (iopsifbusy[1]) SIF1IOPDma();
+		if (iopsifbusy[1]) HandleIOPTransfer();
 
 	} while (!done);