From 4db23e667775eded5eded49967277dbb013adfc7 Mon Sep 17 00:00:00 2001 From: Ty Date: Fri, 21 Feb 2025 11:59:21 -0500 Subject: [PATCH] Debugger Assembler: BC1(t|f) 24 bit immediates to 16 bit immediates --- pcsx2/DebugTools/ExpressionParser.cpp | 6 +++++- pcsx2/DebugTools/MipsAssembler.cpp | 6 +++--- pcsx2/DebugTools/MipsAssemblerTables.cpp | 8 ++++---- 3 files changed, 12 insertions(+), 8 deletions(-) diff --git a/pcsx2/DebugTools/ExpressionParser.cpp b/pcsx2/DebugTools/ExpressionParser.cpp index 35cf0c7dfd..d0d1b3e3eb 100644 --- a/pcsx2/DebugTools/ExpressionParser.cpp +++ b/pcsx2/DebugTools/ExpressionParser.cpp @@ -599,7 +599,11 @@ bool parsePostfixExpression(PostfixExpression& exp, IExpressionFunctions* funcs, } } - if (valueStack.size() != 1) return false; + if (valueStack.size() != 1) + { + error = TRANSLATE("ExpressionParser", "Invalid expression (Too many constants?)"); + return false; + } dest = valueStack[0]; return true; } diff --git a/pcsx2/DebugTools/MipsAssembler.cpp b/pcsx2/DebugTools/MipsAssembler.cpp index caa9bf5cfa..57b8bc247f 100644 --- a/pcsx2/DebugTools/MipsAssembler.cpp +++ b/pcsx2/DebugTools/MipsAssembler.cpp @@ -637,14 +637,14 @@ bool CMipsInstruction::Validate() immediate.value = (immediate.value >> 2) & 0x3FFFFFF; } else if (Opcode.flags & MO_IPCR) // relative 16 bit value { - int num = (immediate.value-RamPos-4); + const int num = (immediate.value-RamPos-4) >> 2; - if (num > 0x20000 || num < (-0x20000)) + if (num > std::numeric_limits::max() || num < std::numeric_limits::min()) { Logger::queueError(Logger::Error,L"Branch target %08X out of range",immediate.value); return false; } - immediate.value = num >> 2; + immediate.value = num; } int immediateBits = getImmediateBits(immediateType); diff --git a/pcsx2/DebugTools/MipsAssemblerTables.cpp b/pcsx2/DebugTools/MipsAssemblerTables.cpp index db3a8c0e26..19c9661fd1 100644 --- a/pcsx2/DebugTools/MipsAssemblerTables.cpp +++ b/pcsx2/DebugTools/MipsAssemblerTables.cpp @@ -596,10 +596,10 @@ const tMipsOpcode MipsOpcodes[] = { // 10 | --- | --- | --- | --- | --- | --- | --- | --- | 10..17 // 11 | --- | --- | --- | --- | --- | --- | --- | --- | 18..1F // hi |-------|-------|-------|-------|-------|-------|-------|-------| - { "bc1f", "I", MIPS_COP1BC(0x00), MA_MIPS2, MO_IPCR|MO_DELAY|MO_NODELAYSLOT }, - { "bc1t", "I", MIPS_COP1BC(0x01), MA_MIPS2, MO_IPCR|MO_DELAY|MO_NODELAYSLOT }, - { "bc1fl", "I", MIPS_COP1BC(0x02), MA_MIPS2, MO_IPCR|MO_DELAY|MO_NODELAYSLOT }, - { "bc1tl", "I", MIPS_COP1BC(0x03), MA_MIPS2, MO_IPCR|MO_DELAY|MO_NODELAYSLOT }, + { "bc1f", "i", MIPS_COP1BC(0x00), MA_MIPS2, MO_IPCR|MO_DELAY|MO_NODELAYSLOT }, + { "bc1t", "i", MIPS_COP1BC(0x01), MA_MIPS2, MO_IPCR|MO_DELAY|MO_NODELAYSLOT }, + { "bc1fl", "i", MIPS_COP1BC(0x02), MA_MIPS2, MO_IPCR|MO_DELAY|MO_NODELAYSLOT }, + { "bc1tl", "i", MIPS_COP1BC(0x03), MA_MIPS2, MO_IPCR|MO_DELAY|MO_NODELAYSLOT }, // 31---------21------------------------------------------5--------0 // |= COP1S | | function|