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microVU: Fix logically dead code + bug 

-Coverity CID 146821: In _mVUflagPass(microVU &, unsigned int, unsigned int, unsigned int, std::​vector<unsigned int, std::​allocator<unsigned int>> &): Code can never be reached because of a logical contradiction (CWE-561)

-Coverity CID 146822: In mVUcompileSingleInstruction(microVU &, unsigned int, unsigned int, microFlagCycles &): Code can never be reached because of a logical contradiction (CWE-561)
This commit is contained in:
refractionpcsx2 2015-09-26 13:34:20 +01:00
parent a89307c5ba
commit 4b63847e04
3 changed files with 5 additions and 4 deletions
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3
pcsx2/x86/microVU_Compile.inl
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@ -469,7 +469,8 @@ void* mVUcompileSingleInstruction(microVU& mVU, u32 startPC, uptr pState, microF
mVUopU(mVU, 0); mVUopU(mVU, 0);
mVUcheckBadOp(mVU); mVUcheckBadOp(mVU);
if (curI & _Ebit_) { eBitPass1(mVU, branch); DevCon.Warning("E Bit on single instruction");} if (curI & _Ebit_) { eBitPass1(mVU, branch); DevCon.Warning("E Bit on single instruction");}
if (curI & _DTbit_) { branch = 4; DevCon.Warning("D Bit on single instruction");} if (curI & _Dbit_) { mVUup.dBit = true; }
if (curI & _Tbit_) { mVUup.tBit = true; }
if (curI & _Mbit_) { mVUup.mBit = true; DevCon.Warning("M Bit on single instruction");} if (curI & _Mbit_) { mVUup.mBit = true; DevCon.Warning("M Bit on single instruction");}
if (curI & _Ibit_) { mVUlow.isNOP = true; mVUup.iBit = true; DevCon.Warning("I Bit on single instruction");} if (curI & _Ibit_) { mVUlow.isNOP = true; mVUup.iBit = true; DevCon.Warning("I Bit on single instruction");}
else { incPC(-1); mVUopL(mVU, 0); incPC(1); } else { incPC(-1); mVUopL(mVU, 0); incPC(1); }

5
pcsx2/x86/microVU_Flags.inl
View File

@ -362,8 +362,9 @@ void _mVUflagPass(mV, u32 startPC, u32 sCount, u32 found, std::vector<u32>& v) {
mVUopU(mVU, 3); mVUopU(mVU, 3);
found |= (mVUregs.needExactMatch&8)>>3; found |= (mVUregs.needExactMatch&8)>>3;
mVUregs.needExactMatch &= 7; mVUregs.needExactMatch &= 7;
if ( curI & _Ebit_ ) { branch = 1; } if ( curI & _Ebit_ ) { branch = 1; }
if ( curI & _DTbit_ ) { branch = 6; } if ( curI & _Tbit_ ) { branch = 6; }
if ( (curI & _Dbit_) && doDBitHandling ) { branch = 6; }
if (!(curI & _Ibit_) ) { incPC(-1); mVUopL(mVU, 3); incPC(1); } if (!(curI & _Ibit_) ) { incPC(-1); mVUopL(mVU, 3); incPC(1); }
// if (mVUbranch&&(branch>=3)&&(branch<=5)) { DevCon.Error("Double Branch [%x]", xPC); mVUregs.needExactMatch |= 7; break; } // if (mVUbranch&&(branch>=3)&&(branch<=5)) { DevCon.Error("Double Branch [%x]", xPC); mVUregs.needExactMatch |= 7; break; }

1
pcsx2/x86/microVU_Misc.h
View File

@ -76,7 +76,6 @@ static const uint _Ebit_ = 1 << 30;
static const uint _Mbit_ = 1 << 29; static const uint _Mbit_ = 1 << 29;
static const uint _Dbit_ = 1 << 28; static const uint _Dbit_ = 1 << 28;
static const uint _Tbit_ = 1 << 27; static const uint _Tbit_ = 1 << 27;
static const uint _DTbit_ = 0; //( _Dbit_ | _Tbit_ ) // ToDo: Implement this stuff...
static const uint divI = 0x1040000; static const uint divI = 0x1040000;
static const uint divD = 0x2080000; static const uint divD = 0x2080000;