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Merge pull request #1383 from PCSX2/prafullpcsx2-eecache
EE-Int: Minor EE Cache changes
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commit
49b80a4916
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@ -62,8 +62,18 @@ int getFreeCache(u32 mem, int mode, int * way ) {
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ppf = (ppf & ~0x3F) ;
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ppf = (ppf & ~0x3F) ;
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if((pCache[i].tag[number] & (DIRTY_FLAG|VALID_FLAG)) == (DIRTY_FLAG|VALID_FLAG)) // Dirty Write
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if((pCache[i].tag[number] & (DIRTY_FLAG|VALID_FLAG)) == (DIRTY_FLAG|VALID_FLAG)) // Dirty Write
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{
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{
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//Perform a cache miss.
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s32 oldppf = (pCache[i].tag[number] & ~0x80000fff) + (mem & 0xFC0);
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return -1;
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CACHE_LOG("Dirty cache fill! PPF %x", oldppf);
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*reinterpret_cast<mem64_t*>(oldppf) = pCache[i].data[number][0].b8._u64[0];
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*reinterpret_cast<mem64_t*>(oldppf+8) = pCache[i].data[number][0].b8._u64[1];
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*reinterpret_cast<mem64_t*>(oldppf+16) = pCache[i].data[number][1].b8._u64[0];
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*reinterpret_cast<mem64_t*>(oldppf+24) = pCache[i].data[number][1].b8._u64[1];
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*reinterpret_cast<mem64_t*>(oldppf+32) = pCache[i].data[number][2].b8._u64[0];
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*reinterpret_cast<mem64_t*>(oldppf+40) = pCache[i].data[number][2].b8._u64[1];
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*reinterpret_cast<mem64_t*>(oldppf+48) = pCache[i].data[number][3].b8._u64[0];
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*reinterpret_cast<mem64_t*>(oldppf+56) = pCache[i].data[number][3].b8._u64[1];
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pCache[i].tag[number] &= ~DIRTY_FLAG;
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}
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}
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@ -422,7 +432,27 @@ void CACHE() {
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{
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{
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int index = (addr >> 6) & 0x3F;
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int index = (addr >> 6) & 0x3F;
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int way = addr & 0x1;
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int way = addr & 0x1;
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//DXLTG demands that SYNC.L is called before this command, which forces the cache to write back, so presumably games are checking the cache has updated the memory
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//For speed, we will do it here.
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u32 pfnaddr = (pCache[index].tag[way] & ~0x80000fff) | (addr & 0xfc0);
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u32 vmv = vtlbdata.vmap[pfnaddr >> VTLB_PAGE_BITS];
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s32 ppf = (pfnaddr + vmv) & ~0x3F;
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if ((pCache[index].tag[way] & (DIRTY_FLAG | VALID_FLAG)) == (DIRTY_FLAG | VALID_FLAG)) // Dirty
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{
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CACHE_LOG("DXLTG Dirty WriteBack! PPF %x", ppf);
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*reinterpret_cast<mem64_t*>(ppf) = pCache[index].data[way][0].b8._u64[0];
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*reinterpret_cast<mem64_t*>(ppf + 8) = pCache[index].data[way][0].b8._u64[1];
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*reinterpret_cast<mem64_t*>(ppf + 16) = pCache[index].data[way][1].b8._u64[0];
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*reinterpret_cast<mem64_t*>(ppf + 24) = pCache[index].data[way][1].b8._u64[1];
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*reinterpret_cast<mem64_t*>(ppf + 32) = pCache[index].data[way][2].b8._u64[0];
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*reinterpret_cast<mem64_t*>(ppf + 40) = pCache[index].data[way][2].b8._u64[1];
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*reinterpret_cast<mem64_t*>(ppf + 48) = pCache[index].data[way][3].b8._u64[0];
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*reinterpret_cast<mem64_t*>(ppf + 56) = pCache[index].data[way][3].b8._u64[1];
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pCache[index].tag[way] &= ~DIRTY_FLAG;
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}
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//DevCon.Warning("DXLTG way %x index %x addr %x tagdata=%x", way, index, addr, pCache[index].tag[way]);
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cpuRegs.CP0.n.TagLo = pCache[index].tag[way];
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cpuRegs.CP0.n.TagLo = pCache[index].tag[way];
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CACHE_LOG("CACHE DXLTG addr %x, index %d, way %d, DATA %x OP %x ",addr,index,way,cpuRegs.CP0.r[28], cpuRegs.code);
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CACHE_LOG("CACHE DXLTG addr %x, index %d, way %d, DATA %x OP %x ",addr,index,way,cpuRegs.CP0.r[28], cpuRegs.code);
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@ -506,4 +536,4 @@ void CACHE() {
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}
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}
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} // end namespace OpcodeImpl
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} // end namespace OpcodeImpl
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}}
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}}
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