GSdx: Implement SYNCV register bitfields

Add the bitfield structure of the undocumented SYNCV register,
potentially might be useful in proper height determination of the output
circuit for some weird games which still get it wrong but still haven't
figured out how it might be useful. Maybe some sort of black magic
formula with the vertical synchronization values?

The differential phase value seems to closely resemble the display
height value of the video modes (480 for NTSC, 576 for PAL) but after
some investigating into the differential phase, I have no clue on how
they might be even related. Hopefully the mystery will be unveiled in
the near future.
This commit is contained in:
Akash 2017-05-20 22:47:43 +05:30 committed by Gregory Hainaut
parent e8f35f0bab
commit 49840bb621
1 changed files with 13 additions and 5 deletions

View File

@ -511,8 +511,12 @@ REG64_(GSReg, SYNCH2)
REG_END
REG64_(GSReg, SYNCV)
uint64 _DUMMY;
// TODO
uint32 VFP:10; // Vertical Front Porchinterval (?s)
uint32 VFPE:10; // Vertical Front Porchinterval End (?s)
uint32 VBP:12; // Vertical Back Porchinterval (?s)
uint32 VBPE:10; // Vertical Back Porchinterval End (?s)
uint32 VDP:11; // Vertical Differential Phase
uint32 VS:11; // Vertical Synchronization Timing
REG_END
REG64_SET(GSReg)
@ -1357,9 +1361,13 @@ struct GSPrivRegSet
SYNCH2.u32[1]
);
fprintf(fp, "SYNCV %08x_%08x\n",
SYNCV.u32[0],
SYNCV.u32[1]
fprintf(fp, "SYNCV VBP=%u VBPE=%u VDP=%u VFP=%u VFPE=%u VS=%u\n",
SYNCV.VBP,
SYNCV.VBPE,
SYNCV.VDP,
SYNCV.VFP,
SYNCV.VFPE,
SYNCV.VS
);
fprintf(fp, "CSR %08x_%08x\n",