mirror of https://github.com/PCSX2/pcsx2.git
GSdx: Implement SYNCV register bitfields
Add the bitfield structure of the undocumented SYNCV register, potentially might be useful in proper height determination of the output circuit for some weird games which still get it wrong but still haven't figured out how it might be useful. Maybe some sort of black magic formula with the vertical synchronization values? The differential phase value seems to closely resemble the display height value of the video modes (480 for NTSC, 576 for PAL) but after some investigating into the differential phase, I have no clue on how they might be even related. Hopefully the mystery will be unveiled in the near future.
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@ -511,8 +511,12 @@ REG64_(GSReg, SYNCH2)
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REG_END
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REG64_(GSReg, SYNCV)
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uint64 _DUMMY;
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// TODO
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uint32 VFP:10; // Vertical Front Porchinterval (?s)
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uint32 VFPE:10; // Vertical Front Porchinterval End (?s)
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uint32 VBP:12; // Vertical Back Porchinterval (?s)
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uint32 VBPE:10; // Vertical Back Porchinterval End (?s)
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uint32 VDP:11; // Vertical Differential Phase
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uint32 VS:11; // Vertical Synchronization Timing
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REG_END
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REG64_SET(GSReg)
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@ -1357,9 +1361,13 @@ struct GSPrivRegSet
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SYNCH2.u32[1]
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);
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fprintf(fp, "SYNCV %08x_%08x\n",
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SYNCV.u32[0],
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SYNCV.u32[1]
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fprintf(fp, "SYNCV VBP=%u VBPE=%u VDP=%u VFP=%u VFPE=%u VS=%u\n",
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SYNCV.VBP,
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SYNCV.VBPE,
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SYNCV.VDP,
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SYNCV.VFP,
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SYNCV.VFPE,
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SYNCV.VS
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);
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fprintf(fp, "CSR %08x_%08x\n",
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