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* Move the GIF register handlers from dmac to hwRead/hwWrite (like the VIF registers they aren't actually DMA-related). 

* Minor cleanups to trace logging and FastFormat string stuff.

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3724 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
Jake.Stine 2010-09-04 14:11:50 +00:00
parent 147e4b8409
commit 46b89abb72
9 changed files with 82 additions and 103 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
common/include/Utilities/StringHelpers.h
View File

@ -127,6 +127,8 @@ public:
FastFormatAscii& Write( const char* fmt, ... );
FastFormatAscii& WriteV( const char* fmt, va_list argptr );
bool IsEmpty() const;
const char* c_str() const { return m_dest->GetPtr(); }
operator const char*() const { return m_dest->GetPtr(); }
@ -149,6 +151,8 @@ public:
FastFormatUnicode& WriteV( const char* fmt, va_list argptr );
FastFormatUnicode& WriteV( const wxChar* fmt, va_list argptr );
bool IsEmpty() const;
const wxChar* c_str() const { return (const wxChar*)m_dest->GetPtr(); }
operator const wxChar*() const { return (const wxChar*)m_dest->GetPtr(); }
operator wxString() const { return (const wxChar*)m_dest->GetPtr(); }

11
common/src/Utilities/FastFormatString.cpp
View File

@ -63,7 +63,7 @@ public:
{
m_buffers[i].Name = wxsFormat(L"%s Formatting Buffer (slot%d)",
(sizeof(CharType)==1) ? L"Ascii" : L"Unicode", i);
m_buffers[i].MakeRoomFor(512);
m_buffers[i].MakeRoomFor(1024);
m_buffers[i].ChunkSize = 2048;
}
@ -266,6 +266,10 @@ FastFormatUnicode& FastFormatUnicode::Write( const wxChar* fmt, ... )
return *this;
}
bool FastFormatUnicode::IsEmpty() const
{
return ((wxChar&)(*m_dest)[0]) == 0;
}
// --------------------------------------------------------------------------------------
// FastFormatAscii (implementations)
@ -309,3 +313,8 @@ FastFormatAscii& FastFormatAscii::Write( const char* fmt, ... )
return *this;
}
bool FastFormatAscii::IsEmpty() const
{
return (*m_dest)[0] == 0;
}

48
pcsx2/DebugTools/Debug.h
View File

@ -342,17 +342,19 @@ struct SysConsoleLogPack
extern SysTraceLogPack SysTrace;
extern SysConsoleLogPack SysConsole;
extern void __Log( const char* fmt, ... );
// Helper macro for cut&paste. Note that we intentionally use a top-level *inline* bitcheck
// against Trace.Enabled, to avoid extra overhead in Debug builds when logging is disabled.
// (specifically this allows debug builds to skip havingto resolve all the parameters being
// passed into the function)
#define macTrace(trace) SysTrace.trace.IsActive() && SysTrace.trace.Write
#ifdef PCSX2_DEVBUILD
extern void __Log( const char* fmt, ... );
# define SysTraceActive(trace) SysTrace.trace.IsActive()
# define macTrace(trace) SysTraceActive(trace) && SysTrace.trace.Write
#else
# define SysTraceActive(trace) (false)
# define macTrace(trace)
#endif
#define SIF_LOG macTrace(SIF)
@ -385,42 +387,6 @@ extern void __Log( const char* fmt, ... );
#define GPU_LOG macTrace(IOP.GPU)
#define CDVD_LOG macTrace(IOP.CDVD)
#else // PCSX2_DEVBUILD
#define CPU_LOG 0&&
#define MEM_LOG 0&&
#define HW_LOG 0&&
#define DMA_LOG 0&&
#define BIOS_LOG 0&&
#define VU0_LOG 0&&
#define COP0_LOG 0&&
#define UnknownHW_LOG 0&&
#define VIF_LOG 0&&
#define SPR_LOG 0&&
#define GIF_LOG 0&&
#define SIF_LOG 0&&
#define IPU_LOG 0&&
#define VUM_LOG 0&&
#define VifCodeLog 0&&
#define PSXCPU_LOG 0&&
#define PSXMEM_LOG 0&&
#define PSXHW_LOG 0&&
#define PSXUnkHW_LOG 0&&
#define PSXBIOS_LOG 0&&
#define PSXDMA_LOG 0&&
#define PAD_LOG 0&&
#define CDR_LOG 0&&
#define CDVD_LOG 0&&
#define GPU_LOG 0&&
#define PSXCNT_LOG 0&&
#define EECNT_LOG 0&&
#define EMU_LOG 0&&
#define CACHE_LOG 0&&
#define MEMCARDS_LOG 0&&
#endif
#define ELF_LOG SysConsole.ELF.IsActive() && SysConsole.ELF.Write
#define eeRecPerfLog SysConsole.eeRecPerf.IsActive() && SysConsole.eeRecPerf

43
pcsx2/HwWrite.cpp
View File

@ -73,6 +73,49 @@ void __fastcall _hwWrite32( u32 mem, u32 value )
return;
case 0x03:
if (mem >= EEMemoryMap::VIF0_Start)
{
if(mem >= EEMemoryMap::VIF1_Start)
{
if (!vifWrite32<1>(mem, value)) return;
}
else
{
if (!vifWrite32<0>(mem, value)) return;
}
}
else iswitch(mem)
{
icase(GIF_CTRL)
{
psHu32(mem) = value & 0x8;
if (value & 0x1)
gsGIFReset();
if (value & 8)
gifRegs.stat.PSE = true;
else
gifRegs.stat.PSE = false;
return;
}
icase(GIF_MODE)
{
// need to set GIF_MODE (hamster ball)
gifRegs.mode.write(value);
// set/clear bits 0 and 2 as per the GIF_MODE value.
const u32 bitmask = GIF_MODE_M3R | GIF_MODE_IMT;
psHu32(GIF_STAT) &= ~bitmask;
psHu32(GIF_STAT) |= (u32)value & bitmask;
return;
}
}
break;
case 0x08:
case 0x09:
case 0x0a:

14
pcsx2/R5900.cpp
View File

@ -289,7 +289,7 @@ static __fi void TESTINT( u8 n, void (*callback)() )
static __fi void _cpuTestInterrupts()
{
if (!dmacRegs.ctrl.DMAE || psHu8(DMAC_ENABLER+2) == 1)
if (!dmacRegs.ctrl.DMAE || (psHu8(DMAC_ENABLER+2) & 1))
{
//Console.Write("DMAC Disabled or suspended");
return;
@ -415,7 +415,7 @@ __fi void _cpuBranchTest_Shared()
//if( EEsCycle < -450 )
// Console.WriteLn( " IOP ahead by: %d cycles", -EEsCycle );
// Experimental and Probably Unnecessry Logic -->
// Experimental and Probably Unnecessary Logic -->
// Check if the EE already has an exception pending, and if so we shouldn't
// waste too much time updating the IOP. Theory being that the EE and IOP should
// run closely in sync during raised exception events. But in practice it didn't
@ -502,11 +502,8 @@ __ri void cpuTestINTCInts()
cpuRegs.sCycle[30] = cpuRegs.cycle;
cpuRegs.eCycle[30] = 4; //Needs to be 4 to account for bus delays/pipelines etc
// only set the next branch delta if the exception won't be handled for
// the current branch...
if( !eeEventTestIsActive )
cpuSetNextBranchDelta( 4 );
else if(psxCycleEE > 0)
if(eeEventTestIsActive && (psxCycleEE > 0))
{
psxBreak += psxCycleEE; // record the number of cycles the IOP didn't run.
psxCycleEE = 0;
@ -529,11 +526,8 @@ __fi void cpuTestDMACInts()
cpuRegs.sCycle[31] = cpuRegs.cycle;
cpuRegs.eCycle[31] = 4; //Needs to be 4 to account for bus delays/pipelines etc
// only set the next branch delta if the exception won't be handled for
// the current branch...
if( !eeEventTestIsActive )
cpuSetNextBranchDelta( 4 );
else if(psxCycleEE > 0)
if(eeEventTestIsActive && (psxCycleEE > 0))
{
psxBreak += psxCycleEE; // record the number of cycles the IOP didn't run.
psxCycleEE = 0;

4
pcsx2/R5900OpcodeImpl.cpp
View File

@ -868,8 +868,7 @@ void SYSCALL()
}
// The only thing this code is used for is the one log message, so don't execute it if we aren't logging bios messages.
#ifdef PCSX2_DEVBUILD
if (SysTrace.EE.Bios.IsActive() && (call == 0x77))
if (SysTraceActive(EE.Bios) && (call == 0x77))
{
t_sif_dma_transfer *dmat;
//struct t_sif_cmd_header *hdr;
@ -891,7 +890,6 @@ void SYSCALL()
dmat->dest, dmat->src);
}
}
#endif
cpuRegs.pc -= 4;
cpuException(0x20, cpuRegs.branch);

35
pcsx2/ps2/LegacyDmac.cpp
View File

@ -290,42 +290,7 @@ __fi u32 dmacRead32( u32 mem )
template< uint page >
__fi bool dmacWrite32( u32 mem, mem32_t& value )
{
if (IsPageFor(EEMemoryMap::VIF0_Start) && (mem >= EEMemoryMap::VIF0_Start))
{
return (mem >= EEMemoryMap::VIF1_Start)
? vifWrite32<1>(mem, value)
: vifWrite32<0>(mem, value);
}
iswitch(mem) {
icase(GIF_CTRL)
{
psHu32(mem) = value & 0x8;
if (value & 0x1)
gsGIFReset();
if (value & 8)
gifRegs.stat.PSE = true;
else
gifRegs.stat.PSE = false;
return false;
}
icase(GIF_MODE)
{
// need to set GIF_MODE (hamster ball)
gifRegs.mode.write(value);
// set/clear bits 0 and 2 as per the GIF_MODE value.
const u32 bitmask = GIF_MODE_M3R | GIF_MODE_IMT;
psHu32(GIF_STAT) &= ~bitmask;
psHu32(GIF_STAT) |= (u32)value & bitmask;
return false;
}
icase(D0_CHCR) // dma0 - vif0
{
DMA_LOG("VIF0dma EXECUTE, value=0x%x", value);

2
pcsx2/x86/iR3000A.cpp
View File

@ -670,7 +670,7 @@ void psxRecompileCodeConst1(R3000AFNPTR constcode, R3000AFNPTR_INFO noconstcode)
const char *funcname = irxImportFuncname(libname, index);
irxDEBUG debug = irxImportDebug(libname, index);
if (SysTrace.IOP.Bios.IsActive()) {
if (SysTraceActive(IOP.Bios)) {
xMOV(ecx, (uptr)libname);
xMOV(edx, index);
xPUSH((uptr)funcname);