mirror of https://github.com/PCSX2/pcsx2.git
* Move the GIF register handlers from dmac to hwRead/hwWrite (like the VIF registers they aren't actually DMA-related).
* Minor cleanups to trace logging and FastFormat string stuff. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3724 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
parent
147e4b8409
commit
46b89abb72
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@ -127,6 +127,8 @@ public:
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FastFormatAscii& Write( const char* fmt, ... );
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FastFormatAscii& Write( const char* fmt, ... );
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FastFormatAscii& WriteV( const char* fmt, va_list argptr );
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FastFormatAscii& WriteV( const char* fmt, va_list argptr );
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bool IsEmpty() const;
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const char* c_str() const { return m_dest->GetPtr(); }
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const char* c_str() const { return m_dest->GetPtr(); }
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operator const char*() const { return m_dest->GetPtr(); }
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operator const char*() const { return m_dest->GetPtr(); }
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@ -149,6 +151,8 @@ public:
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FastFormatUnicode& WriteV( const char* fmt, va_list argptr );
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FastFormatUnicode& WriteV( const char* fmt, va_list argptr );
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FastFormatUnicode& WriteV( const wxChar* fmt, va_list argptr );
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FastFormatUnicode& WriteV( const wxChar* fmt, va_list argptr );
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bool IsEmpty() const;
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const wxChar* c_str() const { return (const wxChar*)m_dest->GetPtr(); }
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const wxChar* c_str() const { return (const wxChar*)m_dest->GetPtr(); }
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operator const wxChar*() const { return (const wxChar*)m_dest->GetPtr(); }
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operator const wxChar*() const { return (const wxChar*)m_dest->GetPtr(); }
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operator wxString() const { return (const wxChar*)m_dest->GetPtr(); }
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operator wxString() const { return (const wxChar*)m_dest->GetPtr(); }
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@ -63,7 +63,7 @@ public:
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{
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{
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m_buffers[i].Name = wxsFormat(L"%s Formatting Buffer (slot%d)",
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m_buffers[i].Name = wxsFormat(L"%s Formatting Buffer (slot%d)",
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(sizeof(CharType)==1) ? L"Ascii" : L"Unicode", i);
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(sizeof(CharType)==1) ? L"Ascii" : L"Unicode", i);
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m_buffers[i].MakeRoomFor(512);
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m_buffers[i].MakeRoomFor(1024);
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m_buffers[i].ChunkSize = 2048;
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m_buffers[i].ChunkSize = 2048;
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}
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}
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@ -266,6 +266,10 @@ FastFormatUnicode& FastFormatUnicode::Write( const wxChar* fmt, ... )
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return *this;
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return *this;
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}
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}
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bool FastFormatUnicode::IsEmpty() const
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{
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return ((wxChar&)(*m_dest)[0]) == 0;
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}
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// --------------------------------------------------------------------------------------
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// --------------------------------------------------------------------------------------
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// FastFormatAscii (implementations)
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// FastFormatAscii (implementations)
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@ -309,3 +313,8 @@ FastFormatAscii& FastFormatAscii::Write( const char* fmt, ... )
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return *this;
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return *this;
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}
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}
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bool FastFormatAscii::IsEmpty() const
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{
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return (*m_dest)[0] == 0;
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}
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@ -342,17 +342,19 @@ struct SysConsoleLogPack
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extern SysTraceLogPack SysTrace;
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extern SysTraceLogPack SysTrace;
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extern SysConsoleLogPack SysConsole;
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extern SysConsoleLogPack SysConsole;
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extern void __Log( const char* fmt, ... );
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// Helper macro for cut&paste. Note that we intentionally use a top-level *inline* bitcheck
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// Helper macro for cut&paste. Note that we intentionally use a top-level *inline* bitcheck
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// against Trace.Enabled, to avoid extra overhead in Debug builds when logging is disabled.
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// against Trace.Enabled, to avoid extra overhead in Debug builds when logging is disabled.
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// (specifically this allows debug builds to skip havingto resolve all the parameters being
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// (specifically this allows debug builds to skip havingto resolve all the parameters being
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// passed into the function)
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// passed into the function)
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#define macTrace(trace) SysTrace.trace.IsActive() && SysTrace.trace.Write
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#ifdef PCSX2_DEVBUILD
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#ifdef PCSX2_DEVBUILD
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# define SysTraceActive(trace) SysTrace.trace.IsActive()
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extern void __Log( const char* fmt, ... );
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# define macTrace(trace) SysTraceActive(trace) && SysTrace.trace.Write
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#else
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# define SysTraceActive(trace) (false)
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# define macTrace(trace)
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#endif
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#define SIF_LOG macTrace(SIF)
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#define SIF_LOG macTrace(SIF)
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@ -385,45 +387,9 @@ extern void __Log( const char* fmt, ... );
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#define GPU_LOG macTrace(IOP.GPU)
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#define GPU_LOG macTrace(IOP.GPU)
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#define CDVD_LOG macTrace(IOP.CDVD)
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#define CDVD_LOG macTrace(IOP.CDVD)
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#else // PCSX2_DEVBUILD
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#define CPU_LOG 0&&
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#define ELF_LOG SysConsole.ELF.IsActive() && SysConsole.ELF.Write
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#define MEM_LOG 0&&
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#define eeRecPerfLog SysConsole.eeRecPerf.IsActive() && SysConsole.eeRecPerf
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#define HW_LOG 0&&
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#define eeConLog SysConsole.eeConsole.IsActive() && SysConsole.eeConsole.Write
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#define DMA_LOG 0&&
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#define eeDeci2Log SysConsole.deci2.IsActive() && SysConsole.deci2.Write
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#define BIOS_LOG 0&&
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#define iopConLog SysConsole.iopConsole.IsActive()&& SysConsole.iopConsole.Write
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#define VU0_LOG 0&&
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#define COP0_LOG 0&&
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#define UnknownHW_LOG 0&&
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#define VIF_LOG 0&&
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#define SPR_LOG 0&&
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#define GIF_LOG 0&&
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#define SIF_LOG 0&&
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#define IPU_LOG 0&&
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#define VUM_LOG 0&&
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#define VifCodeLog 0&&
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#define PSXCPU_LOG 0&&
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#define PSXMEM_LOG 0&&
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#define PSXHW_LOG 0&&
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#define PSXUnkHW_LOG 0&&
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#define PSXBIOS_LOG 0&&
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#define PSXDMA_LOG 0&&
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#define PAD_LOG 0&&
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#define CDR_LOG 0&&
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#define CDVD_LOG 0&&
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#define GPU_LOG 0&&
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#define PSXCNT_LOG 0&&
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#define EECNT_LOG 0&&
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#define EMU_LOG 0&&
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#define CACHE_LOG 0&&
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#define MEMCARDS_LOG 0&&
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#endif
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#define ELF_LOG SysConsole.ELF.IsActive() && SysConsole.ELF.Write
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#define eeRecPerfLog SysConsole.eeRecPerf.IsActive() && SysConsole.eeRecPerf
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#define eeConLog SysConsole.eeConsole.IsActive() && SysConsole.eeConsole.Write
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#define eeDeci2Log SysConsole.deci2.IsActive() && SysConsole.deci2.Write
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#define iopConLog SysConsole.iopConsole.IsActive() && SysConsole.iopConsole.Write
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@ -73,6 +73,49 @@ void __fastcall _hwWrite32( u32 mem, u32 value )
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return;
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return;
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case 0x03:
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case 0x03:
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if (mem >= EEMemoryMap::VIF0_Start)
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{
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if(mem >= EEMemoryMap::VIF1_Start)
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{
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if (!vifWrite32<1>(mem, value)) return;
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}
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else
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{
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if (!vifWrite32<0>(mem, value)) return;
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}
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}
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else iswitch(mem)
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{
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icase(GIF_CTRL)
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{
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psHu32(mem) = value & 0x8;
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if (value & 0x1)
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gsGIFReset();
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if (value & 8)
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gifRegs.stat.PSE = true;
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else
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gifRegs.stat.PSE = false;
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return;
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}
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icase(GIF_MODE)
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{
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// need to set GIF_MODE (hamster ball)
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gifRegs.mode.write(value);
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// set/clear bits 0 and 2 as per the GIF_MODE value.
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const u32 bitmask = GIF_MODE_M3R | GIF_MODE_IMT;
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psHu32(GIF_STAT) &= ~bitmask;
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psHu32(GIF_STAT) |= (u32)value & bitmask;
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return;
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}
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}
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break;
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case 0x08:
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case 0x08:
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case 0x09:
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case 0x09:
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case 0x0a:
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case 0x0a:
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@ -289,7 +289,7 @@ static __fi void TESTINT( u8 n, void (*callback)() )
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static __fi void _cpuTestInterrupts()
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static __fi void _cpuTestInterrupts()
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{
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{
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if (!dmacRegs.ctrl.DMAE || psHu8(DMAC_ENABLER+2) == 1)
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if (!dmacRegs.ctrl.DMAE || (psHu8(DMAC_ENABLER+2) & 1))
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{
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{
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//Console.Write("DMAC Disabled or suspended");
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//Console.Write("DMAC Disabled or suspended");
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return;
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return;
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@ -415,7 +415,7 @@ __fi void _cpuBranchTest_Shared()
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//if( EEsCycle < -450 )
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//if( EEsCycle < -450 )
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// Console.WriteLn( " IOP ahead by: %d cycles", -EEsCycle );
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// Console.WriteLn( " IOP ahead by: %d cycles", -EEsCycle );
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// Experimental and Probably Unnecessry Logic -->
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// Experimental and Probably Unnecessary Logic -->
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// Check if the EE already has an exception pending, and if so we shouldn't
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// Check if the EE already has an exception pending, and if so we shouldn't
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// waste too much time updating the IOP. Theory being that the EE and IOP should
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// waste too much time updating the IOP. Theory being that the EE and IOP should
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// run closely in sync during raised exception events. But in practice it didn't
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// run closely in sync during raised exception events. But in practice it didn't
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cpuRegs.sCycle[30] = cpuRegs.cycle;
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cpuRegs.sCycle[30] = cpuRegs.cycle;
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cpuRegs.eCycle[30] = 4; //Needs to be 4 to account for bus delays/pipelines etc
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cpuRegs.eCycle[30] = 4; //Needs to be 4 to account for bus delays/pipelines etc
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// only set the next branch delta if the exception won't be handled for
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cpuSetNextBranchDelta( 4 );
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// the current branch...
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if(eeEventTestIsActive && (psxCycleEE > 0))
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if( !eeEventTestIsActive )
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cpuSetNextBranchDelta( 4 );
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else if(psxCycleEE > 0)
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{
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{
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psxBreak += psxCycleEE; // record the number of cycles the IOP didn't run.
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psxBreak += psxCycleEE; // record the number of cycles the IOP didn't run.
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psxCycleEE = 0;
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psxCycleEE = 0;
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@ -529,11 +526,8 @@ __fi void cpuTestDMACInts()
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cpuRegs.sCycle[31] = cpuRegs.cycle;
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cpuRegs.sCycle[31] = cpuRegs.cycle;
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cpuRegs.eCycle[31] = 4; //Needs to be 4 to account for bus delays/pipelines etc
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cpuRegs.eCycle[31] = 4; //Needs to be 4 to account for bus delays/pipelines etc
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// only set the next branch delta if the exception won't be handled for
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cpuSetNextBranchDelta( 4 );
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// the current branch...
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if(eeEventTestIsActive && (psxCycleEE > 0))
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if( !eeEventTestIsActive )
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cpuSetNextBranchDelta( 4 );
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else if(psxCycleEE > 0)
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{
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{
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psxBreak += psxCycleEE; // record the number of cycles the IOP didn't run.
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psxBreak += psxCycleEE; // record the number of cycles the IOP didn't run.
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psxCycleEE = 0;
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psxCycleEE = 0;
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@ -868,8 +868,7 @@ void SYSCALL()
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}
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}
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// The only thing this code is used for is the one log message, so don't execute it if we aren't logging bios messages.
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// The only thing this code is used for is the one log message, so don't execute it if we aren't logging bios messages.
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#ifdef PCSX2_DEVBUILD
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if (SysTraceActive(EE.Bios) && (call == 0x77))
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if (SysTrace.EE.Bios.IsActive() && (call == 0x77))
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{
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{
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t_sif_dma_transfer *dmat;
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t_sif_dma_transfer *dmat;
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//struct t_sif_cmd_header *hdr;
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//struct t_sif_cmd_header *hdr;
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@ -891,7 +890,6 @@ void SYSCALL()
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dmat->dest, dmat->src);
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dmat->dest, dmat->src);
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}
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}
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}
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}
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#endif
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cpuRegs.pc -= 4;
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cpuRegs.pc -= 4;
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cpuException(0x20, cpuRegs.branch);
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cpuException(0x20, cpuRegs.branch);
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@ -211,12 +211,12 @@ static __ri void IopHwTraceLog( u32 addr, T val, bool mode )
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switch( sizeof (T) )
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switch( sizeof (T) )
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{
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{
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case 1: valStr.Write("0x%02x", val); break;
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case 1: valStr.Write("0x%02x", val); break;
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case 2: valStr.Write("0x%04x", val); break;
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case 2: valStr.Write("0x%04x", val); break;
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case 4: valStr.Write("0x%08x", val); break;
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case 4: valStr.Write("0x%08x", val); break;
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case 8: valStr.Write("0x%08x.%08x", ((u32*)&val)[1], ((u32*)&val)[0]); break;
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case 8: valStr.Write("0x%08x.%08x", ((u32*)&val)[1], ((u32*)&val)[0]); break;
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case 16: ((u128&)val).WriteTo(valStr);
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case 16: ((u128&)val).WriteTo(valStr);
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}
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}
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static const char* temp = "%-12s @ 0x%08X/%-16s %s %s";
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static const char* temp = "%-12s @ 0x%08X/%-16s %s %s";
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@ -290,42 +290,7 @@ __fi u32 dmacRead32( u32 mem )
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template< uint page >
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template< uint page >
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__fi bool dmacWrite32( u32 mem, mem32_t& value )
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__fi bool dmacWrite32( u32 mem, mem32_t& value )
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{
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{
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if (IsPageFor(EEMemoryMap::VIF0_Start) && (mem >= EEMemoryMap::VIF0_Start))
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{
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return (mem >= EEMemoryMap::VIF1_Start)
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? vifWrite32<1>(mem, value)
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: vifWrite32<0>(mem, value);
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}
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iswitch(mem) {
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iswitch(mem) {
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icase(GIF_CTRL)
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{
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psHu32(mem) = value & 0x8;
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if (value & 0x1)
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gsGIFReset();
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if (value & 8)
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gifRegs.stat.PSE = true;
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else
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gifRegs.stat.PSE = false;
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return false;
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}
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icase(GIF_MODE)
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{
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// need to set GIF_MODE (hamster ball)
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gifRegs.mode.write(value);
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// set/clear bits 0 and 2 as per the GIF_MODE value.
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const u32 bitmask = GIF_MODE_M3R | GIF_MODE_IMT;
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psHu32(GIF_STAT) &= ~bitmask;
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psHu32(GIF_STAT) |= (u32)value & bitmask;
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return false;
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}
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icase(D0_CHCR) // dma0 - vif0
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icase(D0_CHCR) // dma0 - vif0
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{
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{
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DMA_LOG("VIF0dma EXECUTE, value=0x%x", value);
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DMA_LOG("VIF0dma EXECUTE, value=0x%x", value);
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@ -670,7 +670,7 @@ void psxRecompileCodeConst1(R3000AFNPTR constcode, R3000AFNPTR_INFO noconstcode)
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const char *funcname = irxImportFuncname(libname, index);
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const char *funcname = irxImportFuncname(libname, index);
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irxDEBUG debug = irxImportDebug(libname, index);
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irxDEBUG debug = irxImportDebug(libname, index);
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if (SysTrace.IOP.Bios.IsActive()) {
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if (SysTraceActive(IOP.Bios)) {
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xMOV(ecx, (uptr)libname);
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xMOV(ecx, (uptr)libname);
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xMOV(edx, index);
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xMOV(edx, index);
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xPUSH((uptr)funcname);
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xPUSH((uptr)funcname);
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