mirror of https://github.com/PCSX2/pcsx2.git
Convert Sif.cpp & Vif.cpp to use the Tags.h code.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1646 96395faa-99c1-11dd-bbfe-3dabce05a288
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9714a50dc5
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@ -140,6 +140,7 @@ __forceinline void SIF0Dma()
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if (sif0.counter == 0) // If there's no more to transfer
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{
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// Note.. add normal mode here
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// The if statement doesn't seem to match the description...
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if (sif0.sifData.data & 0xC0000000) // If NORMAL mode or end of CHAIN, or interrupt then stop DMA
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{
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SIF_LOG(" IOP SIF Stopped");
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@ -153,7 +154,7 @@ __forceinline void SIF0Dma()
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PSX_INT(IopEvt_SIF0, psxCycles);
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sif0.sifData.data = 0;
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done = TRUE;
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done = true;
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}
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else // Chain mode
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{
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@ -173,7 +174,7 @@ __forceinline void SIF0Dma()
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SIF_LOG(" END");
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else
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SIF_LOG(" CNT %08X, %08X", sif0.sifData.data, sif0.sifData.words);
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done = FALSE;
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done = false;
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}
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}
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else // There's some data ready to transfer into the fifo..
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@ -220,7 +221,8 @@ __forceinline void SIF0Dma()
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if (sif0dma->qwc == 0)
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{
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if (((sif0dma->chcr & 0x80000080) == 0x80000080) || (sif0.end)) // Stop on tag IRQ or END
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// Stop if TIE & the IRQ are set, or at the end. (I'll try to convert this to use the tags code later.)
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if (((sif0dma->chcr & 0x80000080) == 0x80000080) || (sif0.end))
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{
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if (sif0.end)
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SIF_LOG(" EE SIF end");
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@ -229,7 +231,7 @@ __forceinline void SIF0Dma()
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eesifbusy[0] = 0;
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CPU_INT(5, cycles*BIAS);
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done = TRUE;
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done = true;
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}
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else if (sif0.fifoSize >= 4) // Read a tag
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{
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@ -243,11 +245,12 @@ __forceinline void SIF0Dma()
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SIF_LOG(" EE SIF dest chain tag madr:%08X qwc:%04X id:%X irq:%d(%08X_%08X)", sif0dma->madr, sif0dma->qwc, (tag[0] >> 28)&3, (tag[0] >> 31)&1, tag[1], tag[0]);
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if ((psHu32(DMAC_CTRL) & 0x30) != 0 && ((tag[0] >> 28)&3) == 0)
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// (tag[0] >> 28) & 3? Surely this is supposed to be (tag[0] >> 28) & 7? --arcum42
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if ((psHu32(DMAC_CTRL) & 0x30) != 0 && ((tag[0] >> 28) & 3) == 0)
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psHu32(DMAC_STADR) = sif0dma->madr + (sif0dma->qwc * 16);
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sif0.chain = 1;
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if (tag[0] & 0x40000000) sif0.end = 1;
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done = FALSE;
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done = false;
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}
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}
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@ -258,7 +261,6 @@ __forceinline void SIF0Dma()
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__forceinline void SIF1Dma()
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{
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int id;
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u32 *ptag;
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bool done = FALSE;
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int cycles = 0, psxCycles = 0;
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@ -272,12 +274,12 @@ __forceinline void SIF1Dma()
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if (sif1dma->qwc == 0) // If there's no more to transfer
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{
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if ((sif1dma->chcr & 0xc) == 0 || sif1.end) // If NORMAL mode or end of CHAIN then stop DMA
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if ((CHCR::MOD(sif1dma) == NORMAL_MODE) || sif1.end) // If NORMAL mode or end of CHAIN then stop DMA
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{
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// Stop & signal interrupts on EE
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SIF_LOG("EE SIF1 End %x", sif1.end);
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eesifbusy[1] = 0;
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done = TRUE;
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done = true;
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CPU_INT(6, cycles*BIAS);
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sif1.chain = 0;
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sif1.end = 0;
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@ -285,7 +287,7 @@ __forceinline void SIF1Dma()
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else // Chain mode
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{
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// Process DMA tag at sif1dma->tadr
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done = FALSE;
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done = false;
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ptag = _dmaGetAddr(sif1dma, sif1dma->tadr, 6);
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if (ptag == NULL) return;
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@ -295,16 +297,15 @@ __forceinline void SIF1Dma()
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sif1dma->chcr = (sif1dma->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); // Copy the tag
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sif1dma->qwc = (u16)ptag[0];
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if (sif1dma->chcr & 0x40)
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if (CHCR::TTE(sif1dma))
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{
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Console::WriteLn("SIF1 TTE");
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SIF1write(ptag + 2, 2);
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}
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sif1.chain = 1;
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id = (ptag[0] >> 28) & 0x7;
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switch (id)
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switch (Tag::Id(ptag))
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{
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case TAG_REFE: // refe
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SIF_LOG(" REFE %08X", ptag[1]);
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@ -342,7 +343,7 @@ __forceinline void SIF1Dma()
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default:
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Console::WriteLn("Bad addr1 source chain");
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}
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if ((sif1dma->chcr & 0x80) && (ptag[0] >> 31))
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if ((CHCR::TIE(sif1dma)) && (Tag::IRQ(ptag)))
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{
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Console::WriteLn("SIF1 TIE");
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sif1.end = 1;
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@ -355,7 +356,7 @@ __forceinline void SIF1Dma()
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u32 *data;
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data = _dmaGetAddr(sif1dma, sif1dma->madr, 6);
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if (data == NULL) return;
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if (data == NULL) return;
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//_dmaGetAddr(sif1dma, *data, sif1dma->madr, 6);
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@ -374,7 +375,7 @@ __forceinline void SIF1Dma()
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{
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int size = sif1.counter;
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if (size > 0) // If we're reading something continue to do so
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if (size > 0) // If we're reading something, continue to do so.
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{
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int readSize = size;
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@ -401,7 +402,7 @@ __forceinline void SIF1Dma()
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iopsifbusy[1] = 0;
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PSX_INT(IopEvt_SIF1, psxCycles);
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sif1.tagMode = 0;
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done = TRUE;
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done = true;
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}
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else if (sif1.fifoSize >= 4) // Read a tag
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{
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@ -411,7 +412,7 @@ __forceinline void SIF1Dma()
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HW_DMA10_MADR = d.data & 0xffffff;
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sif1.counter = d.words;
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sif1.tagMode = (d.data >> 24) & 0xFF;
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done = FALSE;
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done = false;
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}
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}
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}
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@ -433,14 +434,14 @@ __forceinline void sif1Interrupt()
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__forceinline void EEsif0Interrupt()
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{
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sif0dma->chcr &= ~0x100;
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hwDmacIrq(DMAC_SIF0);
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CHCR::clearSTR(sif0dma);
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}
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__forceinline void EEsif1Interrupt()
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{
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hwDmacIrq(DMAC_SIF1);
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sif1dma->chcr &= ~0x100;
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CHCR::clearSTR(sif1dma);
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}
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__forceinline void dmaSIF0()
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@ -495,7 +496,7 @@ __forceinline void dmaSIF2()
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SIF_LOG("dmaSIF2 chcr = %lx, madr = %lx, qwc = %lx",
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sif2dma->chcr, sif2dma->madr, sif2dma->qwc);
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sif2dma->chcr &= ~0x100;
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CHCR::clearSTR(sif2dma);
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hwDmacIrq(DMAC_SIF2);
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Console::WriteLn("*PCSX2*: dmaSIF2");
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}
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@ -453,7 +453,7 @@ void mfifoVIF1transfer(int qwc)
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{
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ptag = (u32*)dmaGetAddr(vif1ch->tadr);
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if (vif1ch->chcr & 0x40)
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if (CHCR::TTE(vif1ch))
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{
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if (vif1.stallontag)
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ret = VIF1transfer(ptag + (2 + vif1.irqoffset), 2 - vif1.irqoffset, 1); //Transfer Tag on Stall
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@ -467,15 +467,14 @@ void mfifoVIF1transfer(int qwc)
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return; //IRQ set by VIFTransfer
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}
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}
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id = (ptag[0] >> 28) & 0x7;
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vif1ch->qwc = (ptag[0] & 0xffff);
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vif1ch->madr = ptag[1];
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vif1ch->chcr = (vif1ch->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000);
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Tag::UnsafeTransfer(vif1ch, ptag);
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SPR_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx mfifo qwc = %x spr0 madr = %x",
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ptag[1], ptag[0], vif1ch->qwc, id, vif1ch->madr, vif1ch->tadr, vifqwc, spr0->madr);
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vif1ch->madr = ptag[1];
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id =Tag::Id(ptag);
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vifqwc--;
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switch (id)
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break;
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}
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if ((vif1ch->chcr & 0x80) && (ptag[0] >> 31))
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if ((CHCR::TIE(vif1ch)) && (Tag::IRQ(ptag)))
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{
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VIF_LOG("dmaIrq Set");
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vif1.done = true;
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@ -530,29 +529,28 @@ void vifMFIFOInterrupt()
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{
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g_vifCycles = 0;
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if(schedulepath3msk) Vif1MskPath3();
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if (schedulepath3msk) Vif1MskPath3();
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if((vif1Regs->stat & VIF1_STAT_VGW))
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if ((vif1Regs->stat & VIF1_STAT_VGW))
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{
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if(gif->chcr & 0x100)
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if (CHCR::STR(gif))
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{
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CPU_INT(10, 16);
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return;
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}
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else vif1Regs->stat &= ~VIF1_STAT_VGW;
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else
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{
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vif1Regs->stat &= ~VIF1_STAT_VGW;
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}
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}
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if((spr0->chcr & 0x100) && spr0->qwc == 0)
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if ((CHCR::STR(spr0)) && (spr0->qwc == 0))
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{
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spr0->chcr &= ~0x100;
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CHCR::clearSTR(spr0);
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hwDmacIrq(DMAC_FROM_SPR);
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}
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if (vif1.irq && vif1.tag.size == 0)
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{
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vif1Regs->stat |= VIF1_STAT_INT;
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@ -561,7 +559,7 @@ void vifMFIFOInterrupt()
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if (vif1Regs->stat & (VIF1_STAT_VSS | VIF1_STAT_VIS | VIF1_STAT_VFS))
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{
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vif1Regs->stat &= ~0x1F000000; // FQC=0
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vif1ch->chcr &= ~0x100;
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CHCR::clearSTR(vif1ch);
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return;
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}
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}
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@ -608,7 +606,7 @@ void vifMFIFOInterrupt()
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vif1.done = 1;
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g_vifCycles = 0;
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vif1ch->chcr &= ~0x100;
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CHCR::clearSTR(vif1ch);
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hwDmacIrq(DMAC_VIF1);
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VIF_LOG("vif mfifo dma end");
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