From 42cb1c4bb15b97d6b1a4e8771c1c315f3aa0f4f9 Mon Sep 17 00:00:00 2001
From: ramapcsx2 <ramapcsx2@96395faa-99c1-11dd-bbfe-3dabce05a288>
Date: Wed, 17 Feb 2010 22:37:13 +0000
Subject: [PATCH] SPU2-X: - Ok, that interrupt commit in r2600 was silly. The
 "special register write" is a simple set audio to max volume. We don't
 interrupt those :p NEW IOP DMAC: - Make the adma interrupts happen early, as
 in the previous commit for old dmac.

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2602 96395faa-99c1-11dd-bbfe-3dabce05a288
---
 pcsx2/IopDma.cpp                 | 10 +++++++++-
 plugins/spu2-x/src/ReadInput.cpp |  2 ++
 plugins/spu2-x/src/spu2sys.cpp   | 17 +++++++++++------
 3 files changed, 22 insertions(+), 7 deletions(-)

diff --git a/pcsx2/IopDma.cpp b/pcsx2/IopDma.cpp
index 8b1786fc60..e7440ec5e0 100644
--- a/pcsx2/IopDma.cpp
+++ b/pcsx2/IopDma.cpp
@@ -512,7 +512,15 @@ static void __releaseinline IopDmaProcessChannel(int elapsed, int& MinDelay)
 
 				if (RequestedDelay != 0) NextUpdateDelay = RequestedDelay;
 
-				ch->NextUpdate += NextUpdateDelay;
+				// SPU2 adma early interrupts. PCSX2 likes those better currently.
+				if((channel==4 || channel==7) && (ch->ByteCount<=0) && (ProcessedBytes <= 1024))
+				{
+				 	ch->NextUpdate = 0;
+	 			}
+				else 
+					ch->NextUpdate += NextUpdateDelay;
+
+				//ch->NextUpdate += NextUpdateDelay;
 			}
 		}
 
diff --git a/plugins/spu2-x/src/ReadInput.cpp b/plugins/spu2-x/src/ReadInput.cpp
index 6e55f2755f..3b201edfc3 100644
--- a/plugins/spu2-x/src/ReadInput.cpp
+++ b/plugins/spu2-x/src/ReadInput.cpp
@@ -90,6 +90,7 @@ StereoOut32 V_Core::ReadInput_HiFi()
 					}
 				}
 				InputDataLeft	= 0;
+				// Hack, kinda. We call the interrupt early here, since PCSX2 doesn't like them delayed.
 				//DMAICounter		= 1;
 				if(Index == 0)	{ if(dma4callback) dma4callback(); }
 				else			{ if(dma7callback) dma7callback(); }
@@ -151,6 +152,7 @@ StereoOut32 V_Core::ReadInput()
 				}
 
 				InputDataLeft = 0;
+				// Hack, kinda. We call the interrupt early here, since PCSX2 doesn't like them delayed.
 				//DMAICounter   = 1;
 				if(Index == 0)	{ if(dma4callback) dma4callback(); }
 				else			{ if(dma7callback) dma7callback(); }
diff --git a/plugins/spu2-x/src/spu2sys.cpp b/plugins/spu2-x/src/spu2sys.cpp
index 4762d999f5..943435c915 100644
--- a/plugins/spu2-x/src/spu2sys.cpp
+++ b/plugins/spu2-x/src/spu2sys.cpp
@@ -1431,12 +1431,17 @@ __forceinline void SPU2_FastWrite( u32 rmem, u16 value )
 {
 	// Check for these 2 adresses and schedule an interrupt when they get written with 0x3fff.
 	// This is what peops spu2 does, and it helps silent hill origins start a bit more stuff.
-	if (value == 0x3fff && (rmem == 0x1f900500 || rmem == 0x1f900400) ) {
-		// no idea which core ><
-		Spdif.Info |= 4 << 0; 
-		SetIrqCall();
-		ConLog( "SPU2-X: Schedule IRQ for odd register write. rmem = %x , value = %x \n", rmem, value);
-	}
+	
+	// Update: 0x1f900400 is core0's volume register. Interrupting here is wrong.
+	// So SH:O just set the volume to max, which is a pretty normal operation anyway.
+	// Keeping this in for reference :p
+
+	//if (value == 0x3fff && (rmem == 0x1f900500 || rmem == 0x1f900400) ) {
+	//	// no idea which core ><
+	//	Spdif.Info |= 4 << 0; 
+	//	SetIrqCall();
+	//	ConLog( "SPU2-X: Schedule IRQ for odd register write. rmem = %x , value = %x \n", rmem, value);
+	//}
 
 	tbl_reg_writes[(rmem&0x7ff)/2]( value );
 }