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Fix for Beyond Good and Evil (maybe Raving Rabids too), added a couple of bits of logging for 8 and 16 bit reads. 

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3328 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
refraction 2010-06-27 15:34:04 +00:00
parent 9a9c41f59e
commit 4186201f3b
3 changed files with 13 additions and 3 deletions
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3
pcsx2/Hw.h
View File

@ -132,6 +132,9 @@ enum EERegisterAddresses
D0_CHCR = 0x10008000,
D0_MADR = 0x10008010,
D0_QWC = 0x10008020,
D0_TADR = 0x10008030,
D0_ASR0 = 0x10008040,
D0_ASR1 = 0x10008050,
//VIF1
D1_CHCR = 0x10009000,

8
pcsx2/HwRead.cpp
View File

@ -36,6 +36,7 @@ __forceinline mem8_t hwRead8(u32 mem)
{
u8 ret;
const u16 masked_mem = mem & 0xffff;
// TODO re-implement this warning along with a *complete* logging of all hw activity.
// (implementation should be modelled after thee iopHWRead/iopHwWrite files)
if( mem >= IPU_CMD && mem < D0_CHCR )
@ -50,7 +51,8 @@ __forceinline mem8_t hwRead8(u32 mem)
switch((mem >> 12) & 0xf)
{
case 0x03:
if((mem & 0xfff) < 0x800) break;
if(masked_mem >= 0x3800) HW_LOG("VIF%x Register Read8 at 0x%x, value=0x%x", (masked_mem < 0x3c00) ? 0 : 1, mem, psHu32(mem) );
else HW_LOG("GIF Register Read8 at 0x%x, value=0x%x", mem, psHu32(mem) );
case 0x04:
case 0x05:
case 0x06:
@ -151,6 +153,7 @@ __forceinline mem8_t hwRead8(u32 mem)
__forceinline mem16_t hwRead16(u32 mem)
{
u16 ret;
const u16 masked_mem = mem & 0xffff;
// TODO re-implement this warning along with a *complete* logging of all hw activity.
// (implementation should be modelled after the iopHWRead/iopHwWrite files)
@ -167,7 +170,8 @@ __forceinline mem16_t hwRead16(u32 mem)
switch((mem >> 12) & 0xf)
{
case 0x03:
if((mem & 0xfff) < 0x800) break;
if(masked_mem >= 0x3800) HW_LOG("VIF%x Register Read8 at 0x%x, value=0x%x", (masked_mem < 0x3c00) ? 0 : 1, mem, psHu32(mem) );
else HW_LOG("GIF Register Read8 at 0x%x, value=0x%x", mem, psHu32(mem) );
case 0x04:
case 0x05:
case 0x06:

5
pcsx2/Vif0_Dma.cpp
View File

@ -246,6 +246,9 @@ void dmaVIF0()
vif0Regs->stat.FQC = min((u16)0x8, vif0ch->qwc);
//Using a delay as Beyond Good and Evil does the DMA twice with 2 different TADR's (no checks in the middle, all one block of code),
//the first bit it sends isnt required for it to work.
//Also being an end chain it ignores the second lot, this causes infinite loops ;p
// Chain Mode
vif0Interrupt();
CPU_INT(DMAC_VIF0, 4);
}