diff --git a/pcsx2/x86/ix86-32/iR5900-32.cpp b/pcsx2/x86/ix86-32/iR5900-32.cpp
index 6d568c95b8..9926bed745 100644
--- a/pcsx2/x86/ix86-32/iR5900-32.cpp
+++ b/pcsx2/x86/ix86-32/iR5900-32.cpp
@@ -1348,6 +1348,10 @@ void __fastcall dyna_block_discard(u32 start,u32 sz)
 	Cpu->Clear(start,sz);
 }
 
+#define VTLB_ALLOC_SIZE (0x2900000)	//this is a bit more than required
+extern u8* vtlb_alloc_base;		//base of the memory array
+extern u8  vtlb_alloc_bits[VTLB_ALLOC_SIZE/16/8];		//328 kb
+
 void recRecompile( const u32 startpc )
 {
 	u32 i = 0;
@@ -1707,7 +1711,57 @@ StartRecomp:
 			{
 				MOV32ItoR(ECX, startpc);
 				MOV32ItoR(EDX, sz);
+				
+				u32 mask=0;
+				u32 writen=0;
+				u32 writen_start=0;
 
+				u32 lpc=inpage_ptr;
+				u32 stg=pgsz;
+
+				while(stg>0)
+				{
+					u32 bit=(lpc>>4)&7;
+					if (mask==0)
+					{
+						//writen=bit;
+						writen_start=(((u8*)PSM(lpc)-vtlb_alloc_base)>>4)/8;
+					}
+					mask|=1<<bit;
+
+					if (bit==31)
+					{
+						vtlb_alloc_bits[writen_start]&=~mask;
+						TEST32ItoM((uptr)&vtlb_alloc_bits[writen_start],mask);
+						JNZ32(((u32)&dyna_block_discard)- ( (u32)x86Ptr[0] + 6 ));
+						SysPrintf("%08X %d %d\n",mask,pgsz,pgsz>>4);
+						mask=0;
+					}
+
+					//writen++;
+
+					if (stg<=16)
+					{
+						lpc+=stg;
+						stg=0;
+					}
+					else
+					{
+						lpc+=16;
+						stg-=16;
+					}
+				}
+
+				if (mask)
+				{
+					vtlb_alloc_bits[writen_start]&=~mask;
+					TEST32ItoM((uptr)&vtlb_alloc_bits[writen_start],mask);
+					JNZ32(((u32)&dyna_block_discard)- ( (u32)x86Ptr[0] + 6 ));
+					SysPrintf("%08X %d %d\n",mask,pgsz,pgsz>>4);
+					mask=0;
+				}
+
+				/*
 				u32 lpc=inpage_ptr;
 				u32 stg=pgsz;
 				while(stg>0)
@@ -1719,6 +1773,7 @@ StartRecomp:
 					stg-=4;
 					lpc+=4;
 				}
+				*/
 				DbgCon::WriteLn("Manual block @ %08X : %08X %d %d %d %d", params
 					startpc,inpage_ptr,pgsz,0x1000-inpage_offs,inpage_sz,sz*4);
 			}
diff --git a/pcsx2/x86/ix86-32/recVTLB.cpp b/pcsx2/x86/ix86-32/recVTLB.cpp
index d830a26d9d..243acb01be 100644
--- a/pcsx2/x86/ix86-32/recVTLB.cpp
+++ b/pcsx2/x86/ix86-32/recVTLB.cpp
@@ -28,6 +28,10 @@ u8* code_pos=0;
 u8* code_start=0;
 u32 code_sz;
 
+#define VTLB_ALLOC_SIZE (0x2900000)	//this is a bit more than required
+extern u8* vtlb_alloc_base;		//base of the memory array
+extern u8  vtlb_alloc_bits[VTLB_ALLOC_SIZE/16/8];		//328 kb
+
 union _vtlb_MemOpInfo
 {
 	struct
@@ -82,6 +86,7 @@ void execuCode(bool set)
 
 u8* IndirectPlaceholderA()
 {
+	//Add32 <eax>,imm, 6 bytes form.
 	write8<_EmitterId_>( 0x81 ); 
 	ModRM<_EmitterId_>( 3, 0, EAX );
 
@@ -100,7 +105,7 @@ void IndirectPlaceholderB(u8* pl,bool read,u32 sz,bool sx)
 	
 	u8* old=x86SetPtr(pl);
 	inf.skip=old-pl-4;
-	//Add32 <eax>,imm, 6 bytes form.
+	//Add32 <eax>,imm, 6 bytes form, patch the imm value
 	write32<_EmitterId_>( inf.full );
 	x86SetPtr(old);
 }
@@ -470,7 +475,13 @@ static void _vtlb_DynGen_DirectWrite( u32 bits )
 		break;
 	}
 
-//	SHR32ItoR(ECX,4);// do /16
+	SHR32ItoR(ECX,4);// do /16
+	uptr alloc_base=(uptr)vtlb_alloc_base;
+	
+	uptr bits_base=(uptr)vtlb_alloc_bits;
+	bits_base-=(alloc_base>>4)/8;//in bytes
+
+	BTS32MtoR(bits_base,ECX);
 //	BTS_wtf(asdasd,ECX);
 }
 
diff --git a/pcsx2/x86/ix86/ix86.inl b/pcsx2/x86/ix86/ix86.inl
index 7394bd6a3a..24e197ffcf 100644
--- a/pcsx2/x86/ix86/ix86.inl
+++ b/pcsx2/x86/ix86/ix86.inl
@@ -2311,6 +2311,15 @@ emitterT void eAND32ItoM( uptr to, u32 from )
 	}
 }
 
+/* bts imm32 to r32 */
+emitterT void eBTS32MtoR( uptr to, x86IntRegType from ) 
+{
+	RexR(0,from);
+	write8<I>( 0xf ); 
+	write8<I>( 0xab ); 
+	ModRM<I>( 0, from, DISP32 );
+	write32<I>( MEMADDR(to, 4) ); 
+}
 
 /* and sign ext imm8 to m32 */
 emitterT void eAND32I8toM( uptr to, u8 from ) 
diff --git a/pcsx2/x86/ix86/ix86_macros.h b/pcsx2/x86/ix86/ix86_macros.h
index 2ad9cdfe47..560b68e8aa 100644
--- a/pcsx2/x86/ix86/ix86_macros.h
+++ b/pcsx2/x86/ix86/ix86_macros.h
@@ -286,6 +286,7 @@
 #define AND8RtoM eAND8RtoM<_EmitterId_>
 #define AND8MtoR eAND8MtoR<_EmitterId_>
 #define AND8RtoR eAND8RtoR<_EmitterId_>
+#define BTS32MtoR eBTS32MtoR<_EmitterId_>
 #define NOT64R eNOT64R<_EmitterId_>
 #define NOT32R eNOT32R<_EmitterId_>
 #define NOT32M eNOT32M<_EmitterId_>