mirror of https://github.com/PCSX2/pcsx2.git
GS: Fix up CLUT offset handling in 32bit I8 mode
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@ -158,36 +158,12 @@ void GSClut::Write(const GIFRegTEX0& TEX0, const GIFRegTEXCLUT& TEXCLUT)
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m_read.dirty = true;
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(this->*m_wc[TEX0.CSM][TEX0.CPSM][TEX0.PSM])(TEX0, TEXCLUT);
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// Mirror write to other half of buffer to simulate wrapping memory
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int offset = (TEX0.CSA & (TEX0.CPSM < PSM_PSMCT16 ? 15 : 31)) * 16;
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if (TEX0.PSM == PSM_PSMT8 || TEX0.PSM == PSM_PSMT8H)
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{
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int size = TEX0.CPSM < PSM_PSMCT16 ? 512 : 256;
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memcpy(m_clut + 512 + offset, m_clut + offset, sizeof(*m_clut) * std::min(size, 512 - offset));
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memcpy(m_clut, m_clut + 512, sizeof(*m_clut) * std::max(0, size + offset - 512));
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}
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else
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{
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int size = 16;
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memcpy(m_clut + 512 + offset, m_clut + offset, sizeof(*m_clut) * size);
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if (TEX0.CPSM < PSM_PSMCT16)
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{
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memcpy(m_clut + 512 + 256 + offset, m_clut + 256 + offset, sizeof(*m_clut) * size);
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}
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}
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}
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void GSClut::WriteCLUT32_I8_CSM1(const GIFRegTEX0& TEX0, const GIFRegTEXCLUT& TEXCLUT)
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{
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ALIGN_STACK(32);
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//FIXME: Romance of the Three Kingdoms VIII text doesn't like the offset
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WriteCLUT_T32_I8_CSM1((uint32*)m_mem->BlockPtr32(0, 0, TEX0.CBP, 1), m_clut + ((TEX0.CSA & 15) << 4));
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WriteCLUT_T32_I8_CSM1((uint32*)m_mem->BlockPtr32(0, 0, TEX0.CBP, 1), m_clut, (TEX0.CSA & 15));
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}
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void GSClut::WriteCLUT32_I4_CSM1(const GIFRegTEX0& TEX0, const GIFRegTEXCLUT& TEXCLUT)
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@ -443,16 +419,16 @@ void GSClut::GetAlphaMinMax32(int& amin_out, int& amax_out)
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//
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void GSClut::WriteCLUT_T32_I8_CSM1(const uint32* RESTRICT src, uint16* RESTRICT clut)
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void GSClut::WriteCLUT_T32_I8_CSM1(const uint32* RESTRICT src, uint16* RESTRICT clut, uint16 offset)
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{
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// 4 blocks
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for (int i = 0; i < 64; i += 16)
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// This is required when CSA is offset from the base of the CLUT so we point to the right data
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for (int i = offset; i < 16; i ++)
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{
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WriteCLUT_T32_I4_CSM1(&src[i + 0], &clut[i * 2 + 0]);
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WriteCLUT_T32_I4_CSM1(&src[i + 64], &clut[i * 2 + 16]);
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WriteCLUT_T32_I4_CSM1(&src[i + 128], &clut[i * 2 + 128]);
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WriteCLUT_T32_I4_CSM1(&src[i + 192], &clut[i * 2 + 144]);
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const int off = i << 4; // WriteCLUT_T32_I4_CSM1 loads 16 at a time
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// Source column
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const int s = clutTableT32I8[off & 0x70] | (off & 0x80);
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WriteCLUT_T32_I4_CSM1(&src[s], &clut[off]);
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}
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}
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@ -74,7 +74,7 @@ class alignas(32) GSClut : public GSAlignedClass<32>
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void WriteCLUT_NULL(const GIFRegTEX0& TEX0, const GIFRegTEXCLUT& TEXCLUT);
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static void WriteCLUT_T32_I8_CSM1(const uint32* RESTRICT src, uint16* RESTRICT clut);
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static void WriteCLUT_T32_I8_CSM1(const uint32* RESTRICT src, uint16* RESTRICT clut, uint16 offset);
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static void WriteCLUT_T32_I4_CSM1(const uint32* RESTRICT src, uint16* RESTRICT clut);
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static void WriteCLUT_T16_I8_CSM1(const uint16* RESTRICT src, uint16* RESTRICT clut);
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static void WriteCLUT_T16_I4_CSM1(const uint16* RESTRICT src, uint16* RESTRICT clut);
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