mirror of https://github.com/PCSX2/pcsx2.git
sVU_zerorec.cpp: Removed "using namespace std"
This commit is contained in:
archshift
Gui Andrade
parent
f808593b2d
commit
396e42e17c
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@ -45,7 +45,6 @@
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// Needed in gcc for find.
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#include <algorithm>
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using namespace std;
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using namespace x86Emitter;
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// temporary externs
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@ -151,7 +150,7 @@ struct VuFunctionHeader
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VuFunctionHeader() : startpc(0xffffffff), pprogfunc(NULL) {}
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~VuFunctionHeader()
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{
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for (vector<RANGE>::iterator it = ranges.begin(); it != ranges.end(); ++it)
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for (std::vector<RANGE>::iterator it = ranges.begin(); it != ranges.end(); ++it)
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{
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free(it->pmem);
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}
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@ -163,7 +162,7 @@ struct VuFunctionHeader
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u32 startpc;
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void* pprogfunc;
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vector<RANGE> ranges;
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std::vector<RANGE> ranges;
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};
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struct VuBlockHeader
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@ -203,7 +202,7 @@ class VuInstruction
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VuInstruction *pPrevInst;
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int SetCachedRegs(int upper, u32 vuxyz);
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void Recompile(list<VuInstruction>::iterator& itinst, u32 vuxyz);
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void Recompile(std::list<VuInstruction>::iterator& itinst, u32 vuxyz);
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};
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enum BlockType
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@ -221,7 +220,7 @@ enum BlockType
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class VuBaseBlock
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{
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public:
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typedef list<VuBaseBlock*> LISTBLOCKS;
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typedef std::list<VuBaseBlock*> LISTBLOCKS;
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VuBaseBlock();
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@ -229,8 +228,8 @@ class VuBaseBlock
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void AssignVFRegs();
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void AssignVIRegs(int parent);
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list<VuInstruction>::iterator GetInstIterAtPc(int instpc);
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void GetInstsAtPc(int instpc, list<VuInstruction*>& listinsts);
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std::list<VuInstruction>::iterator GetInstIterAtPc(int instpc);
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void GetInstsAtPc(int instpc, std::list<VuInstruction*>& listinsts);
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void Recompile();
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@ -241,8 +240,8 @@ class VuBaseBlock
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void* pcode; // x86 code pointer
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void* pendcode; // end of the x86 code pointer
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int cycles;
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list<VuInstruction> insts;
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list<VuBaseBlock*> parents;
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std::list<VuInstruction> insts;
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std::list<VuBaseBlock*> parents;
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LISTBLOCKS blocks; // blocks branches to
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u32* pChildJumps[4]; // addrs that need to be filled with the children's start addrs
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// if highest bit is set, addr needs to be relational
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@ -297,7 +296,7 @@ struct VUPIPELINES
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fdivPipe fdiv;
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efuPipe efu;
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ialuPipe ialu[8];
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list< WRITEBACK > listWritebacks;
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std::list< WRITEBACK > listWritebacks;
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};
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VuBaseBlock::VuBaseBlock()
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@ -316,17 +315,17 @@ VuBaseBlock::VuBaseBlock()
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#define SUPERVU_STACKSIZE 0x1000
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static list<VuFunctionHeader*> s_listVUHeaders[2];
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static list<VuFunctionHeader*>* s_plistCachedHeaders[2] = {NULL, NULL};
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static std::list<VuFunctionHeader*> s_listVUHeaders[2];
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static std::list<VuFunctionHeader*>* s_plistCachedHeaders[2] = {NULL, NULL};
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static VuFunctionHeader** recVUHeaders[2] = { NULL, NULL };
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static VuBlockHeader* recVUBlocks[2] = { NULL, NULL };
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static u8* recVUStack[2] = { NULL, NULL };
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static u8* recVUStackPtr[2] = { NULL, NULL };
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static vector<_x86regs> s_vecRegArray(128);
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static std::vector<_x86regs> s_vecRegArray(128);
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static VURegs* VU = NULL;
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static list<VuBaseBlock*> s_listBlocks;
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static std::list<VuBaseBlock*> s_listBlocks;
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static u32 s_vu = 0;
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static u32 s_UnconditionalDelay = 0; // 1 if there are two sequential branches and the last is unconditional
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static u32 g_nLastBlockExecuted = 0;
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@ -368,7 +367,7 @@ static void SuperVUAlloc(int vuindex)
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void DestroyCachedHeaders(int vuindex, int j)
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{
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list<VuFunctionHeader*>::iterator it = s_plistCachedHeaders[vuindex][j].begin();
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std::list<VuFunctionHeader*>::iterator it = s_plistCachedHeaders[vuindex][j].begin();
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while (it != s_plistCachedHeaders[vuindex][j].end())
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{
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@ -381,7 +380,7 @@ void DestroyCachedHeaders(int vuindex, int j)
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void DestroyVUHeaders(int vuindex)
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{
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list<VuFunctionHeader*>::iterator it = s_listVUHeaders[vuindex].begin();
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std::list<VuFunctionHeader*>::iterator it = s_listVUHeaders[vuindex].begin();
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while (it != s_listVUHeaders[vuindex].end())
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{
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@ -458,8 +457,8 @@ void SuperVUReset(int vuindex)
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// clear the block and any joining blocks (size given in bytes)
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static void __fastcall SuperVUClear(u32 startpc, u32 size, int vuindex)
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{
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vector<VuFunctionHeader::RANGE>::iterator itrange;
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list<VuFunctionHeader*>::iterator it = s_listVUHeaders[vuindex].begin();
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std::vector<VuFunctionHeader::RANGE>::iterator itrange;
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std::list<VuFunctionHeader*>::iterator it = s_listVUHeaders[vuindex].begin();
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u32 endpc = startpc + ((size + 7) & ~7); // Ensure size is a multiple of u64 (round up)
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while (it != s_listVUHeaders[vuindex].end())
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{
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@ -474,7 +473,7 @@ static void __fastcall SuperVUClear(u32 startpc, u32 size, int vuindex)
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{
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recVUHeaders[vuindex][(*it)->startpc/8] = NULL;
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#ifdef SUPERVU_CACHING
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list<VuFunctionHeader*>* plist = &s_plistCachedHeaders[vuindex][(*it)->startpc/8];
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std::list<VuFunctionHeader*>* plist = &s_plistCachedHeaders[vuindex][(*it)->startpc / 8];
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plist->push_back(*it);
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if (plist->size() > 30)
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{
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@ -547,7 +546,7 @@ u32 SuperVUGetVIAddr(int reg, int read)
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return (uptr)&VU->VI[reg];
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}
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void SuperVUDumpBlock(list<VuBaseBlock*>& blocks, int vuindex)
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void SuperVUDumpBlock(std::list<VuBaseBlock*>& blocks, int vuindex)
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{
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u32 *mem;
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u32 i;
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@ -563,8 +562,8 @@ void SuperVUDumpBlock(list<VuBaseBlock*>& blocks, int vuindex)
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INST_Q_READ, INST_P_READ, INST_CLIP_WRITE, INST_STATUS_WRITE, INST_MAC_WRITE, INST_Q_WRITE);
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eff.Printf("XMM: Upper: read0 read1 write acc temp; Lower: read0 read1 write acc temp\n\n");
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list<VuBaseBlock*>::iterator itblock;
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list<VuInstruction>::iterator itinst;
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std::list<VuBaseBlock*>::iterator itblock;
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std::list<VuInstruction>::iterator itinst;
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VuBaseBlock::LISTBLOCKS::iterator itchild;
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for(itblock = blocks.begin(); itblock != blocks.end(); itblock++)
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@ -710,7 +709,7 @@ void* SuperVUGetProgram(u32 startpc, int vuindex)
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#ifdef SUPERVU_CACHING
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void* pmem = (vuindex & 1) ? VU1.Micro : VU0.Micro;
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// check if program exists in cache
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list<VuFunctionHeader*>::iterator it;
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std::list<VuFunctionHeader*>::iterator it;
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for(it = s_plistCachedHeaders[vuindex][startpc/8].begin(); it != s_plistCachedHeaders[vuindex][startpc/8].end(); it++)
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{
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if ((*it)->IsSame(pmem))
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@ -750,7 +749,7 @@ void* SuperVUGetProgram(u32 startpc, int vuindex)
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bool VuFunctionHeader::IsSame(void* pmem)
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{
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#ifdef SUPERVU_CACHING
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vector<RANGE>::iterator it;
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std::vector<RANGE>::iterator it;
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for(it = ranges.begin(); it != ranges.end(); it++)
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{
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if (memcmp_mmx((u8*)pmem + it->start, it->pmem, it->size))
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@ -760,12 +759,12 @@ bool VuFunctionHeader::IsSame(void* pmem)
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return true;
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}
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list<VuInstruction>::iterator VuBaseBlock::GetInstIterAtPc(int instpc)
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std::list<VuInstruction>::iterator VuBaseBlock::GetInstIterAtPc(int instpc)
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{
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pxAssert(instpc >= 0);
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int curpc = startpc;
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list<VuInstruction>::iterator it;
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std::list<VuInstruction>::iterator it;
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for (it = insts.begin(); it != insts.end(); ++it)
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{
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if (it->type & INST_DUMMY) continue;
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@ -779,14 +778,14 @@ list<VuInstruction>::iterator VuBaseBlock::GetInstIterAtPc(int instpc)
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return insts.begin();
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}
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void VuBaseBlock::GetInstsAtPc(int instpc, list<VuInstruction*>& listinsts)
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void VuBaseBlock::GetInstsAtPc(int instpc, std::list<VuInstruction*>& listinsts)
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{
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pxAssert(instpc >= 0);
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listinsts.clear();
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int curpc = startpc;
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list<VuInstruction>::iterator it;
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std::list<VuInstruction>::iterator it;
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for (it = insts.begin(); it != insts.end(); ++it)
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{
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if (it->type & INST_DUMMY) continue;
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@ -801,7 +800,7 @@ void VuBaseBlock::GetInstsAtPc(int instpc, list<VuInstruction*>& listinsts)
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}
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// look for the pc in other blocks
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for (list<VuBaseBlock*>::iterator itblock = s_listBlocks.begin(); itblock != s_listBlocks.end(); ++itblock)
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for (std::list<VuBaseBlock*>::iterator itblock = s_listBlocks.begin(); itblock != s_listBlocks.end(); ++itblock)
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{
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if (*itblock == this) continue;
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@ -833,7 +832,7 @@ static VuFunctionHeader* SuperVURecompileProgram(u32 startpc, int vuindex)
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}
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}
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list<VuBaseBlock*>::iterator itblock;
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std::list<VuBaseBlock*>::iterator itblock;
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s_vu = vuindex;
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VU = s_vu ? &VU1 : &VU0;
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@ -910,7 +909,7 @@ static VuFunctionHeader* SuperVURecompileProgram(u32 startpc, int vuindex)
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#endif
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// destroy
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for (list<VuBaseBlock*>::iterator itblock = s_listBlocks.begin(); itblock != s_listBlocks.end(); ++itblock)
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for (std::list<VuBaseBlock*>::iterator itblock = s_listBlocks.begin(); itblock != s_listBlocks.end(); ++itblock)
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{
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delete *itblock;
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}
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@ -943,12 +942,12 @@ static VuInstruction SuperVUFlushInst()
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return inst;
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}
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void SuperVUAddWritebacks(VuBaseBlock* pblock, const list<WRITEBACK>& listWritebacks)
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void SuperVUAddWritebacks(VuBaseBlock* pblock, const std::list<WRITEBACK>& listWritebacks)
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{
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#ifdef SUPERVU_WRITEBACKS
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// regardless of repetition, add the pipes (for selfloops)
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list<WRITEBACK>::const_iterator itwriteback = listWritebacks.begin();
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list<VuInstruction>::iterator itinst = pblock->insts.begin(), itinst2;
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std::list<WRITEBACK>::const_iterator itwriteback = listWritebacks.begin();
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std::list<VuInstruction>::iterator itinst = pblock->insts.begin(), itinst2;
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while (itwriteback != listWritebacks.end())
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{
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@ -1028,7 +1027,7 @@ static VuBaseBlock* SuperVUBuildBlocks(VuBaseBlock* parent, u32 startpc, const V
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{
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VuBaseBlock* pblock = pbh->pblock;
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list<VuInstruction>::iterator itinst;
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std::list<VuInstruction>::iterator itinst;
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if (pblock->startpc == startpc)
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{
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@ -1139,9 +1138,9 @@ static VuBaseBlock* SuperVUBuildBlocks(VuBaseBlock* parent, u32 startpc, const V
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u8 macflags = 0;
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list< WRITEBACK > listWritebacks;
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list< WRITEBACK >::iterator itwriteback;
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list<VuInstruction>::iterator itinst;
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std::list< WRITEBACK > listWritebacks;
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std::list< WRITEBACK >::iterator itwriteback;
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std::list<VuInstruction>::iterator itinst;
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u32 hasSecondBranch = 0;
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u32 needFullStatusFlag = 0;
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@ -1621,7 +1620,7 @@ static VuBaseBlock* SuperVUBuildBlocks(VuBaseBlock* parent, u32 startpc, const V
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static void SuperVUInitLiveness(VuBaseBlock* pblock)
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{
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list<VuInstruction>::iterator itinst, itnext;
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std::list<VuInstruction>::iterator itinst, itnext;
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pxAssert(pblock->insts.size() > 0);
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@ -1704,8 +1703,8 @@ u32 COMPUTE_LIVE(u32 R, u32 K, u32 L)
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static void SuperVULivenessAnalysis()
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{
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BOOL changed;
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list<VuBaseBlock*>::reverse_iterator itblock;
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list<VuInstruction>::iterator itinst, itnext;
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std::list<VuBaseBlock*>::reverse_iterator itblock;
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std::list<VuInstruction>::iterator itinst, itnext;
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VuBaseBlock::LISTBLOCKS::iterator itchild;
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u32 livevars[2];
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@ -1816,11 +1815,11 @@ static void SuperVULivenessAnalysis()
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static void SuperVUEliminateDeadCode()
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{
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list<VuBaseBlock*>::iterator itblock;
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std::list<VuBaseBlock*>::iterator itblock;
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VuBaseBlock::LISTBLOCKS::iterator itchild;
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list<VuInstruction>::iterator itinst, itnext;
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list<VuInstruction*> listParents;
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list<VuInstruction*>::iterator itparent;
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std::list<VuInstruction>::iterator itinst, itnext;
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std::list<VuInstruction*> listParents;
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std::list<VuInstruction*>::iterator itparent;
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for(itblock = s_listBlocks.begin(); itblock != s_listBlocks.end(); itblock++)
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{
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@ -1840,7 +1839,7 @@ static void SuperVUEliminateDeadCode()
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if (itinst->nParentPc >= 0 && itnext->nParentPc >= 0 && itinst->nParentPc != itnext->nParentPc) // superman returns
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{
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// take the live vars from the next next inst
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list<VuInstruction>::iterator itnextnext = itnext;
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std::list<VuInstruction>::iterator itnextnext = itnext;
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++itnextnext;
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if (itnextnext != (*itblock)->insts.end())
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{
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@ -2024,8 +2023,8 @@ static void SuperVUEliminateDeadCode()
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void VuBaseBlock::AssignVFRegs()
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{
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VuBaseBlock::LISTBLOCKS::iterator itchild;
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list<VuBaseBlock*>::iterator itblock;
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list<VuInstruction>::iterator itinst, itnext, itinst2;
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std::list<VuBaseBlock*>::iterator itblock;
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std::list<VuInstruction>::iterator itinst, itnext, itinst2;
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// init the start regs
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if (type & BLOCKTYPE_ANALYZED) return; // nothing changed
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@ -2292,8 +2291,8 @@ void VuBaseBlock::AssignVFRegs()
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struct MARKOVBLANKET
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{
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list<VuBaseBlock*> parents;
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list<VuBaseBlock*> children;
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std::list<VuBaseBlock*> parents;
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std::list<VuBaseBlock*> children;
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};
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static MARKOVBLANKET s_markov;
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@ -2329,7 +2328,7 @@ void VuBaseBlock::AssignVIRegs(int parent)
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pxAssert(parents.size() > 0);
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list<VuBaseBlock*>::iterator itparent;
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std::list<VuBaseBlock*>::iterator itparent;
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u32 usedvars = insts.front().usedvars[0];
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u32 livevars = insts.front().livevars[0];
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@ -2397,7 +2396,7 @@ void VuBaseBlock::AssignVIRegs(int parent)
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static void SuperVUAssignRegs()
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{
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list<VuBaseBlock*>::iterator itblock, itblock2;
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std::list<VuBaseBlock*>::iterator itblock, itblock2;
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for(itblock = s_listBlocks.begin(); itblock != s_listBlocks.end(); itblock++)
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{
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@ -2681,7 +2680,7 @@ static void SuperVURecompile()
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_initXMMregs();
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list<VuBaseBlock*>::iterator itblock;
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std::list<VuBaseBlock*>::iterator itblock;
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for(itblock = s_listBlocks.begin(); itblock != s_listBlocks.end(); itblock++)
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{
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@ -2878,7 +2877,7 @@ void VuBaseBlock::Recompile()
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MOV32ItoM((uptr)&VU->VI[REG_TPC], startpc);
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MOV32ItoM((uptr)&s_svulast, startpc);
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list<VuBaseBlock*>::iterator itparent;
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std::list<VuBaseBlock*>::iterator itparent;
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for (itparent = parents.begin(); itparent != parents.end(); ++itparent)
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{
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if ((*itparent)->blocks.size() == 1 && (*itparent)->blocks.front()->startpc == startpc &&
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@ -2920,7 +2919,7 @@ void VuBaseBlock::Recompile()
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_initX86regs();
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#endif
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list<VuInstruction>::iterator itinst;
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std::list<VuInstruction>::iterator itinst;
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for(itinst = insts.begin(); itinst != insts.end(); itinst++)
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{
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s_pCurInst = &(*itinst);
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@ -3003,7 +3002,7 @@ void VuBaseBlock::Recompile()
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u32 livevars[2] = {0};
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list<VuInstruction>::iterator lastinst = GetInstIterAtPc(endpc - 8);
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std::list<VuInstruction>::iterator lastinst = GetInstIterAtPc(endpc - 8);
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lastinst++;
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if (lastinst != insts.end())
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@ -3263,7 +3262,7 @@ int VuInstruction::SetCachedRegs(int upper, u32 vuxyz)
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return info;
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}
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||||
|
||||
void VuInstruction::Recompile(list<VuInstruction>::iterator& itinst, u32 vuxyz)
|
||||
void VuInstruction::Recompile(std::list<VuInstruction>::iterator& itinst, u32 vuxyz)
|
||||
{
|
||||
//static PCSX2_ALIGNED16(VECTOR _VF);
|
||||
//static PCSX2_ALIGNED16(VECTOR _VFc);
|
||||
|
|
@ -3306,7 +3305,7 @@ void VuInstruction::Recompile(list<VuInstruction>::iterator& itinst, u32 vuxyz)
|
|||
// }
|
||||
// }
|
||||
|
||||
list<VuBaseBlock*>::iterator itblock;
|
||||
std::list<VuBaseBlock*>::iterator itblock;
|
||||
for(itblock = s_listBlocks.begin(); itblock != s_listBlocks.end(); itblock++)
|
||||
{
|
||||
if (nParentPc >= (*itblock)->startpc && nParentPc < (*itblock)->endpc)
|
||||
|
|
@ -3536,7 +3535,7 @@ void VuInstruction::Recompile(list<VuInstruction>::iterator& itinst, u32 vuxyz)
|
|||
pxAssert(!(type & (INST_CLIP_WRITE | INST_STATUS_WRITE | INST_MAC_WRITE)));
|
||||
pc += 8;
|
||||
|
||||
list<VuInstruction>::const_iterator itinst2;
|
||||
std::list<VuInstruction>::const_iterator itinst2;
|
||||
|
||||
if ((regs[0].VIwrite | regs[1].VIwrite) & ((1 << REG_MAC_FLAG) | (1 << REG_STATUS_FLAG)))
|
||||
{
|
||||
|
|
|
|||
Loading…
Reference in New Issue