mirror of https://github.com/PCSX2/pcsx2.git
Remove some obsolete code relating to VIF/GIF FIFOs (hwRead/Write handlers always intercept them now, so saving values back to the eeHw register mirror is ineffective).
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3741 96395faa-99c1-11dd-bbfe-3dabce05a288
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e246d617ef
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372478c0ec
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@ -53,7 +53,7 @@ void __fastcall ReadFIFO_VIF1(mem128_t* out)
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if (vif1Regs.stat.FQC > 0)
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{
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GetMTGS().WaitGS();
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GSreadFIFO(&psHu64(VIF1_FIFO));
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GSreadFIFO(out);
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vif1.GSLastDownloadSize--;
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if (vif1.GSLastDownloadSize <= 16)
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gifRegs.stat.OPH = false;
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@ -61,7 +61,6 @@ void __fastcall ReadFIFO_VIF1(mem128_t* out)
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}
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}
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CopyQWC( out, &psHu128(VIF1_FIFO) );
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VIF_LOG("ReadFIFO/VIF1 -> %ls", out->ToString().c_str());
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}
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@ -72,8 +71,6 @@ void __fastcall WriteFIFO_VIF0(const mem128_t *value)
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{
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VIF_LOG("WriteFIFO/VIF0 <- %ls", value->ToString().c_str());
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CopyQWC(&psHu128(VIF0_FIFO), value);
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vif0ch.qwc += 1;
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if(vif0.irqoffset != 0 && vif0.vifstalled == true) DevCon.Warning("Offset on VIF0 FIFO start!");
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bool ret = VIF0transfer((u32*)value, 4);
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@ -94,8 +91,6 @@ void __fastcall WriteFIFO_VIF1(const mem128_t *value)
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{
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VIF_LOG("WriteFIFO/VIF1 <- %ls", value->ToString().c_str());
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CopyQWC(&psHu128(VIF1_FIFO), value);
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if (vif1Regs.stat.FDR)
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DevCon.Warning("writing to fifo when fdr is set!");
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if (vif1Regs.stat.test(VIF1_STAT_INT | VIF1_STAT_VSS | VIF1_STAT_VIS | VIF1_STAT_VFS) )
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@ -123,18 +118,15 @@ void __fastcall WriteFIFO_VIF1(const mem128_t *value)
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pxAssertDev( ret, "vif stall code not implemented" );
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}
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// Dummy GIF-TAG Packet to Guarantee Count = 1
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__aligned16 u128 nloop0_packet;
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void __fastcall WriteFIFO_GIF(const mem128_t *value)
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{
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GIF_LOG("WriteFIFO/GIF <- %ls", value->ToString().c_str());
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CopyQWC(&psHu128(GIF_FIFO), value);
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CopyQWC(&nloop0_packet, value);
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//CopyQWC(&psHu128(GIF_FIFO), value);
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//CopyQWC(&nloop0_packet, value);
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GetMTGS().PrepDataPacket(GIF_PATH_3, 1);
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GIFPath_CopyTag( GIF_PATH_3, &nloop0_packet, 1 );
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GIFPath_CopyTag( GIF_PATH_3, value, 1 );
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GetMTGS().SendDataPacket();
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if(GSTransferStatus.PTH3 == STOPPED_MODE && gifRegs.stat.APATH == GIF_APATH3 )
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{
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@ -31,9 +31,6 @@ void vif0Reset()
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memzero(vif0);
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memzero(vif0Regs);
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psHu64(VIF0_FIFO) = 0;
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psHu64(VIF0_FIFO + 8) = 0;
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vif0Regs.stat.VPS = VPS_IDLE;
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vif0Regs.stat.FQC = 0;
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@ -48,9 +45,6 @@ void vif1Reset()
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memzero(vif1);
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memzero(vif1Regs);
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psHu64(VIF1_FIFO) = 0;
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psHu64(VIF1_FIFO + 8) = 0;
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vif1Regs.stat.VPS = VPS_IDLE;
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vif1Regs.stat.FQC = 0; // FQC=0
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@ -58,7 +58,7 @@ __fi void vif1FLUSH()
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void vif1TransferToMemory()
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{
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u32 size;
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u64* pMem = (u64*)dmaGetAddr(vif1ch.madr, false);
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u128* pMem = (u128*)dmaGetAddr(vif1ch.madr, false);
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// VIF from gsMemory
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if (pMem == NULL) //Is vif0ptag empty?
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@ -78,54 +78,34 @@ void vif1TransferToMemory()
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// completely and execute the transfer there-after.
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//Console.Warning("Real QWC %x", vif1ch.qwc);
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size = min((u32)vif1ch.qwc, vif1.GSLastDownloadSize);
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const u128* pMemEnd = pMem + vif1.GSLastDownloadSize;
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if (GSreadFIFO2 == NULL)
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{
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for (;size > 0; --size)
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{
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GetMTGS().WaitGS();
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GSreadFIFO(&psHu64(VIF1_FIFO));
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pMem[0] = psHu64(VIF1_FIFO);
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pMem[1] = psHu64(VIF1_FIFO + 8);
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pMem += 2;
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}
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if(vif1ch.qwc > vif1.GSLastDownloadSize)
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{
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DevCon.Warning("GS Transfer < VIF QWC, Clearing end of space");
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for (size = vif1ch.qwc - vif1.GSLastDownloadSize; size > 0; --size)
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{
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psHu64(VIF1_FIFO) = 0;
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psHu64(VIF1_FIFO + 8) = 0;
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pMem[0] = psHu64(VIF1_FIFO);
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pMem[1] = psHu64(VIF1_FIFO + 8);
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pMem += 2;
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}
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GSreadFIFO((u64*)pMem);
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++pMem;
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}
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}
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else
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{
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GetMTGS().WaitGS();
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GSreadFIFO2(pMem, size);
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GSreadFIFO2((u64*)pMem, size);
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pMem += size;
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}
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// set incase read
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psHu64(VIF1_FIFO) = pMem[2*size-2];
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psHu64(VIF1_FIFO + 8) = pMem[2*size-1];
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pMem += size * 2;
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if(vif1ch.qwc > vif1.GSLastDownloadSize)
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if(pMem < pMemEnd)
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{
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DevCon.Warning("GS Transfer < VIF QWC, Clearing end of space");
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for (size = vif1ch.qwc - vif1.GSLastDownloadSize; size > 0; --size)
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{
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psHu64(VIF1_FIFO) = 0;
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psHu64(VIF1_FIFO + 8) = 0;
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pMem[0] = psHu64(VIF1_FIFO);
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pMem[1] = psHu64(VIF1_FIFO + 8);
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pMem += 2;
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}
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}
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}
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__m128 zeroreg = _mm_setzero_ps();
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do {
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_mm_store_ps((float*)pMem, zeroreg);
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++pMem;
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} while (pMem < pMemEnd);
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}
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g_vifCycles += vif1ch.qwc * 2;
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vif1ch.madr += vif1ch.qwc * 16; // mgs3 scene changes
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@ -58,10 +58,15 @@ enum GIF_REG
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// are modified during the GIFtag unpacking process.
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struct GIFTAG
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{
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u32 NLOOP : 15;
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u32 EOP : 1;
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u32 _dummy0 : 16;
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u16 NLOOP : 15;
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u16 EOP : 1;
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// Note that contents of the Dummy bits on real hardware is likely used to maintain state
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// information regarding tag processing (namely nllop and curreg info, so to resume partial
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// transfers later).
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u16 _dummy0 : 16;
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u32 _dummy1 : 14;
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u32 PRE : 1;
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u32 PRIM : 11;
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u32 FLG : 2;
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