mirror of https://github.com/PCSX2/pcsx2.git
core: use xRegisterLong instead of xRegister32
Code needs to work with xAddressReg however the x32 inheritance doesn't exits anymore on 64 bits. Note: it might be possible to uses some kind of autoconversion with xRegister32or64. Could be a future improvement.
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1328865279
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366f793cf0
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@ -110,7 +110,7 @@ struct xImpl_FastCall
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#endif
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#endif
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template< typename T > __fi __always_inline_tmpl_fail
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template< typename T > __fi __always_inline_tmpl_fail
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void operator()( T* func, const xRegister32& a1 = xEmptyReg, const xRegister32& a2 = xEmptyReg) const
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void operator()( T* func, const xRegisterLong& a1 = xEmptyReg, const xRegisterLong& a2 = xEmptyReg) const
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{
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{
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#ifdef __x86_64__
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#ifdef __x86_64__
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if (a1.IsEmpty()) {
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if (a1.IsEmpty()) {
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@ -132,7 +132,7 @@ struct xImpl_FastCall
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}
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}
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template< typename T > __fi __always_inline_tmpl_fail
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template< typename T > __fi __always_inline_tmpl_fail
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void operator()( T* func, u32 a1, const xRegister32& a2) const
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void operator()( T* func, u32 a1, const xRegisterLong& a2) const
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{
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{
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#ifdef __x86_64__
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#ifdef __x86_64__
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XFASTCALL2;
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XFASTCALL2;
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@ -171,7 +171,7 @@ struct xImpl_FastCall
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#endif
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#endif
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}
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}
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void operator()(const xIndirect32& func, const xRegister32& a1 = xEmptyReg, const xRegister32& a2 = xEmptyReg) const
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void operator()(const xIndirect32& func, const xRegisterLong& a1 = xEmptyReg, const xRegisterLong& a2 = xEmptyReg) const
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{
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{
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#ifdef __x86_64__
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#ifdef __x86_64__
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if (a1.IsEmpty()) {
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if (a1.IsEmpty()) {
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@ -121,12 +121,12 @@ extern _x86regs x86regs[iREGCNT_GPR], s_saveX86regs[iREGCNT_GPR];
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uptr _x86GetAddr(int type, int reg);
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uptr _x86GetAddr(int type, int reg);
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void _initX86regs();
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void _initX86regs();
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int _getFreeX86reg(int mode);
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int _getFreeX86reg(int mode);
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int _allocX86reg(x86Emitter::xRegister32 x86reg, int type, int reg, int mode);
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int _allocX86reg(x86Emitter::xRegisterLong x86reg, int type, int reg, int mode);
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void _deleteX86reg(int type, int reg, int flush);
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void _deleteX86reg(int type, int reg, int flush);
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int _checkX86reg(int type, int reg, int mode);
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int _checkX86reg(int type, int reg, int mode);
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void _addNeededX86reg(int type, int reg);
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void _addNeededX86reg(int type, int reg);
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void _clearNeededX86regs();
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void _clearNeededX86regs();
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void _freeX86reg(const x86Emitter::xRegister32& x86reg);
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void _freeX86reg(const x86Emitter::xRegisterLong& x86reg);
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void _freeX86reg(int x86reg);
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void _freeX86reg(int x86reg);
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void _freeX86regs();
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void _freeX86regs();
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void _flushCachedRegs();
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void _flushCachedRegs();
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@ -388,7 +388,7 @@ void _psxDeleteReg(int reg, int flush)
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_deleteX86reg(X86TYPE_PSX, reg, flush ? 0 : 2);
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_deleteX86reg(X86TYPE_PSX, reg, flush ? 0 : 2);
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}
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}
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void _psxMoveGPRtoR(const xRegister32& to, int fromgpr)
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void _psxMoveGPRtoR(const xRegisterLong& to, int fromgpr)
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{
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{
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if( PSX_IS_CONST1(fromgpr) )
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if( PSX_IS_CONST1(fromgpr) )
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xMOV(to, g_psxConstRegs[fromgpr] );
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xMOV(to, g_psxConstRegs[fromgpr] );
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@ -48,7 +48,7 @@ void _psxFlushCall(int flushtype);
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void _psxOnWriteReg(int reg);
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void _psxOnWriteReg(int reg);
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void _psxMoveGPRtoR(const x86Emitter::xRegister32& to, int fromgpr);
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void _psxMoveGPRtoR(const x86Emitter::xRegisterLong& to, int fromgpr);
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#if 0
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#if 0
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void _psxMoveGPRtoM(uptr to, int fromgpr);
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void _psxMoveGPRtoM(uptr to, int fromgpr);
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void _psxMoveGPRtoRm(x86IntRegType to, int fromgpr);
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void _psxMoveGPRtoRm(x86IntRegType to, int fromgpr);
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@ -104,7 +104,7 @@ extern u32 g_cpuHasConstReg, g_cpuFlushedConstReg;
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u32* _eeGetConstReg(int reg);
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u32* _eeGetConstReg(int reg);
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// finds where the GPR is stored and moves lower 32 bits to EAX
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// finds where the GPR is stored and moves lower 32 bits to EAX
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void _eeMoveGPRtoR(const x86Emitter::xRegister32& to, int fromgpr);
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void _eeMoveGPRtoR(const x86Emitter::xRegisterLong& to, int fromgpr);
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void _eeMoveGPRtoM(uptr to, int fromgpr);
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void _eeMoveGPRtoM(uptr to, int fromgpr);
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void _eeMoveGPRtoRm(x86IntRegType to, int fromgpr);
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void _eeMoveGPRtoRm(x86IntRegType to, int fromgpr);
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void eeSignExtendTo(int gpr, bool onlyupper=false);
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void eeSignExtendTo(int gpr, bool onlyupper=false);
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@ -243,7 +243,7 @@ void _flushConstRegs()
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}
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}
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}
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}
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int _allocX86reg(xRegister32 x86reg, int type, int reg, int mode)
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int _allocX86reg(xRegisterLong x86reg, int type, int reg, int mode)
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{
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{
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uint i;
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uint i;
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pxAssertDev( reg >= 0 && reg < 32, "Register index out of bounds." );
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pxAssertDev( reg >= 0 && reg < 32, "Register index out of bounds." );
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@ -316,7 +316,7 @@ int _allocX86reg(xRegister32 x86reg, int type, int reg, int mode)
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}
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}
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if (x86reg.IsEmpty())
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if (x86reg.IsEmpty())
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x86reg = xRegister32(_getFreeX86reg(oldmode));
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x86reg = xRegisterLong(_getFreeX86reg(oldmode));
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else
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else
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_freeX86reg(x86reg);
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_freeX86reg(x86reg);
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@ -445,7 +445,7 @@ void _deleteX86reg(int type, int reg, int flush)
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}
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}
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// Temporary solution to support eax/ebx... type
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// Temporary solution to support eax/ebx... type
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void _freeX86reg(const x86Emitter::xRegister32& x86reg)
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void _freeX86reg(const x86Emitter::xRegisterLong& x86reg)
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{
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{
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_freeX86reg(x86reg.GetId());
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_freeX86reg(x86reg.GetId());
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}
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}
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@ -154,7 +154,7 @@ u32* _eeGetConstReg(int reg)
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return &cpuRegs.GPR.r[ reg ].UL[0];
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return &cpuRegs.GPR.r[ reg ].UL[0];
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}
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}
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void _eeMoveGPRtoR(const xRegister32& to, int fromgpr)
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void _eeMoveGPRtoR(const xRegisterLong& to, int fromgpr)
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{
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{
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if( fromgpr == 0 )
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if( fromgpr == 0 )
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xXOR(to, to); // zero register should use xor, thanks --air
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xXOR(to, to); // zero register should use xor, thanks --air
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@ -18,7 +18,7 @@
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using namespace x86Emitter;
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using namespace x86Emitter;
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typedef xRegisterSSE xmm;
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typedef xRegisterSSE xmm;
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typedef xRegister32 x32;
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typedef xRegisterLong x32;
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struct microVU;
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struct microVU;
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@ -139,7 +139,7 @@ void VifUnpackSSE_Dynarec::writeBackRow() const {
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// ToDo: Do we need to write back to vifregs.rX too!? :/
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// ToDo: Do we need to write back to vifregs.rX too!? :/
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}
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}
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static void ShiftDisplacementWindow( xAddressVoid& addr, const xRegister32& modReg )
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static void ShiftDisplacementWindow( xAddressVoid& addr, const xRegisterLong& modReg )
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{
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{
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// Shifts the displacement factor of a given indirect address, so that the address
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// Shifts the displacement factor of a given indirect address, so that the address
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// remains in the optimal 0xf0 range (which allows for byte-form displacements when
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// remains in the optimal 0xf0 range (which allows for byte-form displacements when
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