mirror of https://github.com/PCSX2/pcsx2.git
DEV9: Correct implementation of SPD_R_DBUF_STAT reset
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1bdd53a6c5
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@ -688,16 +688,19 @@ void SpeedWrite(u32 addr, u16 value, int width)
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case SPD_R_DBUF_STAT:
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//DevCon.WriteLn("DEV9: SPD_R_DBUF_STAT %dbit write %x", width, value);
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if ((value & SPD_DBUF_RESET_FIFO) != 0)
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if ((value & SPD_DBUF_RESET_READ_CNT) != 0)
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{
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//DevCon.WriteLn("DEV9: SPD_R_DBUF_STAT Reset FIFO");
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dev9.fifo_bytes_write = 0;
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//DevCon.WriteLn("DEV9: SPD_R_DBUF_STAT Reset read counter");
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dev9.fifo_bytes_read = 0;
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dev9.xfr_ctrl &= ~SPD_XFR_WRITE; //?
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dev9.if_ctrl |= SPD_IF_READ; //?
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FIFOIntr();
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}
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if ((value & SPD_DBUF_RESET_WRITE_CNT) != 0)
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{
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//DevCon.WriteLn("DEV9: SPD_R_DBUF_STAT Reset write counter");
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dev9.fifo_bytes_write = 0;
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}
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if (value != 0)
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FIFOIntr();
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if (value != 3)
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Console.Error("DEV9: SPD_R_DBUF_STAT 16bit write %x Which != 3!!!", value);
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@ -168,7 +168,8 @@ extern int ThreadRun;
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#define SPD_DBUF_STAT_FULL (1 << 7)
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//HDD->SPEED: both SPD_DBUF_STAT_2 and SPD_DBUF_STAT_FULL set to 1 indicates overflow
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//Write
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#define SPD_DBUF_RESET_FIFO (1 << 1) //Set SPD_DBUF_STAT_1 & SPD_DBUF_STAT_2, SPD_DBUF_AVAIL set to 0
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#define SPD_DBUF_RESET_READ_CNT (1 << 0)
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#define SPD_DBUF_RESET_WRITE_CNT (1 << 1)
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#define SPD_R_IF_CTRL (SPD_REGBASE + 0x64)
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#define SPD_IF_UDMA (1 << 0)
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