mirror of https://github.com/PCSX2/pcsx2.git
Fixed bug in IOP counters.
git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@299 a6443dda-0b58-4228-96e9-037be469359c
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@ -63,7 +63,7 @@ __forceinline static void _rcntSet( int i, int bitwise )
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assert( i < 3 );
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#endif
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// psxNextCounter is relative to the cpuRegs.cycle when rcntUpdate() was last called.
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// psxNextCounter is relative to the psxRegs.cycle when rcntUpdate() was last called.
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// However, the current _rcntSet could be called at any cycle count, so we need to take
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// that into account. Adding the difference from that cycle count to the current one
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// will do the trick!
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@ -71,13 +71,13 @@ __forceinline static void _rcntSet( int i, int bitwise )
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if(psxCounters[i].rate == PSXHBLANK) return;
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c = (u64)((overflowCap - psxCounters[i].count) * psxCounters[i].rate) - (psxRegs.cycle - psxCounters[i].sCycleT);
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c += cpuRegs.cycle - psxNextsCounter; // adjust for time passed since last rcntUpdate();
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c += psxRegs.cycle - psxNextsCounter; // adjust for time passed since last rcntUpdate();
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if (c < psxNextCounter) psxNextCounter = (u32)c;
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//if((psxCounters[i].mode & 0x10) == 0 || psxCounters[i].target > 0xffff) continue;
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c = (u64)((psxCounters[i].target - psxCounters[i].count) * psxCounters[i].rate) - (psxRegs.cycle - psxCounters[i].sCycleT);
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c += cpuRegs.cycle - psxNextsCounter; // adjust for time passed since last rcntUpdate();
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c += psxRegs.cycle - psxNextsCounter; // adjust for time passed since last rcntUpdate();
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if (c < psxNextCounter) psxNextCounter = (u32)c;
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}
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@ -590,7 +590,7 @@ void psxRcnt1Wmode(u32 value) {
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if(psxCounters[1].target > 0xffff) {
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//SysPrintf("IOP 16 Correcting target 1 after mode write\n");
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psxCounters[1].target &= 0xffff;
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}
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}
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_rcntSet( 1, 16 );
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//}
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}
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@ -628,7 +628,7 @@ void psxRcnt2Wmode(u32 value) {
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if(psxCounters[2].target > 0xffff) {
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//SysPrintf("IOP 16 Correcting target 2 after mode write\n");
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psxCounters[2].target &= 0xffff;
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}
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}
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_rcntSet( 2, 16 );
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}
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@ -662,7 +662,7 @@ void psxRcnt3Wmode(u32 value) {
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if(psxCounters[3].target > 0xffffffff) {
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//SysPrintf("IOP 32 Correcting target 3 after mode write\n");
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psxCounters[3].target &= 0xffffffff;
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}
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}
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_rcntSet( 3, 32 );
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//}
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}
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@ -707,7 +707,7 @@ void psxRcnt4Wmode(u32 value) {
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if(psxCounters[4].target > 0xffffffff) {
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//SysPrintf("IOP 32 Correcting target 4 after mode write\n");
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psxCounters[4].target &= 0xffffffff;
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}
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}
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_rcntSet( 4, 32 );
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}
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@ -751,7 +751,7 @@ void psxRcnt5Wmode(u32 value) {
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if(psxCounters[5].target > 0xffffffff) {
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//SysPrintf("IOP 32 Correcting target 5 after mode write\n");
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psxCounters[5].target &= 0xffffffff;
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}
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}
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_rcntSet( 5, 32 );
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}
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@ -763,7 +763,7 @@ void psxRcntWtarget16(int index, u32 value) {
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if(psxCounters[index].target <= psxRcntCycles(index)/* && psxCounters[index].target != 0*/) {
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//SysPrintf("IOP 16 Saving %x target from early trigger target = %x, count = %I64x\n", index, psxCounters[index].target, psxRcntCycles(index));
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psxCounters[index].target += 0x1000000000;
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}
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}
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_rcntSet( index, 16 );
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}
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@ -778,7 +778,7 @@ void psxRcntWtarget32(int index, u32 value) {
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if(psxCounters[index].target <= psxRcntCycles(index)/* && psxCounters[index].target != 0*/) {
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//SysPrintf("IOP 32 Saving %x target from early trigger target = %x, count = %I64x\n", index, psxCounters[index].target, psxRcntCycles(index));
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psxCounters[index].target += 0x1000000000;
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}
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}
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_rcntSet( index, 32 );
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}
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