mirror of https://github.com/PCSX2/pcsx2.git
DEV9: Remove some casts in ATA Info
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2833537167
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@ -90,7 +90,7 @@ void ATA::CreateHDDinfo(u64 sizeSectors)
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//Default Num of heads (Retired)
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//Default Num of heads (Retired)
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WriteUInt16(identifyData, &index, defHeads); //word 3
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WriteUInt16(identifyData, &index, defHeads); //word 3
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//Number of unformatted bytes per track (Retired)
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//Number of unformatted bytes per track (Retired)
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WriteUInt16(identifyData, &index, static_cast<u16>(sectorSize * defSectors)); //word 4
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WriteUInt16(identifyData, &index, sectorSize * defSectors); //word 4
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//Number of unformatted bytes per sector (Retired)
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//Number of unformatted bytes per sector (Retired)
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WriteUInt16(identifyData, &index, sectorSize); //word 5
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WriteUInt16(identifyData, &index, sectorSize); //word 5
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//Default Number of sectors per track (Retired)
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//Default Number of sectors per track (Retired)
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@ -129,7 +129,7 @@ void ATA::CreateHDDinfo(u64 sizeSectors)
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//Capabilities (0-Shall be set to one to indicate a device specific Standby timer value minimum)
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//Capabilities (0-Shall be set to one to indicate a device specific Standby timer value minimum)
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WriteUInt16(identifyData, &index, 1 << 14); //word 50
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WriteUInt16(identifyData, &index, 1 << 14); //word 50
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//PIO data transfer cycle timing mode (Obsolete)
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//PIO data transfer cycle timing mode (Obsolete)
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WriteUInt16(identifyData, &index, static_cast<u16>((pioMode > 2 ? pioMode : 2) << 8)); //word 51
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WriteUInt16(identifyData, &index, (pioMode > 2 ? pioMode : 2) << 8); //word 51
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//DMA data transfer cycle timing mode (Obsolete)
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//DMA data transfer cycle timing mode (Obsolete)
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WriteUInt16(identifyData, &index, 0); //word 52
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WriteUInt16(identifyData, &index, 0); //word 52
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//
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//
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@ -146,14 +146,14 @@ void ATA::CreateHDDinfo(u64 sizeSectors)
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//Number of current sectors per track
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//Number of current sectors per track
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WriteUInt16(identifyData, &index, curSectors); //word 56
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WriteUInt16(identifyData, &index, curSectors); //word 56
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//Current capacity in sectors
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//Current capacity in sectors
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WriteUInt32(identifyData, &index, static_cast<u32>(curOldsize)); //word 57-58
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WriteUInt32(identifyData, &index, curOldsize); //word 57-58
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//PIO READ/WRITE Multiple setting
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//PIO READ/WRITE Multiple setting
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/*
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/*
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* bit 7-0: Current setting for number of logical sectors that shall be transferred per DRQ
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* bit 7-0: Current setting for number of logical sectors that shall be transferred per DRQ
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* data block on READ/WRITE Multiple commands
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* data block on READ/WRITE Multiple commands
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* bit 8: Multiple sector setting is valid
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* bit 8: Multiple sector setting is valid
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*/
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*/
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WriteUInt16(identifyData, &index, static_cast<u16>(curMultipleSectorsSetting | (1 << 8))); //word 59
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WriteUInt16(identifyData, &index, curMultipleSectorsSetting | (1 << 8)); //word 59
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//Total number of user addressable logical sectors
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//Total number of user addressable logical sectors
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WriteUInt32(identifyData, &index, nbSectors); //word 60-61
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WriteUInt32(identifyData, &index, nbSectors); //word 60-61
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//SDMA modes (Unsupported by original HDD)
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//SDMA modes (Unsupported by original HDD)
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@ -164,7 +164,7 @@ void ATA::CreateHDDinfo(u64 sizeSectors)
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* bits 8-15: Transfer mode active
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* bits 8-15: Transfer mode active
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*/
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*/
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if (mdmaMode >= 0)
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if (mdmaMode >= 0)
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WriteUInt16(identifyData, &index, static_cast<u16>(0x07 | (1 << (mdmaMode + 8)))); //word 63
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WriteUInt16(identifyData, &index, 0x07 | (1 << (mdmaMode + 8))); //word 63
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else
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else
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WriteUInt16(identifyData, &index, 0x07); //word 63
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WriteUInt16(identifyData, &index, 0x07); //word 63
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//Bits 0-1 PIO modes supported (3,4)
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//Bits 0-1 PIO modes supported (3,4)
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@ -284,7 +284,7 @@ void ATA::CreateHDDinfo(u64 sizeSectors)
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* bits 8-15: Transfer mode active
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* bits 8-15: Transfer mode active
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*/
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*/
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if (udmaMode >= 0)
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if (udmaMode >= 0)
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WriteUInt16(identifyData, &index, static_cast<u16>(0x7f | (1 << (udmaMode + 8)))); //word 88
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WriteUInt16(identifyData, &index, 0x7f | (1 << (udmaMode + 8))); //word 88
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else
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else
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WriteUInt16(identifyData, &index, 0x7f); //word 88
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WriteUInt16(identifyData, &index, 0x7f); //word 88
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//Time required for security erase unit completion
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//Time required for security erase unit completion
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