mirror of https://github.com/PCSX2/pcsx2.git
finally completed recUpdateFlags() to fully support underflow/overflow checks; theres still some room for optimization that i might do later though.
git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@16 a6443dda-0b58-4228-96e9-037be469359c
This commit is contained in:
cottonvibes
Gregory Hainaut
parent
c667ffe343
commit
2d865e39fb
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@ -1300,7 +1300,7 @@ void vuFloat3(uptr x86ptr)
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void CheckForOverflow(VURegs *VU, int info, int regd)
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{
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//testWhenOverflow(info, regd, EEREC_TEMP);
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testWhenOverflow(info, regd, EEREC_TEMP);
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//CheckForOverflow_(regd, EEREC_TEMP, _X_Y_Z_W);
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if (EEREC_TEMP != regd) {
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//testWhenOverflow(info, regd, EEREC_TEMP);
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@ -1333,8 +1333,7 @@ const static PCSX2_ALIGNED16(u32 VU_Zero_Helper_Mask[4]) = {0x7fffffff, 0x7fffff
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const static PCSX2_ALIGNED16(u32 VU_Signed_Zero_Mask[4]) = {0x80000000, 0x80000000, 0x80000000, 0x80000000};
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// VU Flags
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// NOTE: flags don't compute under/over flows since it is highly unlikely
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// that games used them. Including them will lower performance.
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// NOTE: Flags now compute under/over flows! :p
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void recUpdateFlags(VURegs * VU, int reg, int info)
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{
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u32 flagmask;
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@ -1351,9 +1350,8 @@ void recUpdateFlags(VURegs * VU, int reg, int info)
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stataddr = VU_VI_ADDR(REG_STATUS_FLAG, 0); // write address
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prevstataddr = VU_VI_ADDR(REG_STATUS_FLAG, 2); // previous address
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if( stataddr == 0 ) {
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if( stataddr == 0 )
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stataddr = prevstataddr;
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}
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//assert( stataddr != 0);
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@ -1364,10 +1362,7 @@ void recUpdateFlags(VURegs * VU, int reg, int info)
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// can do with 8 bits since only computing zero/sign flags
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if( EEREC_TEMP != reg ) {
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/*
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DD:CC:BB:AA
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11:10:01:00
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00:01:10:11*/
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SSE_SHUFPS_XMM_to_XMM(reg, reg, 0x1B); // Flip wzyx to xyzw
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MOV32MtoR(x86oldflag, prevstataddr); // Load the previous status in to x86oldflag
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@ -1475,82 +1470,119 @@ DD:CC:BB:AA
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//-------------------------Flag Setting if (reg == EEREC_TEMP)------------------------------
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else {
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int t1reg = _allocTempXMMreg(XMMT_FPS, -1);//_getFreeXMMreg();//_vuGetTempXMMreg(info);
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SSE_SHUFPS_XMM_to_XMM(reg, reg, 0x1B); // Flip wzyx to xyzw
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MOV32MtoR(x86oldflag, prevstataddr); //move current (previous) status register to x86oldflag
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MOV32MtoR(x86oldflag, prevstataddr); // Load the previous status in to x86oldflag
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SSE_MOVMSKPS_XMM_to_R32(x86macflag, EEREC_TEMP); // mask is < 0 (including 80000000) Get sign bits of all 4 vectors
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// put results in lower 4 bits of x86macflag
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//-------------------------Check for Overflow flags------------------------------
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XOR32RtoR(EAX, EAX); //Clear EAX for our new flag
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SSE_XORPS_XMM_to_XMM(t1reg, t1reg); // Clear t1reg
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SSE_CMPUNORDPS_XMM_to_XMM(t1reg, reg); // If reg == NaN then set Vector to 0xFFFFFFFF
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SSE_CMPEQPS_M128_to_XMM(EEREC_TEMP, (uptr)&s_FloatMinMax[8]); //if the result zero?
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//set to all F's (true) or All 0's on each vector (depending on result)
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SSE_MOVMSKPS_XMM_to_R32(x86newflag, EEREC_TEMP); // put the sign bit results from the previous calculation in x86newflag
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// so x86newflag == 0xf if EEREC_TEMP is zero and == 0x0 if it is all a value.
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XOR32RtoR(x86macflag, x86macflag); // Clear Mac Flag
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//if( !(g_VUGameFixes&VUFIX_SIGNEDZERO) ) {
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NOT32R(x86newflag); //flip all bits from previous calculation, so now if the result was zero, the result here is 0's
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AND32RtoR(x86macflag, x86newflag); //check non-zero macs against signs of initial register values
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// so if the result was zero, regardless of if its signed or not, it wont set the signed flags
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//}
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SSE_MOVMSKPS_XMM_to_R32(x86newflag, t1reg); // Move the sign bits of the previous calculation
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AND32ItoR(x86macflag, 0x0f & _X_Y_Z_W ); //seperate out the flags we are actually using?
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pjmp = JZ8(0); //if none are the flags are set to 1 (aka the result is non-zero & positive, or they were zero) dont set the "signed" flag
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OR32ItoR(EAX, 2); //else we are signed
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XOR32RtoR(EAX, EAX); //Clear EAX
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AND32ItoR(x86newflag, 0x0f & _X_Y_Z_W ); // Grab "Has Overflowed" bits from the previous calculation (also make sure we're only grabbing from the XYZW being modified)
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pjmp = JZ8(0); // Skip if none are
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OR32ItoR(EAX, 8); // Set if they are
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x86SetJ8(pjmp);
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//if( !(g_VUGameFixes&VUFIX_SIGNEDZERO) ) { //Flip the bits back again so we have our "its zero" values
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NOT32R(x86newflag); //flip!
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//}
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OR32RtoR(x86macflag, x86newflag);
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SHL32ItoR(x86macflag, 4); // Shift the Overflow flags left 4
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AND32ItoR(x86newflag, 0x0f & _X_Y_Z_W ); //mask out the vectors we didnt use
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pjmp = JZ8(0); //If none were zero skip
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OR32ItoR(EAX, 1); //We had a zero, so set el status flag with "zero":p
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//-------------------------Check for Underflow flags------------------------------
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SSE_MOVAPS_XMM_to_XMM(t1reg, reg); // t1reg <- reg
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SSE_ANDPS_M128_to_XMM(t1reg, (uptr)&VU_Underflow_Mask1[ 0 ]);
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SSE_CMPEQPS_M128_to_XMM(t1reg, (uptr)&VU_Zero_Mask[ 0 ]); // If (t1reg == zero exponent) then set Vector to 0xFFFFFFFF
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SSE_ANDPS_XMM_to_XMM(t1reg, reg);
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SSE_ANDPS_M128_to_XMM(t1reg, (uptr)&VU_Underflow_Mask2[ 0 ]);
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SSE_CMPNEPS_M128_to_XMM(t1reg, (uptr)&VU_Zero_Mask[ 0 ]); // If (t1reg != zero mantisa) then set Vector to 0xFFFFFFFF
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SSE_MOVMSKPS_XMM_to_R32(x86newflag, t1reg); // Move the sign bits of the previous calculation
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AND32ItoR(x86newflag, 0x0f & _X_Y_Z_W ); // Grab "Has Underflowed" bits from the previous calculation
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pjmp = JZ8(0); // Skip if none are
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OR32ItoR(EAX, 4); // Set if they are
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x86SetJ8(pjmp);
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SHL32ItoR(x86macflag, 4); //Move our signed flags left 4
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OR32RtoR(x86newflag, x86macflag); //then stick our zero flags after it
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OR32RtoR(x86macflag, x86newflag);
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SHL32ItoR(x86macflag, 4); // Shift the Overflow and Underflow flags left 4
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//MOV8RmtoROffset(x86newflag, x86macflag, (u32)g_MACFlagTransform); // transform
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//-------------------------Optional Code: Denormals Are Zero------------------------------
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if (!(Config.Hacks & 0x8)) { //only use if denormals hack is off
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SSE_ANDNPS_XMM_to_XMM(t1reg, reg); // t1reg = !t1reg & reg
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// Now we have Denormals are Positive Zero in t1reg; the next two lines take Signed Zero into account
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SSE_ANDPS_M128_to_XMM(reg, (uptr)&VU_Signed_Zero_Mask[ 0 ]);
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SSE_ORPS_XMM_to_XMM(reg, t1reg);
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}
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//-------------------------Check for Signed flags------------------------------
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//SSE_ANDPS_M128_to_XMM(t1reg, (uptr)&VU_Signed_Zero_Mask[ 0 ]);
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//SSE_CMPEQPS_M128_to_XMM(t1reg, (uptr)&VU_Signed_Zero_Mask[ 0 ]); // If (t1reg == 0x80000000) set all F's for that vector
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//SSE_MOVAPS_XMM_to_XMM(t1reg, reg); // t1reg <- reg
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// The following code makes sure the Signed Bit isn't set with Negative Zero
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SSE_XORPS_XMM_to_XMM(t1reg, t1reg); // Clear t1reg
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SSE_CMPNEPS_XMM_to_XMM(t1reg, reg); // Set all F's if each vector is not zero
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SSE_ANDPS_XMM_to_XMM(t1reg, reg);
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SSE_MOVMSKPS_XMM_to_R32(x86newflag, t1reg); // Move the sign bits of the t1reg
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// Replace the 4 lines of code above with this line if you don't care that Negative Zero sets the Signed flag
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//SSE_MOVMSKPS_XMM_to_R32(x86newflag, reg); // Move the sign bits of the reg
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AND32ItoR(x86newflag, 0x0f & _X_Y_Z_W ); // Grab "Is Signed" bits from the previous calculation
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pjmp = JZ8(0); // Skip if none are
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OR32ItoR(EAX, 2); // Set if they are
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x86SetJ8(pjmp);
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OR32RtoR(x86macflag, x86newflag);
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SHL32ItoR(x86macflag, 4); // Shift the Overflow, Underflow, and Zero flags left 4
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//-------------------------Check for Zero flags------------------------------
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SSE_XORPS_XMM_to_XMM(t1reg, t1reg); // Clear t1reg
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SSE_CMPEQPS_XMM_to_XMM(t1reg, reg); // Set all F's if each vector is zero
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/* This code does the same thing as the above two lines
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SSE_MOVAPS_XMM_to_XMM(t1reg, reg); // t1reg <- reg
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SSE_ANDPS_M128_to_XMM(t1reg, (uptr)&VU_Zero_Helper_Mask[ 0 ]); // t1reg &= 0x7fffffff
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SSE_CMPEQPS_M128_to_XMM(t1reg, (uptr)&VU_Zero_Mask[ 0 ]); // If (t1reg == 0x00000000) set all F's for that vector
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*/
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SSE_MOVMSKPS_XMM_to_R32(x86newflag, t1reg); // Move the sign bits of the previous calculation
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AND32ItoR(x86newflag, 0x0f & _X_Y_Z_W ); // Grab "Is Zero" bits from the previous calculation
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pjmp = JZ8(0); // Skip if none are
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OR32ItoR(EAX, 1); // Set if they are
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x86SetJ8(pjmp);
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OR32RtoR(x86macflag, x86newflag);
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//-------------------------Finally: Send the Flags to the Mac Address------------------------------
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//SSE_SHUFPS_XMM_to_XMM(reg, reg, 0x1B); // Don't need to restore the reg since this is a temp reg
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_freeXMMreg(t1reg);
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if( macaddr != 0 )
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MOV8RtoM(macaddr, x86newflag);
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MOV16RtoM(macaddr, x86macflag);
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else
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SysPrintf( "VU ALLOCATION ERROR: Macaddr == EAX!!! Can't set Mac Flags!\n" );
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}
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// x86macflag - new untransformed mac flag, EAX - new status bits, x86oldflag - old status flag
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// x86macflag = zero_wzyx | sign_wzyx
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//MOV8RmtoROffset(x86newflag, x86macflag, (u32)g_MACFlagTransform); // transform
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//MOV32RtoR(x86macflag, x86newflag );
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//MOV32RtoR(x86macflag, x86oldflag);
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//SHL32ItoR(x86macflag, 6);
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//OR32RtoR(x86oldflag, x86macflag);
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//if( macaddr != 0 ) {
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// has to write full 32 bits!
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//MOV8RtoM(macaddr, x86newflag);
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// vampire night breaks with (g_VUGameFixes&VUFIX_EXTRAFLAGS), crazi taxi needs it
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//if( (g_VUGameFixes&VUFIX_EXTRAFLAGS) && flagmask != 0xf ) {
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// MOV8MtoR(x86newflag, VU_VI_ADDR(REG_MAC_FLAG, 2)); // get previous written
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// AND8ItoR(x86newflag, ~g_MACFlagTransform[(flagmask|(flagmask<<4))]);
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// OR8RtoM(macaddr, x86newflag);
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//}
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//}
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//AND32ItoR(x86oldflag, 0x0c0);
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SHR32ItoR(x86oldflag, 6);
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OR32RtoR(x86oldflag, EAX);
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SHL32ItoR(x86oldflag, 6);
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OR32RtoR(x86oldflag, EAX);
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//SHL32ItoR(EAX,6);
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//OR32RtoR(x86oldflag, EAX);
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MOV32RtoM(stataddr, x86oldflag);
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_freeX86reg(x86macflag);
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