From 2caebe0069f323549b981da548a3fd03b827b0e9 Mon Sep 17 00:00:00 2001
From: ramapcsx2 <ramapcsx2@96395faa-99c1-11dd-bbfe-3dabce05a288>
Date: Thu, 2 Apr 2009 21:04:45 +0000
Subject: [PATCH] T/D flag interrupting was missing on the VUs. Nneeve
 implemented it :)

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@886 96395faa-99c1-11dd-bbfe-3dabce05a288
---
 pcsx2/VU0microInterp.cpp | 2 ++
 pcsx2/VU1microInterp.cpp | 2 ++
 pcsx2/x86/iVUmicro.cpp   | 6 +++++-
 pcsx2/x86/iVUzerorec.cpp | 2 +-
 4 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/pcsx2/VU0microInterp.cpp b/pcsx2/VU0microInterp.cpp
index cf70894bd1..eaf7b9b05f 100644
--- a/pcsx2/VU0microInterp.cpp
+++ b/pcsx2/VU0microInterp.cpp
@@ -76,12 +76,14 @@ static void _vu0Exec(VURegs* VU)
 			VU0.VI[REG_VPU_STAT].UL|= 0x2;
 			hwIntcIrq(INTC_VU0);
 		}
+		VU->ebit = 1;
 	}
 	if (ptr[1] & 0x08000000) { /* T flag */
 		if (VU0.VI[REG_FBRST].UL & 0x8) {
 			VU0.VI[REG_VPU_STAT].UL|= 0x4;
 			hwIntcIrq(INTC_VU0);
 		}
+		VU->ebit = 1;
 	}
 
 	VU->code = ptr[1]; 
diff --git a/pcsx2/VU1microInterp.cpp b/pcsx2/VU1microInterp.cpp
index fc8f7f793a..fe2028475e 100644
--- a/pcsx2/VU1microInterp.cpp
+++ b/pcsx2/VU1microInterp.cpp
@@ -71,12 +71,14 @@ static void _vu1Exec(VURegs* VU)
 			VU0.VI[REG_VPU_STAT].UL|= 0x200;
 			hwIntcIrq(INTC_VU1);
 		}
+		VU->ebit = 1;
 	}
 	if (ptr[1] & 0x08000000) { /* T flag */
 		if (VU0.VI[REG_FBRST].UL & 0x800) {
 			VU0.VI[REG_VPU_STAT].UL|= 0x400;
 			hwIntcIrq(INTC_VU1);
 		}
+		VU->ebit = 1;
 	}
 
 	VUM_LOG("VU->cycle = %d (flags st=%x;mac=%x;clip=%x,q=%f)", VU->cycle, VU->statusflag, VU->macflag, VU->clipflag, VU->q.F);
diff --git a/pcsx2/x86/iVUmicro.cpp b/pcsx2/x86/iVUmicro.cpp
index 3e24cd6930..e4ff05e8f9 100644
--- a/pcsx2/x86/iVUmicro.cpp
+++ b/pcsx2/x86/iVUmicro.cpp
@@ -474,7 +474,11 @@ void SuperVUAnalyzeOp(VURegs *VU, _vuopinfo *info, _VURegsNum* pCodeRegs)
 	if (ptr[1] & 0x40000000) { // EOP
 		branch |= 8; 
 	} 
- 
+	
+	if (ptr[1] & 0x18000000) { // T/D flags
+		branch |= 16 | 8; //stop right after this instruction
+	}
+
 	VU->code = ptr[1];
 	if (VU == &VU1) VU1regs_UPPER_OPCODE[VU->code & 0x3f](uregs);
 	else VU0regs_UPPER_OPCODE[VU->code & 0x3f](uregs);
diff --git a/pcsx2/x86/iVUzerorec.cpp b/pcsx2/x86/iVUzerorec.cpp
index db9ff78fbb..4337b2c607 100644
--- a/pcsx2/x86/iVUzerorec.cpp
+++ b/pcsx2/x86/iVUzerorec.cpp
@@ -1246,7 +1246,7 @@ static VuBaseBlock* SuperVUBuildBlocks(VuBaseBlock* parent, u32 startpc, const V
 		if( pinst->info.p&VUOP_WRITE )
 			pinst->pqcycles = PWaitTimes[pinst->info.pqinst]+1;
 
-		if( prevbranch ) {
+		if( prevbranch || (branch & 16)) {
 			break;
 		}