diff --git a/pcsx2/DEV9/Config.h b/pcsx2/DEV9/Config.h index b75854a9cf..7429a4fa26 100644 --- a/pcsx2/DEV9/Config.h +++ b/pcsx2/DEV9/Config.h @@ -1,5 +1,5 @@ /* PCSX2 - PS2 Emulator for PCs - * Copyright (C) 2002-2014 David Quintana [gigaherz] + * Copyright (C) 2002-2010 PCSX2 Dev Team * * PCSX2 is free software: you can redistribute it and/or modify it under the terms * of the GNU Lesser General Public License as published by the Free Software Found- diff --git a/pcsx2/DEV9/DEV9.cpp b/pcsx2/DEV9/DEV9.cpp index d284cd332d..84b3d0f4bd 100644 --- a/pcsx2/DEV9/DEV9.cpp +++ b/pcsx2/DEV9/DEV9.cpp @@ -1,5 +1,5 @@ /* PCSX2 - PS2 Emulator for PCs - * Copyright (C) 2002-2014 David Quintana [gigaherz] + * Copyright (C) 2002-2010 PCSX2 Dev Team * * PCSX2 is free software: you can redistribute it and/or modify it under the terms * of the GNU Lesser General Public License as published by the Free Software Found- @@ -13,7 +13,6 @@ * If not, see . */ - #define WINVER 0x0600 #define _WIN32_WINNT 0x0600 @@ -33,17 +32,17 @@ #include #include #include -#define EXTERN +#define EXTERN #include "DEV9.h" -#undef EXTERN +#undef EXTERN #include "Config.h" #include "smap.h" #include "ata.h" #ifdef _WIN32 -#pragma warning(disable:4244) +#pragma warning(disable : 4244) -HINSTANCE hInst=NULL; +HINSTANCE hInst = NULL; #endif //#define HDD_48BIT @@ -53,7 +52,8 @@ HINSTANCE hInst=NULL; static __inline__ unsigned long long GetTickCount(void) { unsigned long long int x; - __asm__ volatile ("rdtsc" : "=A" (x)); + __asm__ volatile("rdtsc" + : "=A"(x)); return x; } @@ -62,25 +62,82 @@ static __inline__ unsigned long long GetTickCount(void) static __inline__ unsigned long long GetTickCount(void) { unsigned hi, lo; - __asm__ __volatile__ ("rdtsc" : "=a"(lo), "=d"(hi)); - return ( (unsigned long long)lo)|( ((unsigned long long)hi)<<32 ); + __asm__ __volatile__("rdtsc" + : "=a"(lo), "=d"(hi)); + return ((unsigned long long)lo) | (((unsigned long long)hi) << 32); } #endif u8 eeprom[] = { //0x6D, 0x76, 0x63, 0x61, 0x31, 0x30, 0x08, 0x01, - 0x76, 0x6D, 0x61, 0x63, 0x30, 0x31, 0x07, 0x02, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x76, + 0x6D, + 0x61, + 0x63, + 0x30, + 0x31, + 0x07, + 0x02, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x10, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x10, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x10, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, }; -u32 *iopPC; +u32* iopPC; #ifdef _WIN32 HANDLE hEeprom; @@ -99,24 +156,27 @@ int Log = 1; int Log = 0; #endif -void __Log(char *fmt, ...) { - if (!Log) return; +void __Log(char* fmt, ...) +{ + if (!Log) + return; va_list list; - static int ticks=-1; - int nticks=GetTickCount(); + static int ticks = -1; + int nticks = GetTickCount(); - if(ticks==-1) ticks=nticks; + if (ticks == -1) + ticks = nticks; - if(iopPC!=NULL) + if (iopPC != NULL) { DEV9Log.Write("[%10d + %4d, IOP PC = %08x] ", nticks, nticks - ticks, *iopPC); } else { - DEV9Log.Write( "[%10d + %4d] ", nticks, nticks - ticks); + DEV9Log.Write("[%10d + %4d] ", nticks, nticks - ticks); } - ticks=nticks; + ticks = nticks; va_start(list, fmt); DEV9Log.Write(fmt, list); @@ -146,63 +206,62 @@ s32 DEV9init() #ifdef _WIN32 hEeprom = CreateFile( - "eeprom.dat", - GENERIC_READ|GENERIC_WRITE, - 0, - NULL, - OPEN_EXISTING, - FILE_FLAG_WRITE_THROUGH, - NULL - ); + "eeprom.dat", + GENERIC_READ | GENERIC_WRITE, + 0, + NULL, + OPEN_EXISTING, + FILE_FLAG_WRITE_THROUGH, + NULL); - if(hEeprom==INVALID_HANDLE_VALUE) + if (hEeprom == INVALID_HANDLE_VALUE) { - dev9.eeprom=(u16*)eeprom; + dev9.eeprom = (u16*)eeprom; } else { - mapping=CreateFileMapping(hEeprom,NULL,PAGE_READWRITE,0,0,NULL); - if(mapping==INVALID_HANDLE_VALUE) + mapping = CreateFileMapping(hEeprom, NULL, PAGE_READWRITE, 0, 0, NULL); + if (mapping == INVALID_HANDLE_VALUE) { CloseHandle(hEeprom); - dev9.eeprom=(u16*)eeprom; + dev9.eeprom = (u16*)eeprom; } else { - dev9.eeprom = (u16*)MapViewOfFile(mapping,FILE_MAP_WRITE,0,0,0); + dev9.eeprom = (u16*)MapViewOfFile(mapping, FILE_MAP_WRITE, 0, 0, 0); - if(dev9.eeprom==NULL) + if (dev9.eeprom == NULL) { CloseHandle(mapping); CloseHandle(hEeprom); - dev9.eeprom=(u16*)eeprom; + dev9.eeprom = (u16*)eeprom; } } } #else hEeprom = open("eeprom.dat", O_RDWR, 0); - if(-1 == hEeprom) + if (-1 == hEeprom) { - dev9.eeprom=(u16*)eeprom; + dev9.eeprom = (u16*)eeprom; } else { - dev9.eeprom = (u16*)mmap(NULL, 64, PROT_READ|PROT_WRITE, MAP_FILE|MAP_SHARED, hEeprom, 0); + dev9.eeprom = (u16*)mmap(NULL, 64, PROT_READ | PROT_WRITE, MAP_FILE | MAP_SHARED, hEeprom, 0); - if(dev9.eeprom==NULL) - { - close(hEeprom); - dev9.eeprom=(u16*)eeprom; - } + if (dev9.eeprom == NULL) + { + close(hEeprom); + dev9.eeprom = (u16*)eeprom; + } } #endif int rxbi; - for(rxbi=0;rxbi<(SMAP_BD_SIZE/8);rxbi++) + for (rxbi = 0; rxbi < (SMAP_BD_SIZE / 8); rxbi++) { - smap_bd_t *pbd = (smap_bd_t *)&dev9.dev9R[SMAP_BD_RX_BASE & 0xffff]; + smap_bd_t* pbd = (smap_bd_t*)&dev9.dev9R[SMAP_BD_RX_BASE & 0xffff]; pbd = &pbd[rxbi]; pbd->ctrl_stat = SMAP_BD_RX_EMPTY; @@ -214,22 +273,23 @@ s32 DEV9init() return 0; } -void DEV9shutdown() { +void DEV9shutdown() +{ DEV9_LOG("DEV9shutdown\n"); #ifdef DEV9_LOG_ENABLE DEV9Log.Close(); #endif } -s32 DEV9open(void *pDsp) +s32 DEV9open(void* pDsp) { DEV9_LOG("DEV9open\n"); LoadConf(); DEV9_LOG("open r+: %s\n", config.Hdd); - config.HddSize = 8*1024; - + config.HddSize = 8 * 1024; + iopPC = (u32*)pDsp; - + #ifdef ENABLE_ATA ata_init(); #endif @@ -249,7 +309,7 @@ int DEV9irqHandler(void) { //dev9Ru16(SPD_R_INTR_STAT)|= dev9.irqcause; DEV9_LOG("_DEV9irqHandler %x, %x\n", dev9.irqcause, dev9Ru16(SPD_R_INTR_MASK)); - if (dev9.irqcause & dev9Ru16(SPD_R_INTR_MASK)) + if (dev9.irqcause & dev9Ru16(SPD_R_INTR_MASK)) return 1; return 0; } @@ -258,21 +318,22 @@ void _DEV9irq(int cause, int cycles) { DEV9_LOG("_DEV9irq %x, %x\n", cause, dev9Ru16(SPD_R_INTR_MASK)); - dev9.irqcause|= cause; + dev9.irqcause |= cause; - if(cycles<1) + if (cycles < 1) dev9Irq(1); else dev9Irq(cycles); } -u8 DEV9read8(u32 addr) { +u8 DEV9read8(u32 addr) +{ if (!config.ethEnable & !config.hddEnable) return 0; u8 hard; - if (addr>=ATA_DEV9_HDD_BASE && addr= ATA_DEV9_HDD_BASE && addr < ATA_DEV9_HDD_END) { #ifdef ENABLE_ATA return ata_read<1>(addr); @@ -280,13 +341,13 @@ u8 DEV9read8(u32 addr) { return 0; #endif } - if (addr>=SMAP_REGBASE && addr= SMAP_REGBASE && addr < FLASH_REGBASE) { //smap return smap_read8(addr); } - - switch (addr) + + switch (addr) { case SPD_R_PIO_DATA: @@ -296,24 +357,26 @@ u8 DEV9read8(u32 addr) { break; }*/ - if(dev9.eeprom_state==EEPROM_TDATA) + if (dev9.eeprom_state == EEPROM_TDATA) { - if(dev9.eeprom_command==2) //read + if (dev9.eeprom_command == 2) //read { - if(dev9.eeprom_bit==0xFF) - hard=0; + if (dev9.eeprom_bit == 0xFF) + hard = 0; else - hard=((dev9.eeprom[dev9.eeprom_address]<>11; + hard = ((dev9.eeprom[dev9.eeprom_address] << dev9.eeprom_bit) & 0x8000) >> 11; dev9.eeprom_bit++; - if(dev9.eeprom_bit==16) + if (dev9.eeprom_bit == 16) { dev9.eeprom_address++; - dev9.eeprom_bit=0; + dev9.eeprom_bit = 0; } } - else hard=0; + else + hard = 0; } - else hard=0; + else + hard = 0; return hard; case DEV9_R_REV: @@ -321,15 +384,16 @@ u8 DEV9read8(u32 addr) { break; default: - if ((addr >= FLASH_REGBASE) && (addr < (FLASH_REGBASE + FLASH_REGSIZE))) { + if ((addr >= FLASH_REGBASE) && (addr < (FLASH_REGBASE + FLASH_REGSIZE))) + { return (u8)FLASHread32(addr, 1); } - hard = dev9Ru8(addr); + hard = dev9Ru8(addr); DEV9_LOG("*Unknown 8bit read at address %lx value %x\n", addr, hard); return hard; } - + DEV9_LOG("*Known 8bit read at address %lx value %x\n", addr, hard); return hard; } @@ -340,7 +404,7 @@ u16 DEV9read16(u32 addr) return 0; u16 hard; - if (addr>=ATA_DEV9_HDD_BASE && addr= ATA_DEV9_HDD_BASE && addr < ATA_DEV9_HDD_END) { #ifdef ENABLE_ATA return ata_read<2>(addr); @@ -348,13 +412,13 @@ u16 DEV9read16(u32 addr) return 0; #endif } - if (addr>=SMAP_REGBASE && addr= SMAP_REGBASE && addr < FLASH_REGBASE) { //smap return smap_read16(addr); } - switch (addr) + switch (addr) { case SPD_R_INTR_STAT: return dev9.irqcause; @@ -376,25 +440,27 @@ u16 DEV9read16(u32 addr) /*if (config.hddEnable) { hard|= 0x2; }*/ - if (config.ethEnable) { - hard|= 0x1; + if (config.ethEnable) + { + hard |= 0x1; } - hard|= 0x20;//flash + hard |= 0x20; //flash break; case SPD_R_0e: hard = 0x0002; break; default: - if ((addr >= FLASH_REGBASE) && (addr < (FLASH_REGBASE + FLASH_REGSIZE))) { + if ((addr >= FLASH_REGBASE) && (addr < (FLASH_REGBASE + FLASH_REGSIZE))) + { return (u16)FLASHread32(addr, 2); } - hard = dev9Ru16(addr); + hard = dev9Ru16(addr); DEV9_LOG("*Unknown 16bit read at address %lx value %x\n", addr, hard); return hard; } - + DEV9_LOG("*Known 16bit read at address %lx value %x\n", addr, hard); return hard; } @@ -405,7 +471,7 @@ u32 DEV9read32(u32 addr) return 0; u32 hard; - if (addr>=ATA_DEV9_HDD_BASE && addr= ATA_DEV9_HDD_BASE && addr < ATA_DEV9_HDD_END) { #ifdef ENABLE_ATA return ata_read<4>(addr); @@ -413,52 +479,54 @@ u32 DEV9read32(u32 addr) return 0; #endif } - if (addr>=SMAP_REGBASE && addr= SMAP_REGBASE && addr < FLASH_REGBASE) { //smap return smap_read32(addr); } -// switch (addr) { + // switch (addr) { -// default: - if ((addr >= FLASH_REGBASE) && (addr < (FLASH_REGBASE + FLASH_REGSIZE))) { - return (u32)FLASHread32(addr, 4); - } + // default: + if ((addr >= FLASH_REGBASE) && (addr < (FLASH_REGBASE + FLASH_REGSIZE))) + { + return (u32)FLASHread32(addr, 4); + } - hard = dev9Ru32(addr); - DEV9_LOG("*Unknown 32bit read at address %lx value %x\n", addr, hard); - return hard; -// } + hard = dev9Ru32(addr); + DEV9_LOG("*Unknown 32bit read at address %lx value %x\n", addr, hard); + return hard; + // } -// DEV9_LOG("*Known 32bit read at address %lx: %lx\n", addr, hard); -// return hard; + // DEV9_LOG("*Known 32bit read at address %lx: %lx\n", addr, hard); + // return hard; } -void DEV9write8(u32 addr, u8 value) +void DEV9write8(u32 addr, u8 value) { if (!config.ethEnable & !config.hddEnable) return; - if (addr>=ATA_DEV9_HDD_BASE && addr= ATA_DEV9_HDD_BASE && addr < ATA_DEV9_HDD_END) { #ifdef ENABLE_ATA - ata_write<1>(addr,value); + ata_write<1>(addr, value); #endif return; } - if (addr>=SMAP_REGBASE && addr= SMAP_REGBASE && addr < FLASH_REGBASE) { //smap - smap_write8(addr,value); + smap_write8(addr, value); return; } - switch (addr) { + switch (addr) + { case 0x10000020: dev9.irqcause = 0xff; break; case SPD_R_INTR_STAT: emu_printf("SPD_R_INTR_STAT , WTFH ?\n"); - dev9.irqcause=value; + dev9.irqcause = value; return; case SPD_R_INTR_MASK: emu_printf("SPD_R_INTR_MASK8 , WTFH ?\n"); @@ -467,36 +535,36 @@ void DEV9write8(u32 addr, u8 value) case SPD_R_PIO_DIR: //DEV9_LOG("SPD_R_PIO_DIR 8bit write %x\n", value); - if((value&0xc0)!=0xc0) + if ((value & 0xc0) != 0xc0) return; - if((value&0x30)==0x20) + if ((value & 0x30) == 0x20) { - dev9.eeprom_state=0; + dev9.eeprom_state = 0; } - dev9.eeprom_dir=(value>>4)&3; - + dev9.eeprom_dir = (value >> 4) & 3; + return; case SPD_R_PIO_DATA: //DEV9_LOG("SPD_R_PIO_DATA 8bit write %x\n", value); - if((value&0xc0)!=0xc0) + if ((value & 0xc0) != 0xc0) return; - switch(dev9.eeprom_state) + switch (dev9.eeprom_state) { case EEPROM_READY: - dev9.eeprom_command=0; + dev9.eeprom_command = 0; dev9.eeprom_state++; break; case EEPROM_OPCD0: - dev9.eeprom_command = (value>>4)&2; + dev9.eeprom_command = (value >> 4) & 2; dev9.eeprom_state++; - dev9.eeprom_bit=0xFF; + dev9.eeprom_bit = 0xFF; break; case EEPROM_OPCD1: - dev9.eeprom_command |= (value>>5)&1; + dev9.eeprom_command |= (value >> 5) & 1; dev9.eeprom_state++; break; case EEPROM_ADDR0: @@ -506,32 +574,33 @@ void DEV9write8(u32 addr, u8 value) case EEPROM_ADDR4: case EEPROM_ADDR5: dev9.eeprom_address = - (dev9.eeprom_address&(63^(1<<(dev9.eeprom_state-EEPROM_ADDR0))))| - ((value>>(dev9.eeprom_state-EEPROM_ADDR0))&(0x20>>(dev9.eeprom_state-EEPROM_ADDR0))); + (dev9.eeprom_address & (63 ^ (1 << (dev9.eeprom_state - EEPROM_ADDR0)))) | + ((value >> (dev9.eeprom_state - EEPROM_ADDR0)) & (0x20 >> (dev9.eeprom_state - EEPROM_ADDR0))); dev9.eeprom_state++; break; case EEPROM_TDATA: + { + if (dev9.eeprom_command == 1) //write { - if(dev9.eeprom_command==1) //write + dev9.eeprom[dev9.eeprom_address] = + (dev9.eeprom[dev9.eeprom_address] & (63 ^ (1 << dev9.eeprom_bit))) | + ((value >> dev9.eeprom_bit) & (0x8000 >> dev9.eeprom_bit)); + dev9.eeprom_bit++; + if (dev9.eeprom_bit == 16) { - dev9.eeprom[dev9.eeprom_address] = - (dev9.eeprom[dev9.eeprom_address]&(63^(1<>dev9.eeprom_bit)&(0x8000>>dev9.eeprom_bit)); - dev9.eeprom_bit++; - if(dev9.eeprom_bit==16) - { - dev9.eeprom_address++; - dev9.eeprom_bit=0; - } + dev9.eeprom_address++; + dev9.eeprom_bit = 0; } } - break; + } + break; } return; default: - if ((addr >= FLASH_REGBASE) && (addr < (FLASH_REGBASE + FLASH_REGSIZE))) { + if ((addr >= FLASH_REGBASE) && (addr < (FLASH_REGBASE + FLASH_REGSIZE))) + { FLASHwrite32(addr, (u32)value, 1); return; } @@ -549,32 +618,33 @@ void DEV9write16(u32 addr, u16 value) if (!config.ethEnable & !config.hddEnable) return; - if (addr>=ATA_DEV9_HDD_BASE && addr= ATA_DEV9_HDD_BASE && addr < ATA_DEV9_HDD_END) { #ifdef ENABLE_ATA - ata_write<2>(addr,value); + ata_write<2>(addr, value); #endif return; } - if (addr>=SMAP_REGBASE && addr= SMAP_REGBASE && addr < FLASH_REGBASE) { //smap - smap_write16(addr,value); + smap_write16(addr, value); return; } - switch (addr) + switch (addr) { case SPD_R_INTR_MASK: - if ((dev9Ru16(SPD_R_INTR_MASK)!=value) && ((dev9Ru16(SPD_R_INTR_MASK)|value) & dev9.irqcause)) + if ((dev9Ru16(SPD_R_INTR_MASK) != value) && ((dev9Ru16(SPD_R_INTR_MASK) | value) & dev9.irqcause)) { - DEV9_LOG("SPD_R_INTR_MASK16=0x%X , checking for masked/unmasked interrupts\n",value); + DEV9_LOG("SPD_R_INTR_MASK16=0x%X , checking for masked/unmasked interrupts\n", value); dev9Irq(1); } break; - + default: - if ((addr >= FLASH_REGBASE) && (addr < (FLASH_REGBASE + FLASH_REGSIZE))) { + if ((addr >= FLASH_REGBASE) && (addr < (FLASH_REGBASE + FLASH_REGSIZE))) + { FLASHwrite32(addr, (u32)value, 2); return; } @@ -592,26 +662,27 @@ void DEV9write32(u32 addr, u32 value) if (!config.ethEnable & !config.hddEnable) return; - if (addr>=ATA_DEV9_HDD_BASE && addr= ATA_DEV9_HDD_BASE && addr < ATA_DEV9_HDD_END) { #ifdef ENABLE_ATA - ata_write<4>(addr,value); + ata_write<4>(addr, value); #endif return; } - if (addr>=SMAP_REGBASE && addr= SMAP_REGBASE && addr < FLASH_REGBASE) { //smap - smap_write32(addr,value); + smap_write32(addr, value); return; } - switch (addr) - { + switch (addr) + { case SPD_R_INTR_MASK: emu_printf("SPD_R_INTR_MASK , WTFH ?\n"); break; default: - if ((addr >= FLASH_REGBASE) && (addr < (FLASH_REGBASE + FLASH_REGSIZE))) { + if ((addr >= FLASH_REGBASE) && (addr < (FLASH_REGBASE + FLASH_REGSIZE))) + { FLASHwrite32(addr, (u32)value, 4); return; } @@ -624,17 +695,17 @@ void DEV9write32(u32 addr, u32 value) DEV9_LOG("*Known 32bit write at address %lx value %lx\n", addr, value); } -void DEV9readDMA8Mem(u32 *pMem, int size) +void DEV9readDMA8Mem(u32* pMem, int size) { if (!config.ethEnable & !config.hddEnable) return; DEV9_LOG("*DEV9readDMA8Mem: size %x\n", size); emu_printf("rDMA\n"); - - smap_readDMA8Mem(pMem,size); + + smap_readDMA8Mem(pMem, size); #ifdef ENABLE_ATA - ata_readDMA8Mem(pMem,size); + ata_readDMA8Mem(pMem, size); #endif } @@ -645,10 +716,10 @@ void DEV9writeDMA8Mem(u32* pMem, int size) DEV9_LOG("*DEV9writeDMA8Mem: size %x\n", size); emu_printf("wDMA\n"); - - smap_writeDMA8Mem(pMem,size); + + smap_writeDMA8Mem(pMem, size); #ifdef ENABLE_ATA - ata_writeDMA8Mem(pMem,size); + ata_writeDMA8Mem(pMem, size); #endif } @@ -664,7 +735,7 @@ void DEV9setSettingsDir(const char* dir) { // Grab the ini directory. // TODO: Use - s_strIniPath = (dir == NULL) ? "inis" : dir; + s_strIniPath = (dir == NULL) ? "inis" : dir; } void DEV9setLogDir(const char* dir) @@ -678,12 +749,12 @@ void DEV9setLogDir(const char* dir) LogInit(); } -int emu_printf(const char *fmt, ...) +int emu_printf(const char* fmt, ...) { va_list vl; int ret; - va_start(vl,fmt); - ret = vfprintf(stderr,fmt,vl); + va_start(vl, fmt); + ret = vfprintf(stderr, fmt, vl); va_end(vl); fflush(stderr); return ret; diff --git a/pcsx2/DEV9/DEV9.h b/pcsx2/DEV9/DEV9.h index dcfa129cb4..6a9465a1b4 100644 --- a/pcsx2/DEV9/DEV9.h +++ b/pcsx2/DEV9/DEV9.h @@ -1,5 +1,5 @@ /* PCSX2 - PS2 Emulator for PCs - * Copyright (C) 2002-2014 David Quintana [gigaherz] + * Copyright (C) 2002-2010 PCSX2 Dev Team * * PCSX2 is free software: you can redistribute it and/or modify it under the terms * of the GNU Lesser General Public License as published by the Free Software Found- @@ -18,8 +18,8 @@ #include #include -#ifndef EXTERN -#define EXTERN extern +#ifndef EXTERN +#define EXTERN extern #endif #define DEV9defs //#define WINVER 0x0600 @@ -31,7 +31,7 @@ #ifdef _WIN32 -#define usleep(x) Sleep(x / 1000) +#define usleep(x) Sleep(x / 1000) #include #include #include @@ -53,10 +53,11 @@ void rx_process(NetPacket* pk); bool rx_fifo_can_rx(); -#define ETH_DEF "eth0" -#define HDD_DEF "DEV9hdd.raw" +#define ETH_DEF "eth0" +#define HDD_DEF "DEV9hdd.raw" - typedef struct { +typedef struct +{ char Eth[256]; char Hdd[256]; int HddSize; @@ -67,21 +68,22 @@ bool rx_fifo_can_rx(); EXTERN Config config; -typedef struct { +typedef struct +{ s8 dev9R[0x10000]; u8 eeprom_state; u8 eeprom_command; u8 eeprom_address; u8 eeprom_bit; u8 eeprom_dir; - u16 *eeprom;//[32]; - + u16* eeprom; //[32]; + u32 rxbdi; - u8 rxfifo[16*1024]; + u8 rxfifo[16 * 1024]; u16 rxfifo_wr_ptr; - + u32 txbdi; - u8 txfifo[16*1024]; + u8 txfifo[16 * 1024]; u16 txfifo_rd_ptr; u8 bd_swap; @@ -90,49 +92,49 @@ typedef struct { u32 atasize; u16 phyregs[32]; int irqcause; - u8 atacmd; + u8 atacmd; u32 atasector; u32 atansector; } dev9Struct; //EEPROM states #define EEPROM_READY 0 -#define EEPROM_OPCD0 1 //waiting for first bit of opcode -#define EEPROM_OPCD1 2 //waiting for second bit of opcode -#define EEPROM_ADDR0 3 //waiting for address bits +#define EEPROM_OPCD0 1 //waiting for first bit of opcode +#define EEPROM_OPCD1 2 //waiting for second bit of opcode +#define EEPROM_ADDR0 3 //waiting for address bits #define EEPROM_ADDR1 4 #define EEPROM_ADDR2 5 #define EEPROM_ADDR3 6 #define EEPROM_ADDR4 7 #define EEPROM_ADDR5 8 -#define EEPROM_TDATA 9 //ready to send/receive data +#define EEPROM_TDATA 9 //ready to send/receive data EXTERN dev9Struct dev9; -#define dev9_rxfifo_write(x) (dev9.rxfifo[dev9.rxfifo_wr_ptr++]=x) +#define dev9_rxfifo_write(x) (dev9.rxfifo[dev9.rxfifo_wr_ptr++] = x) -#define dev9Rs8(mem) dev9.dev9R[(mem) & 0xffff] -#define dev9Rs16(mem) (*(s16*)&dev9.dev9R[(mem) & 0xffff]) -#define dev9Rs32(mem) (*(s32*)&dev9.dev9R[(mem) & 0xffff]) -#define dev9Ru8(mem) (*(u8*) &dev9.dev9R[(mem) & 0xffff]) -#define dev9Ru16(mem) (*(u16*)&dev9.dev9R[(mem) & 0xffff]) -#define dev9Ru32(mem) (*(u32*)&dev9.dev9R[(mem) & 0xffff]) +#define dev9Rs8(mem) dev9.dev9R[(mem)&0xffff] +#define dev9Rs16(mem) (*(s16*)&dev9.dev9R[(mem)&0xffff]) +#define dev9Rs32(mem) (*(s32*)&dev9.dev9R[(mem)&0xffff]) +#define dev9Ru8(mem) (*(u8*)&dev9.dev9R[(mem)&0xffff]) +#define dev9Ru16(mem) (*(u16*)&dev9.dev9R[(mem)&0xffff]) +#define dev9Ru32(mem) (*(u32*)&dev9.dev9R[(mem)&0xffff]) -EXTERN int ThreadRun; +EXTERN int ThreadRun; -s32 _DEV9open(); +s32 _DEV9open(); void _DEV9close(); //void DEV9thread(); -EXTERN PluginLog DEV9Log; +EXTERN PluginLog DEV9Log; //Yes these are meant to be a lowercase extern -extern std::string s_strIniPath; -extern std::string s_strLogPath; -void __Log(char *fmt, ...); +extern std::string s_strIniPath; +extern std::string s_strLogPath; +void __Log(char* fmt, ...); -void SysMessage(char *fmt, ...); +void SysMessage(char* fmt, ...); -#define DEV9_R_REV 0x1f80146e +#define DEV9_R_REV 0x1f80146e /* @@ -143,38 +145,38 @@ void SysMessage(char *fmt, ...); * * code included from the ps2smap iop driver, modified by linuzappz * */ -#define SPD_REGBASE 0x10000000 +#define SPD_REGBASE 0x10000000 -#define SPD_R_REV (SPD_REGBASE + 0x00) -#define SPD_R_REV_1 (SPD_REGBASE + 0x02) - // bit 0: smap - // bit 1: hdd - // bit 5: flash -#define SPD_R_REV_3 (SPD_REGBASE + 0x04) -#define SPD_R_0e (SPD_REGBASE + 0x0e) +#define SPD_R_REV (SPD_REGBASE + 0x00) +#define SPD_R_REV_1 (SPD_REGBASE + 0x02) +// bit 0: smap +// bit 1: hdd +// bit 5: flash +#define SPD_R_REV_3 (SPD_REGBASE + 0x04) +#define SPD_R_0e (SPD_REGBASE + 0x0e) -#define SPD_R_DMA_CTRL (SPD_REGBASE + 0x24) -#define SPD_R_INTR_STAT (SPD_REGBASE + 0x28) -#define SPD_R_INTR_MASK (SPD_REGBASE + 0x2a) -#define SPD_R_PIO_DIR (SPD_REGBASE + 0x2c) -#define SPD_R_PIO_DATA (SPD_REGBASE + 0x2e) -#define SPD_PP_DOUT (1<<4) /* Data output, read port */ -#define SPD_PP_DIN (1<<5) /* Data input, write port */ -#define SPD_PP_SCLK (1<<6) /* Clock, write port */ -#define SPD_PP_CSEL (1<<7) /* Chip select, write port */ +#define SPD_R_DMA_CTRL (SPD_REGBASE + 0x24) +#define SPD_R_INTR_STAT (SPD_REGBASE + 0x28) +#define SPD_R_INTR_MASK (SPD_REGBASE + 0x2a) +#define SPD_R_PIO_DIR (SPD_REGBASE + 0x2c) +#define SPD_R_PIO_DATA (SPD_REGBASE + 0x2e) +#define SPD_PP_DOUT (1 << 4) /* Data output, read port */ +#define SPD_PP_DIN (1 << 5) /* Data input, write port */ +#define SPD_PP_SCLK (1 << 6) /* Clock, write port */ +#define SPD_PP_CSEL (1 << 7) /* Chip select, write port */ /* Operation codes */ -#define SPD_PP_OP_READ 2 -#define SPD_PP_OP_WRITE 1 -#define SPD_PP_OP_EWEN 0 -#define SPD_PP_OP_EWDS 0 +#define SPD_PP_OP_READ 2 +#define SPD_PP_OP_WRITE 1 +#define SPD_PP_OP_EWEN 0 +#define SPD_PP_OP_EWDS 0 -#define SPD_R_XFR_CTRL (SPD_REGBASE + 0x32) -#define SPD_R_IF_CTRL (SPD_REGBASE + 0x64) -#define SPD_IF_ATA_RESET 0x80 -#define SPD_IF_DMA_ENABLE 0x04 -#define SPD_R_PIO_MODE (SPD_REGBASE + 0x70) -#define SPD_R_MWDMA_MODE (SPD_REGBASE + 0x72) -#define SPD_R_UDMA_MODE (SPD_REGBASE + 0x74) +#define SPD_R_XFR_CTRL (SPD_REGBASE + 0x32) +#define SPD_R_IF_CTRL (SPD_REGBASE + 0x64) +#define SPD_IF_ATA_RESET 0x80 +#define SPD_IF_DMA_ENABLE 0x04 +#define SPD_R_PIO_MODE (SPD_REGBASE + 0x70) +#define SPD_R_MWDMA_MODE (SPD_REGBASE + 0x72) +#define SPD_R_UDMA_MODE (SPD_REGBASE + 0x74) /* @@ -187,365 +189,366 @@ void SysMessage(char *fmt, ...); /* SMAP interrupt status bits (selected from the SPEED device). */ -#define SMAP_INTR_EMAC3 (1<<6) -#define SMAP_INTR_RXEND (1<<5) -#define SMAP_INTR_TXEND (1<<4) -#define SMAP_INTR_RXDNV (1<<3) /* descriptor not valid */ -#define SMAP_INTR_TXDNV (1<<2) /* descriptor not valid */ -#define SMAP_INTR_CLR_ALL (SMAP_INTR_RXEND|SMAP_INTR_TXEND|SMAP_INTR_RXDNV) -#define SMAP_INTR_ENA_ALL (SMAP_INTR_EMAC3|SMAP_INTR_CLR_ALL) -#define SMAP_INTR_BITMSK 0x7C +#define SMAP_INTR_EMAC3 (1 << 6) +#define SMAP_INTR_RXEND (1 << 5) +#define SMAP_INTR_TXEND (1 << 4) +#define SMAP_INTR_RXDNV (1 << 3) /* descriptor not valid */ +#define SMAP_INTR_TXDNV (1 << 2) /* descriptor not valid */ +#define SMAP_INTR_CLR_ALL (SMAP_INTR_RXEND | SMAP_INTR_TXEND | SMAP_INTR_RXDNV) +#define SMAP_INTR_ENA_ALL (SMAP_INTR_EMAC3 | SMAP_INTR_CLR_ALL) +#define SMAP_INTR_BITMSK 0x7C /* SMAP Register Definitions. */ -#define SMAP_REGBASE (SPD_REGBASE + 0x100) +#define SMAP_REGBASE (SPD_REGBASE + 0x100) -#define SMAP_R_BD_MODE (SMAP_REGBASE + 0x02) -#define SMAP_BD_SWAP (1<<0) +#define SMAP_R_BD_MODE (SMAP_REGBASE + 0x02) +#define SMAP_BD_SWAP (1 << 0) -#define SMAP_R_INTR_CLR (SMAP_REGBASE + 0x28) +#define SMAP_R_INTR_CLR (SMAP_REGBASE + 0x28) /* SMAP FIFO Registers. */ -#define SMAP_R_TXFIFO_CTRL (SMAP_REGBASE + 0xf00) -#define SMAP_TXFIFO_RESET (1<<0) -#define SMAP_TXFIFO_DMAEN (1<<1) -#define SMAP_R_TXFIFO_WR_PTR (SMAP_REGBASE + 0xf04) -#define SMAP_R_TXFIFO_SIZE (SMAP_REGBASE + 0xf08) -#define SMAP_R_TXFIFO_FRAME_CNT (SMAP_REGBASE + 0xf0C) -#define SMAP_R_TXFIFO_FRAME_INC (SMAP_REGBASE + 0xf10) -#define SMAP_R_TXFIFO_DATA (SMAP_REGBASE + 0x1000) +#define SMAP_R_TXFIFO_CTRL (SMAP_REGBASE + 0xf00) +#define SMAP_TXFIFO_RESET (1 << 0) +#define SMAP_TXFIFO_DMAEN (1 << 1) +#define SMAP_R_TXFIFO_WR_PTR (SMAP_REGBASE + 0xf04) +#define SMAP_R_TXFIFO_SIZE (SMAP_REGBASE + 0xf08) +#define SMAP_R_TXFIFO_FRAME_CNT (SMAP_REGBASE + 0xf0C) +#define SMAP_R_TXFIFO_FRAME_INC (SMAP_REGBASE + 0xf10) +#define SMAP_R_TXFIFO_DATA (SMAP_REGBASE + 0x1000) -#define SMAP_R_RXFIFO_CTRL (SMAP_REGBASE + 0xf30) -#define SMAP_RXFIFO_RESET (1<<0) -#define SMAP_RXFIFO_DMAEN (1<<1) -#define SMAP_R_RXFIFO_RD_PTR (SMAP_REGBASE + 0xf34) -#define SMAP_R_RXFIFO_SIZE (SMAP_REGBASE + 0xf38) -#define SMAP_R_RXFIFO_FRAME_CNT (SMAP_REGBASE + 0xf3C) -#define SMAP_R_RXFIFO_FRAME_DEC (SMAP_REGBASE + 0xf40) -#define SMAP_R_RXFIFO_DATA (SMAP_REGBASE + 0x1100) - -#define SMAP_R_FIFO_ADDR (SMAP_REGBASE + 0x1200) -#define SMAP_FIFO_CMD_READ (1<<1) -#define SMAP_FIFO_DATA_SWAP (1<<0) -#define SMAP_R_FIFO_DATA (SMAP_REGBASE + 0x1208) +#define SMAP_R_RXFIFO_CTRL (SMAP_REGBASE + 0xf30) +#define SMAP_RXFIFO_RESET (1 << 0) +#define SMAP_RXFIFO_DMAEN (1 << 1) +#define SMAP_R_RXFIFO_RD_PTR (SMAP_REGBASE + 0xf34) +#define SMAP_R_RXFIFO_SIZE (SMAP_REGBASE + 0xf38) +#define SMAP_R_RXFIFO_FRAME_CNT (SMAP_REGBASE + 0xf3C) +#define SMAP_R_RXFIFO_FRAME_DEC (SMAP_REGBASE + 0xf40) +#define SMAP_R_RXFIFO_DATA (SMAP_REGBASE + 0x1100) + +#define SMAP_R_FIFO_ADDR (SMAP_REGBASE + 0x1200) +#define SMAP_FIFO_CMD_READ (1 << 1) +#define SMAP_FIFO_DATA_SWAP (1 << 0) +#define SMAP_R_FIFO_DATA (SMAP_REGBASE + 0x1208) /* EMAC3 Registers. */ -#define SMAP_EMAC3_REGBASE (SMAP_REGBASE + 0x1f00) +#define SMAP_EMAC3_REGBASE (SMAP_REGBASE + 0x1f00) -#define SMAP_R_EMAC3_MODE0_L (SMAP_EMAC3_REGBASE + 0x00) -#define SMAP_E3_RXMAC_IDLE (1<<(15+16)) -#define SMAP_E3_TXMAC_IDLE (1<<(14+16)) -#define SMAP_E3_SOFT_RESET (1<<(13+16)) -#define SMAP_E3_TXMAC_ENABLE (1<<(12+16)) -#define SMAP_E3_RXMAC_ENABLE (1<<(11+16)) -#define SMAP_E3_WAKEUP_ENABLE (1<<(10+16)) -#define SMAP_R_EMAC3_MODE0_H (SMAP_EMAC3_REGBASE + 0x02) +#define SMAP_R_EMAC3_MODE0_L (SMAP_EMAC3_REGBASE + 0x00) +#define SMAP_E3_RXMAC_IDLE (1 << (15 + 16)) +#define SMAP_E3_TXMAC_IDLE (1 << (14 + 16)) +#define SMAP_E3_SOFT_RESET (1 << (13 + 16)) +#define SMAP_E3_TXMAC_ENABLE (1 << (12 + 16)) +#define SMAP_E3_RXMAC_ENABLE (1 << (11 + 16)) +#define SMAP_E3_WAKEUP_ENABLE (1 << (10 + 16)) +#define SMAP_R_EMAC3_MODE0_H (SMAP_EMAC3_REGBASE + 0x02) -#define SMAP_R_EMAC3_MODE1 (SMAP_EMAC3_REGBASE + 0x04) -#define SMAP_R_EMAC3_MODE1_L (SMAP_EMAC3_REGBASE + 0x04) -#define SMAP_R_EMAC3_MODE1_H (SMAP_EMAC3_REGBASE + 0x06) -#define SMAP_E3_FDX_ENABLE (1<<31) -#define SMAP_E3_INLPBK_ENABLE (1<<30) /* internal loop back */ -#define SMAP_E3_VLAN_ENABLE (1<<29) -#define SMAP_E3_FLOWCTRL_ENABLE (1<<28) /* integrated flow ctrl(pause frame) */ -#define SMAP_E3_ALLOW_PF (1<<27) /* allow pause frame */ -#define SMAP_E3_ALLOW_EXTMNGIF (1<<25) /* allow external management IF */ -#define SMAP_E3_IGNORE_SQE (1<<24) -#define SMAP_E3_MEDIA_FREQ_BITSFT (22) -#define SMAP_E3_MEDIA_10M (0<<22) -#define SMAP_E3_MEDIA_100M (1<<22) -#define SMAP_E3_MEDIA_1000M (2<<22) -#define SMAP_E3_MEDIA_MSK (3<<22) -#define SMAP_E3_RXFIFO_SIZE_BITSFT (20) -#define SMAP_E3_RXFIFO_512 (0<<20) -#define SMAP_E3_RXFIFO_1K (1<<20) -#define SMAP_E3_RXFIFO_2K (2<<20) -#define SMAP_E3_RXFIFO_4K (3<<20) -#define SMAP_E3_TXFIFO_SIZE_BITSFT (18) -#define SMAP_E3_TXFIFO_512 (0<<18) -#define SMAP_E3_TXFIFO_1K (1<<18) -#define SMAP_E3_TXFIFO_2K (2<<18) -#define SMAP_E3_TXREQ0_BITSFT (15) -#define SMAP_E3_TXREQ0_SINGLE (0<<15) -#define SMAP_E3_TXREQ0_MULTI (1<<15) -#define SMAP_E3_TXREQ0_DEPEND (2<<15) -#define SMAP_E3_TXREQ1_BITSFT (13) -#define SMAP_E3_TXREQ1_SINGLE (0<<13) -#define SMAP_E3_TXREQ1_MULTI (1<<13) -#define SMAP_E3_TXREQ1_DEPEND (2<<13) -#define SMAP_E3_JUMBO_ENABLE (1<<12) +#define SMAP_R_EMAC3_MODE1 (SMAP_EMAC3_REGBASE + 0x04) +#define SMAP_R_EMAC3_MODE1_L (SMAP_EMAC3_REGBASE + 0x04) +#define SMAP_R_EMAC3_MODE1_H (SMAP_EMAC3_REGBASE + 0x06) +#define SMAP_E3_FDX_ENABLE (1 << 31) +#define SMAP_E3_INLPBK_ENABLE (1 << 30) /* internal loop back */ +#define SMAP_E3_VLAN_ENABLE (1 << 29) +#define SMAP_E3_FLOWCTRL_ENABLE (1 << 28) /* integrated flow ctrl(pause frame) */ +#define SMAP_E3_ALLOW_PF (1 << 27) /* allow pause frame */ +#define SMAP_E3_ALLOW_EXTMNGIF (1 << 25) /* allow external management IF */ +#define SMAP_E3_IGNORE_SQE (1 << 24) +#define SMAP_E3_MEDIA_FREQ_BITSFT (22) +#define SMAP_E3_MEDIA_10M (0 << 22) +#define SMAP_E3_MEDIA_100M (1 << 22) +#define SMAP_E3_MEDIA_1000M (2 << 22) +#define SMAP_E3_MEDIA_MSK (3 << 22) +#define SMAP_E3_RXFIFO_SIZE_BITSFT (20) +#define SMAP_E3_RXFIFO_512 (0 << 20) +#define SMAP_E3_RXFIFO_1K (1 << 20) +#define SMAP_E3_RXFIFO_2K (2 << 20) +#define SMAP_E3_RXFIFO_4K (3 << 20) +#define SMAP_E3_TXFIFO_SIZE_BITSFT (18) +#define SMAP_E3_TXFIFO_512 (0 << 18) +#define SMAP_E3_TXFIFO_1K (1 << 18) +#define SMAP_E3_TXFIFO_2K (2 << 18) +#define SMAP_E3_TXREQ0_BITSFT (15) +#define SMAP_E3_TXREQ0_SINGLE (0 << 15) +#define SMAP_E3_TXREQ0_MULTI (1 << 15) +#define SMAP_E3_TXREQ0_DEPEND (2 << 15) +#define SMAP_E3_TXREQ1_BITSFT (13) +#define SMAP_E3_TXREQ1_SINGLE (0 << 13) +#define SMAP_E3_TXREQ1_MULTI (1 << 13) +#define SMAP_E3_TXREQ1_DEPEND (2 << 13) +#define SMAP_E3_JUMBO_ENABLE (1 << 12) -#define SMAP_R_EMAC3_TxMODE0_L (SMAP_EMAC3_REGBASE + 0x08) -#define SMAP_E3_TX_GNP_0 (1<<(15+16)) /* get new packet */ -#define SMAP_E3_TX_GNP_1 (1<<(14+16)) /* get new packet */ -#define SMAP_E3_TX_GNP_DEPEND (1<<(13+16)) /* get new packet */ -#define SMAP_E3_TX_FIRST_CHANNEL (1<<(12+16)) -#define SMAP_R_EMAC3_TxMODE0_H (SMAP_EMAC3_REGBASE + 0x0A) +#define SMAP_R_EMAC3_TxMODE0_L (SMAP_EMAC3_REGBASE + 0x08) +#define SMAP_E3_TX_GNP_0 (1 << (15 + 16)) /* get new packet */ +#define SMAP_E3_TX_GNP_1 (1 << (14 + 16)) /* get new packet */ +#define SMAP_E3_TX_GNP_DEPEND (1 << (13 + 16)) /* get new packet */ +#define SMAP_E3_TX_FIRST_CHANNEL (1 << (12 + 16)) +#define SMAP_R_EMAC3_TxMODE0_H (SMAP_EMAC3_REGBASE + 0x0A) -#define SMAP_R_EMAC3_TxMODE1_L (SMAP_EMAC3_REGBASE + 0x0C) -#define SMAP_R_EMAC3_TxMODE1_H (SMAP_EMAC3_REGBASE + 0x0E) -#define SMAP_E3_TX_LOW_REQ_MSK (0x1F) /* low priority request */ -#define SMAP_E3_TX_LOW_REQ_BITSFT (27) /* low priority request */ -#define SMAP_E3_TX_URG_REQ_MSK (0xFF) /* urgent priority request */ -#define SMAP_E3_TX_URG_REQ_BITSFT (16) /* urgent priority request */ +#define SMAP_R_EMAC3_TxMODE1_L (SMAP_EMAC3_REGBASE + 0x0C) +#define SMAP_R_EMAC3_TxMODE1_H (SMAP_EMAC3_REGBASE + 0x0E) +#define SMAP_E3_TX_LOW_REQ_MSK (0x1F) /* low priority request */ +#define SMAP_E3_TX_LOW_REQ_BITSFT (27) /* low priority request */ +#define SMAP_E3_TX_URG_REQ_MSK (0xFF) /* urgent priority request */ +#define SMAP_E3_TX_URG_REQ_BITSFT (16) /* urgent priority request */ -#define SMAP_R_EMAC3_RxMODE (SMAP_EMAC3_REGBASE + 0x10) -#define SMAP_R_EMAC3_RxMODE_L (SMAP_EMAC3_REGBASE + 0x10) -#define SMAP_R_EMAC3_RxMODE_H (SMAP_EMAC3_REGBASE + 0x12) -#define SMAP_E3_RX_STRIP_PAD (1<<31) -#define SMAP_E3_RX_STRIP_FCS (1<<30) -#define SMAP_E3_RX_RX_RUNT_FRAME (1<<29) -#define SMAP_E3_RX_RX_FCS_ERR (1<<28) -#define SMAP_E3_RX_RX_TOO_LONG_ERR (1<<27) -#define SMAP_E3_RX_RX_IN_RANGE_ERR (1<<26) -#define SMAP_E3_RX_PROP_PF (1<<25) /* propagate pause frame */ -#define SMAP_E3_RX_PROMISC (1<<24) -#define SMAP_E3_RX_PROMISC_MCAST (1<<23) -#define SMAP_E3_RX_INDIVID_ADDR (1<<22) -#define SMAP_E3_RX_INDIVID_HASH (1<<21) -#define SMAP_E3_RX_BCAST (1<<20) -#define SMAP_E3_RX_MCAST (1<<19) +#define SMAP_R_EMAC3_RxMODE (SMAP_EMAC3_REGBASE + 0x10) +#define SMAP_R_EMAC3_RxMODE_L (SMAP_EMAC3_REGBASE + 0x10) +#define SMAP_R_EMAC3_RxMODE_H (SMAP_EMAC3_REGBASE + 0x12) +#define SMAP_E3_RX_STRIP_PAD (1 << 31) +#define SMAP_E3_RX_STRIP_FCS (1 << 30) +#define SMAP_E3_RX_RX_RUNT_FRAME (1 << 29) +#define SMAP_E3_RX_RX_FCS_ERR (1 << 28) +#define SMAP_E3_RX_RX_TOO_LONG_ERR (1 << 27) +#define SMAP_E3_RX_RX_IN_RANGE_ERR (1 << 26) +#define SMAP_E3_RX_PROP_PF (1 << 25) /* propagate pause frame */ +#define SMAP_E3_RX_PROMISC (1 << 24) +#define SMAP_E3_RX_PROMISC_MCAST (1 << 23) +#define SMAP_E3_RX_INDIVID_ADDR (1 << 22) +#define SMAP_E3_RX_INDIVID_HASH (1 << 21) +#define SMAP_E3_RX_BCAST (1 << 20) +#define SMAP_E3_RX_MCAST (1 << 19) -#define SMAP_R_EMAC3_INTR_STAT (SMAP_EMAC3_REGBASE + 0x14) -#define SMAP_R_EMAC3_INTR_STAT_L (SMAP_EMAC3_REGBASE + 0x14) -#define SMAP_R_EMAC3_INTR_STAT_H (SMAP_EMAC3_REGBASE + 0x16) -#define SMAP_R_EMAC3_INTR_ENABLE (SMAP_EMAC3_REGBASE + 0x18) -#define SMAP_R_EMAC3_INTR_ENABLE_L (SMAP_EMAC3_REGBASE + 0x18) -#define SMAP_R_EMAC3_INTR_ENABLE_H (SMAP_EMAC3_REGBASE + 0x1A) -#define SMAP_E3_INTR_OVERRUN (1<<25) /* this bit does NOT WORKED */ -#define SMAP_E3_INTR_PF (1<<24) -#define SMAP_E3_INTR_BAD_FRAME (1<<23) -#define SMAP_E3_INTR_RUNT_FRAME (1<<22) -#define SMAP_E3_INTR_SHORT_EVENT (1<<21) -#define SMAP_E3_INTR_ALIGN_ERR (1<<20) -#define SMAP_E3_INTR_BAD_FCS (1<<19) -#define SMAP_E3_INTR_TOO_LONG (1<<18) -#define SMAP_E3_INTR_OUT_RANGE_ERR (1<<17) -#define SMAP_E3_INTR_IN_RANGE_ERR (1<<16) -#define SMAP_E3_INTR_DEAD_DEPEND (1<<9) -#define SMAP_E3_INTR_DEAD_0 (1<<8) -#define SMAP_E3_INTR_SQE_ERR_0 (1<<7) -#define SMAP_E3_INTR_TX_ERR_0 (1<<6) -#define SMAP_E3_INTR_DEAD_1 (1<<5) -#define SMAP_E3_INTR_SQE_ERR_1 (1<<4) -#define SMAP_E3_INTR_TX_ERR_1 (1<<3) -#define SMAP_E3_INTR_MMAOP_SUCCESS (1<<1) -#define SMAP_E3_INTR_MMAOP_FAIL (1<<0) -#define SMAP_E3_INTR_ALL \ - (SMAP_E3_INTR_OVERRUN|SMAP_E3_INTR_PF|SMAP_E3_INTR_BAD_FRAME| \ - SMAP_E3_INTR_RUNT_FRAME|SMAP_E3_INTR_SHORT_EVENT| \ - SMAP_E3_INTR_ALIGN_ERR|SMAP_E3_INTR_BAD_FCS| \ - SMAP_E3_INTR_TOO_LONG|SMAP_E3_INTR_OUT_RANGE_ERR| \ - SMAP_E3_INTR_IN_RANGE_ERR| \ - SMAP_E3_INTR_DEAD_DEPEND|SMAP_E3_INTR_DEAD_0| \ - SMAP_E3_INTR_SQE_ERR_0|SMAP_E3_INTR_TX_ERR_0| \ - SMAP_E3_INTR_DEAD_1|SMAP_E3_INTR_SQE_ERR_1| \ - SMAP_E3_INTR_TX_ERR_1| \ - SMAP_E3_INTR_MMAOP_SUCCESS|SMAP_E3_INTR_MMAOP_FAIL) -#define SMAP_E3_DEAD_ALL \ - (SMAP_E3_INTR_DEAD_DEPEND|SMAP_E3_INTR_DEAD_0| \ +#define SMAP_R_EMAC3_INTR_STAT (SMAP_EMAC3_REGBASE + 0x14) +#define SMAP_R_EMAC3_INTR_STAT_L (SMAP_EMAC3_REGBASE + 0x14) +#define SMAP_R_EMAC3_INTR_STAT_H (SMAP_EMAC3_REGBASE + 0x16) +#define SMAP_R_EMAC3_INTR_ENABLE (SMAP_EMAC3_REGBASE + 0x18) +#define SMAP_R_EMAC3_INTR_ENABLE_L (SMAP_EMAC3_REGBASE + 0x18) +#define SMAP_R_EMAC3_INTR_ENABLE_H (SMAP_EMAC3_REGBASE + 0x1A) +#define SMAP_E3_INTR_OVERRUN (1 << 25) /* this bit does NOT WORKED */ +#define SMAP_E3_INTR_PF (1 << 24) +#define SMAP_E3_INTR_BAD_FRAME (1 << 23) +#define SMAP_E3_INTR_RUNT_FRAME (1 << 22) +#define SMAP_E3_INTR_SHORT_EVENT (1 << 21) +#define SMAP_E3_INTR_ALIGN_ERR (1 << 20) +#define SMAP_E3_INTR_BAD_FCS (1 << 19) +#define SMAP_E3_INTR_TOO_LONG (1 << 18) +#define SMAP_E3_INTR_OUT_RANGE_ERR (1 << 17) +#define SMAP_E3_INTR_IN_RANGE_ERR (1 << 16) +#define SMAP_E3_INTR_DEAD_DEPEND (1 << 9) +#define SMAP_E3_INTR_DEAD_0 (1 << 8) +#define SMAP_E3_INTR_SQE_ERR_0 (1 << 7) +#define SMAP_E3_INTR_TX_ERR_0 (1 << 6) +#define SMAP_E3_INTR_DEAD_1 (1 << 5) +#define SMAP_E3_INTR_SQE_ERR_1 (1 << 4) +#define SMAP_E3_INTR_TX_ERR_1 (1 << 3) +#define SMAP_E3_INTR_MMAOP_SUCCESS (1 << 1) +#define SMAP_E3_INTR_MMAOP_FAIL (1 << 0) +#define SMAP_E3_INTR_ALL \ + (SMAP_E3_INTR_OVERRUN | SMAP_E3_INTR_PF | SMAP_E3_INTR_BAD_FRAME | \ + SMAP_E3_INTR_RUNT_FRAME | SMAP_E3_INTR_SHORT_EVENT | \ + SMAP_E3_INTR_ALIGN_ERR | SMAP_E3_INTR_BAD_FCS | \ + SMAP_E3_INTR_TOO_LONG | SMAP_E3_INTR_OUT_RANGE_ERR | \ + SMAP_E3_INTR_IN_RANGE_ERR | \ + SMAP_E3_INTR_DEAD_DEPEND | SMAP_E3_INTR_DEAD_0 | \ + SMAP_E3_INTR_SQE_ERR_0 | SMAP_E3_INTR_TX_ERR_0 | \ + SMAP_E3_INTR_DEAD_1 | SMAP_E3_INTR_SQE_ERR_1 | \ + SMAP_E3_INTR_TX_ERR_1 | \ + SMAP_E3_INTR_MMAOP_SUCCESS | SMAP_E3_INTR_MMAOP_FAIL) +#define SMAP_E3_DEAD_ALL \ + (SMAP_E3_INTR_DEAD_DEPEND | SMAP_E3_INTR_DEAD_0 | \ SMAP_E3_INTR_DEAD_1) -#define SMAP_R_EMAC3_ADDR_HI (SMAP_EMAC3_REGBASE + 0x1C) -#define SMAP_R_EMAC3_ADDR_LO (SMAP_EMAC3_REGBASE + 0x20) -#define SMAP_R_EMAC3_ADDR_HI_L (SMAP_EMAC3_REGBASE + 0x1C) -#define SMAP_R_EMAC3_ADDR_HI_H (SMAP_EMAC3_REGBASE + 0x1E) -#define SMAP_R_EMAC3_ADDR_LO_L (SMAP_EMAC3_REGBASE + 0x20) -#define SMAP_R_EMAC3_ADDR_LO_H (SMAP_EMAC3_REGBASE + 0x22) +#define SMAP_R_EMAC3_ADDR_HI (SMAP_EMAC3_REGBASE + 0x1C) +#define SMAP_R_EMAC3_ADDR_LO (SMAP_EMAC3_REGBASE + 0x20) +#define SMAP_R_EMAC3_ADDR_HI_L (SMAP_EMAC3_REGBASE + 0x1C) +#define SMAP_R_EMAC3_ADDR_HI_H (SMAP_EMAC3_REGBASE + 0x1E) +#define SMAP_R_EMAC3_ADDR_LO_L (SMAP_EMAC3_REGBASE + 0x20) +#define SMAP_R_EMAC3_ADDR_LO_H (SMAP_EMAC3_REGBASE + 0x22) -#define SMAP_R_EMAC3_VLAN_TPID (SMAP_EMAC3_REGBASE + 0x24) -#define SMAP_E3_VLAN_ID_MSK 0xFFFF +#define SMAP_R_EMAC3_VLAN_TPID (SMAP_EMAC3_REGBASE + 0x24) +#define SMAP_E3_VLAN_ID_MSK 0xFFFF -#define SMAP_R_EMAC3_VLAN_TCI (SMAP_EMAC3_REGBASE + 0x28) -#define SMAP_E3_VLAN_TCITAG_MSK 0xFFFF +#define SMAP_R_EMAC3_VLAN_TCI (SMAP_EMAC3_REGBASE + 0x28) +#define SMAP_E3_VLAN_TCITAG_MSK 0xFFFF -#define SMAP_R_EMAC3_PAUSE_TIMER (SMAP_EMAC3_REGBASE + 0x2C) -#define SMAP_R_EMAC3_PAUSE_TIMER_L (SMAP_EMAC3_REGBASE + 0x2C) -#define SMAP_R_EMAC3_PAUSE_TIMER_H (SMAP_EMAC3_REGBASE + 0x2E) -#define SMAP_E3_PTIMER_MSK 0xFFFF +#define SMAP_R_EMAC3_PAUSE_TIMER (SMAP_EMAC3_REGBASE + 0x2C) +#define SMAP_R_EMAC3_PAUSE_TIMER_L (SMAP_EMAC3_REGBASE + 0x2C) +#define SMAP_R_EMAC3_PAUSE_TIMER_H (SMAP_EMAC3_REGBASE + 0x2E) +#define SMAP_E3_PTIMER_MSK 0xFFFF -#define SMAP_R_EMAC3_INDIVID_HASH1 (SMAP_EMAC3_REGBASE + 0x30) -#define SMAP_R_EMAC3_INDIVID_HASH2 (SMAP_EMAC3_REGBASE + 0x34) -#define SMAP_R_EMAC3_INDIVID_HASH3 (SMAP_EMAC3_REGBASE + 0x38) -#define SMAP_R_EMAC3_INDIVID_HASH4 (SMAP_EMAC3_REGBASE + 0x3C) -#define SMAP_R_EMAC3_GROUP_HASH1 (SMAP_EMAC3_REGBASE + 0x40) -#define SMAP_R_EMAC3_GROUP_HASH2 (SMAP_EMAC3_REGBASE + 0x44) -#define SMAP_R_EMAC3_GROUP_HASH3 (SMAP_EMAC3_REGBASE + 0x48) -#define SMAP_R_EMAC3_GROUP_HASH4 (SMAP_EMAC3_REGBASE + 0x4C) -#define SMAP_E3_HASH_MSK 0xFFFF +#define SMAP_R_EMAC3_INDIVID_HASH1 (SMAP_EMAC3_REGBASE + 0x30) +#define SMAP_R_EMAC3_INDIVID_HASH2 (SMAP_EMAC3_REGBASE + 0x34) +#define SMAP_R_EMAC3_INDIVID_HASH3 (SMAP_EMAC3_REGBASE + 0x38) +#define SMAP_R_EMAC3_INDIVID_HASH4 (SMAP_EMAC3_REGBASE + 0x3C) +#define SMAP_R_EMAC3_GROUP_HASH1 (SMAP_EMAC3_REGBASE + 0x40) +#define SMAP_R_EMAC3_GROUP_HASH2 (SMAP_EMAC3_REGBASE + 0x44) +#define SMAP_R_EMAC3_GROUP_HASH3 (SMAP_EMAC3_REGBASE + 0x48) +#define SMAP_R_EMAC3_GROUP_HASH4 (SMAP_EMAC3_REGBASE + 0x4C) +#define SMAP_E3_HASH_MSK 0xFFFF -#define SMAP_R_EMAC3_LAST_SA_HI (SMAP_EMAC3_REGBASE + 0x50) -#define SMAP_R_EMAC3_LAST_SA_LO (SMAP_EMAC3_REGBASE + 0x54) +#define SMAP_R_EMAC3_LAST_SA_HI (SMAP_EMAC3_REGBASE + 0x50) +#define SMAP_R_EMAC3_LAST_SA_LO (SMAP_EMAC3_REGBASE + 0x54) -#define SMAP_R_EMAC3_INTER_FRAME_GAP (SMAP_EMAC3_REGBASE + 0x58) -#define SMAP_R_EMAC3_INTER_FRAME_GAP_L (SMAP_EMAC3_REGBASE + 0x58) -#define SMAP_R_EMAC3_INTER_FRAME_GAP_H (SMAP_EMAC3_REGBASE + 0x5A) -#define SMAP_E3_IFGAP_MSK 0x3F +#define SMAP_R_EMAC3_INTER_FRAME_GAP (SMAP_EMAC3_REGBASE + 0x58) +#define SMAP_R_EMAC3_INTER_FRAME_GAP_L (SMAP_EMAC3_REGBASE + 0x58) +#define SMAP_R_EMAC3_INTER_FRAME_GAP_H (SMAP_EMAC3_REGBASE + 0x5A) +#define SMAP_E3_IFGAP_MSK 0x3F -#define SMAP_R_EMAC3_STA_CTRL_L (SMAP_EMAC3_REGBASE + 0x5C) -#define SMAP_R_EMAC3_STA_CTRL_H (SMAP_EMAC3_REGBASE + 0x5E) -#define SMAP_E3_PHY_DATA_MSK (0xFFFF) -#define SMAP_E3_PHY_DATA_BITSFT (16) -#define SMAP_E3_PHY_OP_COMP (1<<15) /* operation complete */ -#define SMAP_E3_PHY_ERR_READ (1<<14) -#define SMAP_E3_PHY_STA_CMD_BITSFT (12) -#define SMAP_E3_PHY_READ (1<<12) -#define SMAP_E3_PHY_WRITE (2<<12) -#define SMAP_E3_PHY_OPBCLCK_BITSFT (10) -#define SMAP_E3_PHY_50M (0<<10) -#define SMAP_E3_PHY_66M (1<<10) -#define SMAP_E3_PHY_83M (2<<10) -#define SMAP_E3_PHY_100M (3<<10) -#define SMAP_E3_PHY_ADDR_MSK (0x1F) -#define SMAP_E3_PHY_ADDR_BITSFT (5) -#define SMAP_E3_PHY_REG_ADDR_MSK (0x1F) +#define SMAP_R_EMAC3_STA_CTRL_L (SMAP_EMAC3_REGBASE + 0x5C) +#define SMAP_R_EMAC3_STA_CTRL_H (SMAP_EMAC3_REGBASE + 0x5E) +#define SMAP_E3_PHY_DATA_MSK (0xFFFF) +#define SMAP_E3_PHY_DATA_BITSFT (16) +#define SMAP_E3_PHY_OP_COMP (1 << 15) /* operation complete */ +#define SMAP_E3_PHY_ERR_READ (1 << 14) +#define SMAP_E3_PHY_STA_CMD_BITSFT (12) +#define SMAP_E3_PHY_READ (1 << 12) +#define SMAP_E3_PHY_WRITE (2 << 12) +#define SMAP_E3_PHY_OPBCLCK_BITSFT (10) +#define SMAP_E3_PHY_50M (0 << 10) +#define SMAP_E3_PHY_66M (1 << 10) +#define SMAP_E3_PHY_83M (2 << 10) +#define SMAP_E3_PHY_100M (3 << 10) +#define SMAP_E3_PHY_ADDR_MSK (0x1F) +#define SMAP_E3_PHY_ADDR_BITSFT (5) +#define SMAP_E3_PHY_REG_ADDR_MSK (0x1F) -#define SMAP_R_EMAC3_TX_THRESHOLD (SMAP_EMAC3_REGBASE + 0x60) -#define SMAP_R_EMAC3_TX_THRESHOLD_L (SMAP_EMAC3_REGBASE + 0x60) -#define SMAP_R_EMAC3_TX_THRESHOLD_H (SMAP_EMAC3_REGBASE + 0x62) -#define SMAP_E3_TX_THRESHLD_MSK (0x1F) -#define SMAP_E3_TX_THRESHLD_BITSFT (27) +#define SMAP_R_EMAC3_TX_THRESHOLD (SMAP_EMAC3_REGBASE + 0x60) +#define SMAP_R_EMAC3_TX_THRESHOLD_L (SMAP_EMAC3_REGBASE + 0x60) +#define SMAP_R_EMAC3_TX_THRESHOLD_H (SMAP_EMAC3_REGBASE + 0x62) +#define SMAP_E3_TX_THRESHLD_MSK (0x1F) +#define SMAP_E3_TX_THRESHLD_BITSFT (27) -#define SMAP_R_EMAC3_RX_WATERMARK (SMAP_EMAC3_REGBASE + 0x64) -#define SMAP_R_EMAC3_RX_WATERMARK_L (SMAP_EMAC3_REGBASE + 0x64) -#define SMAP_R_EMAC3_RX_WATERMARK_H (SMAP_EMAC3_REGBASE + 0x66) -#define SMAP_E3_RX_LO_WATER_MSK (0x1FF) -#define SMAP_E3_RX_LO_WATER_BITSFT (23) -#define SMAP_E3_RX_HI_WATER_MSK (0x1FF) -#define SMAP_E3_RX_HI_WATER_BITSFT (7) +#define SMAP_R_EMAC3_RX_WATERMARK (SMAP_EMAC3_REGBASE + 0x64) +#define SMAP_R_EMAC3_RX_WATERMARK_L (SMAP_EMAC3_REGBASE + 0x64) +#define SMAP_R_EMAC3_RX_WATERMARK_H (SMAP_EMAC3_REGBASE + 0x66) +#define SMAP_E3_RX_LO_WATER_MSK (0x1FF) +#define SMAP_E3_RX_LO_WATER_BITSFT (23) +#define SMAP_E3_RX_HI_WATER_MSK (0x1FF) +#define SMAP_E3_RX_HI_WATER_BITSFT (7) -#define SMAP_R_EMAC3_TX_OCTETS (SMAP_EMAC3_REGBASE + 0x68) -#define SMAP_R_EMAC3_RX_OCTETS (SMAP_EMAC3_REGBASE + 0x6C) -#define SMAP_EMAC3_REGEND (SMAP_EMAC3_REGBASE + 0x6C + 4) +#define SMAP_R_EMAC3_TX_OCTETS (SMAP_EMAC3_REGBASE + 0x68) +#define SMAP_R_EMAC3_RX_OCTETS (SMAP_EMAC3_REGBASE + 0x6C) +#define SMAP_EMAC3_REGEND (SMAP_EMAC3_REGBASE + 0x6C + 4) /* Buffer descriptors. */ -typedef struct _smap_bd { - u16 ctrl_stat; - u16 reserved; /* must be zero */ - u16 length; /* number of bytes in pkt */ - u16 pointer; +typedef struct _smap_bd +{ + u16 ctrl_stat; + u16 reserved; /* must be zero */ + u16 length; /* number of bytes in pkt */ + u16 pointer; } smap_bd_t; -#define SMAP_BD_REGBASE (SMAP_REGBASE + 0x2f00) -#define SMAP_BD_TX_BASE (SMAP_BD_REGBASE + 0x0000) -#define SMAP_BD_RX_BASE (SMAP_BD_REGBASE + 0x0200) -#define SMAP_BD_SIZE 512 -#define SMAP_BD_MAX_ENTRY 64 +#define SMAP_BD_REGBASE (SMAP_REGBASE + 0x2f00) +#define SMAP_BD_TX_BASE (SMAP_BD_REGBASE + 0x0000) +#define SMAP_BD_RX_BASE (SMAP_BD_REGBASE + 0x0200) +#define SMAP_BD_SIZE 512 +#define SMAP_BD_MAX_ENTRY 64 -#define SMAP_TX_BASE (SMAP_REGBASE + 0x1000) -#define SMAP_TX_BUFSIZE 4096 +#define SMAP_TX_BASE (SMAP_REGBASE + 0x1000) +#define SMAP_TX_BUFSIZE 4096 /* TX Control */ -#define SMAP_BD_TX_READY (1<<15) /* set:driver, clear:HW */ -#define SMAP_BD_TX_GENFCS (1<<9) /* generate FCS */ -#define SMAP_BD_TX_GENPAD (1<<8) /* generate padding */ -#define SMAP_BD_TX_INSSA (1<<7) /* insert source address */ -#define SMAP_BD_TX_RPLSA (1<<6) /* replace source address */ -#define SMAP_BD_TX_INSVLAN (1<<5) /* insert VLAN Tag */ -#define SMAP_BD_TX_RPLVLAN (1<<4) /* replace VLAN Tag */ +#define SMAP_BD_TX_READY (1 << 15) /* set:driver, clear:HW */ +#define SMAP_BD_TX_GENFCS (1 << 9) /* generate FCS */ +#define SMAP_BD_TX_GENPAD (1 << 8) /* generate padding */ +#define SMAP_BD_TX_INSSA (1 << 7) /* insert source address */ +#define SMAP_BD_TX_RPLSA (1 << 6) /* replace source address */ +#define SMAP_BD_TX_INSVLAN (1 << 5) /* insert VLAN Tag */ +#define SMAP_BD_TX_RPLVLAN (1 << 4) /* replace VLAN Tag */ /* TX Status */ -#define SMAP_BD_TX_READY (1<<15) /* set:driver, clear:HW */ -#define SMAP_BD_TX_BADFCS (1<<9) /* bad FCS */ -#define SMAP_BD_TX_BADPKT (1<<8) /* bad previous pkt in dependent mode */ -#define SMAP_BD_TX_LOSSCR (1<<7) /* loss of carrior sense */ -#define SMAP_BD_TX_EDEFER (1<<6) /* excessive deferal */ -#define SMAP_BD_TX_ECOLL (1<<5) /* excessive collision */ -#define SMAP_BD_TX_LCOLL (1<<4) /* late collision */ -#define SMAP_BD_TX_MCOLL (1<<3) /* multiple collision */ -#define SMAP_BD_TX_SCOLL (1<<2) /* single collision */ -#define SMAP_BD_TX_UNDERRUN (1<<1) /* underrun */ -#define SMAP_BD_TX_SQE (1<<0) /* SQE */ +#define SMAP_BD_TX_READY (1 << 15) /* set:driver, clear:HW */ +#define SMAP_BD_TX_BADFCS (1 << 9) /* bad FCS */ +#define SMAP_BD_TX_BADPKT (1 << 8) /* bad previous pkt in dependent mode */ +#define SMAP_BD_TX_LOSSCR (1 << 7) /* loss of carrior sense */ +#define SMAP_BD_TX_EDEFER (1 << 6) /* excessive deferal */ +#define SMAP_BD_TX_ECOLL (1 << 5) /* excessive collision */ +#define SMAP_BD_TX_LCOLL (1 << 4) /* late collision */ +#define SMAP_BD_TX_MCOLL (1 << 3) /* multiple collision */ +#define SMAP_BD_TX_SCOLL (1 << 2) /* single collision */ +#define SMAP_BD_TX_UNDERRUN (1 << 1) /* underrun */ +#define SMAP_BD_TX_SQE (1 << 0) /* SQE */ -#define SMAP_BD_TX_ERROR (SMAP_BD_TX_LOSSCR|SMAP_BD_TX_EDEFER|SMAP_BD_TX_ECOLL| \ - SMAP_BD_TX_LCOLL|SMAP_BD_TX_UNDERRUN) +#define SMAP_BD_TX_ERROR (SMAP_BD_TX_LOSSCR | SMAP_BD_TX_EDEFER | SMAP_BD_TX_ECOLL | \ + SMAP_BD_TX_LCOLL | SMAP_BD_TX_UNDERRUN) /* RX Control */ -#define SMAP_BD_RX_EMPTY (1<<15) /* set:driver, clear:HW */ +#define SMAP_BD_RX_EMPTY (1 << 15) /* set:driver, clear:HW */ /* RX Status */ -#define SMAP_BD_RX_EMPTY (1<<15) /* set:driver, clear:HW */ -#define SMAP_BD_RX_OVERRUN (1<<9) /* overrun */ -#define SMAP_BD_RX_PFRM (1<<8) /* pause frame */ -#define SMAP_BD_RX_BADFRM (1<<7) /* bad frame */ -#define SMAP_BD_RX_RUNTFRM (1<<6) /* runt frame */ -#define SMAP_BD_RX_SHORTEVNT (1<<5) /* short event */ -#define SMAP_BD_RX_ALIGNERR (1<<4) /* alignment error */ -#define SMAP_BD_RX_BADFCS (1<<3) /* bad FCS */ -#define SMAP_BD_RX_FRMTOOLONG (1<<2) /* frame too long */ -#define SMAP_BD_RX_OUTRANGE (1<<1) /* out of range error */ -#define SMAP_BD_RX_INRANGE (1<<0) /* in range error */ +#define SMAP_BD_RX_EMPTY (1 << 15) /* set:driver, clear:HW */ +#define SMAP_BD_RX_OVERRUN (1 << 9) /* overrun */ +#define SMAP_BD_RX_PFRM (1 << 8) /* pause frame */ +#define SMAP_BD_RX_BADFRM (1 << 7) /* bad frame */ +#define SMAP_BD_RX_RUNTFRM (1 << 6) /* runt frame */ +#define SMAP_BD_RX_SHORTEVNT (1 << 5) /* short event */ +#define SMAP_BD_RX_ALIGNERR (1 << 4) /* alignment error */ +#define SMAP_BD_RX_BADFCS (1 << 3) /* bad FCS */ +#define SMAP_BD_RX_FRMTOOLONG (1 << 2) /* frame too long */ +#define SMAP_BD_RX_OUTRANGE (1 << 1) /* out of range error */ +#define SMAP_BD_RX_INRANGE (1 << 0) /* in range error */ -#define SMAP_BD_RX_ERROR (SMAP_BD_RX_OVERRUN|SMAP_BD_RX_RUNTFRM|SMAP_BD_RX_SHORTEVNT| \ - SMAP_BD_RX_ALIGNERR|SMAP_BD_RX_BADFCS|SMAP_BD_RX_FRMTOOLONG| \ - SMAP_BD_RX_OUTRANGE|SMAP_BD_RX_INRANGE) +#define SMAP_BD_RX_ERROR (SMAP_BD_RX_OVERRUN | SMAP_BD_RX_RUNTFRM | SMAP_BD_RX_SHORTEVNT | \ + SMAP_BD_RX_ALIGNERR | SMAP_BD_RX_BADFCS | SMAP_BD_RX_FRMTOOLONG | \ + SMAP_BD_RX_OUTRANGE | SMAP_BD_RX_INRANGE) /* PHY registers (National Semiconductor DP83846A). */ -#define SMAP_NS_OUI 0x080017 -#define SMAP_DsPHYTER_ADDRESS 0x1 +#define SMAP_NS_OUI 0x080017 +#define SMAP_DsPHYTER_ADDRESS 0x1 -#define SMAP_DsPHYTER_BMCR 0x00 -#define SMAP_PHY_BMCR_RST (1<<15) /* ReSeT */ -#define SMAP_PHY_BMCR_LPBK (1<<14) /* LooPBacK */ -#define SMAP_PHY_BMCR_100M (1<<13) /* speed select, 1:100M, 0:10M */ -#define SMAP_PHY_BMCR_10M (0<<13) /* speed select, 1:100M, 0:10M */ -#define SMAP_PHY_BMCR_ANEN (1<<12) /* Auto-Negotiation ENable */ -#define SMAP_PHY_BMCR_PWDN (1<<11) /* PoWer DowN */ -#define SMAP_PHY_BMCR_ISOL (1<<10) /* ISOLate */ -#define SMAP_PHY_BMCR_RSAN (1<<9) /* ReStart Auto-Negotiation */ -#define SMAP_PHY_BMCR_DUPM (1<<8) /* DUPlex Mode, 1:FDX, 0:HDX */ -#define SMAP_PHY_BMCR_COLT (1<<7) /* COLlision Test */ +#define SMAP_DsPHYTER_BMCR 0x00 +#define SMAP_PHY_BMCR_RST (1 << 15) /* ReSeT */ +#define SMAP_PHY_BMCR_LPBK (1 << 14) /* LooPBacK */ +#define SMAP_PHY_BMCR_100M (1 << 13) /* speed select, 1:100M, 0:10M */ +#define SMAP_PHY_BMCR_10M (0 << 13) /* speed select, 1:100M, 0:10M */ +#define SMAP_PHY_BMCR_ANEN (1 << 12) /* Auto-Negotiation ENable */ +#define SMAP_PHY_BMCR_PWDN (1 << 11) /* PoWer DowN */ +#define SMAP_PHY_BMCR_ISOL (1 << 10) /* ISOLate */ +#define SMAP_PHY_BMCR_RSAN (1 << 9) /* ReStart Auto-Negotiation */ +#define SMAP_PHY_BMCR_DUPM (1 << 8) /* DUPlex Mode, 1:FDX, 0:HDX */ +#define SMAP_PHY_BMCR_COLT (1 << 7) /* COLlision Test */ -#define SMAP_DsPHYTER_BMSR 0x01 -#define SMAP_PHY_BMSR_ANCP (1<<5) /* Auto-Negotiation ComPlete */ -#define SMAP_PHY_BMSR_LINK (1<<2) /* LINK status */ +#define SMAP_DsPHYTER_BMSR 0x01 +#define SMAP_PHY_BMSR_ANCP (1 << 5) /* Auto-Negotiation ComPlete */ +#define SMAP_PHY_BMSR_LINK (1 << 2) /* LINK status */ -#define SMAP_DsPHYTER_PHYIDR1 0x02 -#define SMAP_PHY_IDR1_VAL (((SMAP_NS_OUI<<2)>>8)&0xffff) +#define SMAP_DsPHYTER_PHYIDR1 0x02 +#define SMAP_PHY_IDR1_VAL (((SMAP_NS_OUI << 2) >> 8) & 0xffff) -#define SMAP_DsPHYTER_PHYIDR2 0x03 -#define SMAP_PHY_IDR2_VMDL 0x2 /* Vendor MoDeL number */ -#define SMAP_PHY_IDR2_VAL \ - (((SMAP_NS_OUI<<10)&0xFC00)|((SMAP_PHY_IDR2_VMDL<<4)&0x3F0)) -#define SMAP_PHY_IDR2_MSK 0xFFF0 -#define SMAP_PHY_IDR2_REV_MSK 0x000F +#define SMAP_DsPHYTER_PHYIDR2 0x03 +#define SMAP_PHY_IDR2_VMDL 0x2 /* Vendor MoDeL number */ +#define SMAP_PHY_IDR2_VAL \ + (((SMAP_NS_OUI << 10) & 0xFC00) | ((SMAP_PHY_IDR2_VMDL << 4) & 0x3F0)) +#define SMAP_PHY_IDR2_MSK 0xFFF0 +#define SMAP_PHY_IDR2_REV_MSK 0x000F -#define SMAP_DsPHYTER_ANAR 0x04 -#define SMAP_DsPHYTER_ANLPAR 0x05 -#define SMAP_DsPHYTER_ANLPARNP 0x05 -#define SMAP_DsPHYTER_ANER 0x06 -#define SMAP_DsPHYTER_ANNPTR 0x07 +#define SMAP_DsPHYTER_ANAR 0x04 +#define SMAP_DsPHYTER_ANLPAR 0x05 +#define SMAP_DsPHYTER_ANLPARNP 0x05 +#define SMAP_DsPHYTER_ANER 0x06 +#define SMAP_DsPHYTER_ANNPTR 0x07 /* Extended registers. */ -#define SMAP_DsPHYTER_PHYSTS 0x10 -#define SMAP_PHY_STS_REL (1<<13) /* Receive Error Latch */ -#define SMAP_PHY_STS_POST (1<<12) /* POlarity STatus */ -#define SMAP_PHY_STS_FCSL (1<<11) /* False Carrier Sense Latch */ -#define SMAP_PHY_STS_SD (1<<10) /* 100BT unconditional Signal Detect */ -#define SMAP_PHY_STS_DSL (1<<9) /* 100BT DeScrambler Lock */ -#define SMAP_PHY_STS_PRCV (1<<8) /* Page ReCeiVed */ -#define SMAP_PHY_STS_RFLT (1<<6) /* Remote FauLT */ -#define SMAP_PHY_STS_JBDT (1<<5) /* JaBber DetecT */ -#define SMAP_PHY_STS_ANCP (1<<4) /* Auto-Negotiation ComPlete */ -#define SMAP_PHY_STS_LPBK (1<<3) /* LooPBacK status */ -#define SMAP_PHY_STS_DUPS (1<<2) /* DUPlex Status,1:FDX,0:HDX */ -#define SMAP_PHY_STS_FDX (1<<2) /* Full Duplex */ -#define SMAP_PHY_STS_HDX (0<<2) /* Half Duplex */ -#define SMAP_PHY_STS_SPDS (1<<1) /* SPeeD Status */ -#define SMAP_PHY_STS_10M (1<<1) /* 10Mbps */ -#define SMAP_PHY_STS_100M (0<<1) /* 100Mbps */ -#define SMAP_PHY_STS_LINK (1<<0) /* LINK status */ -#define SMAP_DsPHYTER_FCSCR 0x14 -#define SMAP_DsPHYTER_RECR 0x15 -#define SMAP_DsPHYTER_PCSR 0x16 -#define SMAP_DsPHYTER_PHYCTRL 0x19 -#define SMAP_DsPHYTER_10BTSCR 0x1A -#define SMAP_DsPHYTER_CDCTRL 0x1B +#define SMAP_DsPHYTER_PHYSTS 0x10 +#define SMAP_PHY_STS_REL (1 << 13) /* Receive Error Latch */ +#define SMAP_PHY_STS_POST (1 << 12) /* POlarity STatus */ +#define SMAP_PHY_STS_FCSL (1 << 11) /* False Carrier Sense Latch */ +#define SMAP_PHY_STS_SD (1 << 10) /* 100BT unconditional Signal Detect */ +#define SMAP_PHY_STS_DSL (1 << 9) /* 100BT DeScrambler Lock */ +#define SMAP_PHY_STS_PRCV (1 << 8) /* Page ReCeiVed */ +#define SMAP_PHY_STS_RFLT (1 << 6) /* Remote FauLT */ +#define SMAP_PHY_STS_JBDT (1 << 5) /* JaBber DetecT */ +#define SMAP_PHY_STS_ANCP (1 << 4) /* Auto-Negotiation ComPlete */ +#define SMAP_PHY_STS_LPBK (1 << 3) /* LooPBacK status */ +#define SMAP_PHY_STS_DUPS (1 << 2) /* DUPlex Status,1:FDX,0:HDX */ +#define SMAP_PHY_STS_FDX (1 << 2) /* Full Duplex */ +#define SMAP_PHY_STS_HDX (0 << 2) /* Half Duplex */ +#define SMAP_PHY_STS_SPDS (1 << 1) /* SPeeD Status */ +#define SMAP_PHY_STS_10M (1 << 1) /* 10Mbps */ +#define SMAP_PHY_STS_100M (0 << 1) /* 100Mbps */ +#define SMAP_PHY_STS_LINK (1 << 0) /* LINK status */ +#define SMAP_DsPHYTER_FCSCR 0x14 +#define SMAP_DsPHYTER_RECR 0x15 +#define SMAP_DsPHYTER_PCSR 0x16 +#define SMAP_DsPHYTER_PHYCTRL 0x19 +#define SMAP_DsPHYTER_10BTSCR 0x1A +#define SMAP_DsPHYTER_CDCTRL 0x1B /* * ATA hardware types and definitions. @@ -556,22 +559,22 @@ typedef struct _smap_bd { */ -#define ATA_DEV9_HDD_BASE (SPD_REGBASE + 0x40) +#define ATA_DEV9_HDD_BASE (SPD_REGBASE + 0x40) /* AIF on T10Ks - Not supported yet. */ -#define ATA_AIF_HDD_BASE (SPD_REGBASE + 0x4000000 + 0x60) +#define ATA_AIF_HDD_BASE (SPD_REGBASE + 0x4000000 + 0x60) -#define ATA_R_DATA (ATA_DEV9_HDD_BASE + 0x00) -#define ATA_R_ERROR (ATA_DEV9_HDD_BASE + 0x02) -#define ATA_R_NSECTOR (ATA_DEV9_HDD_BASE + 0x04) -#define ATA_R_SECTOR (ATA_DEV9_HDD_BASE + 0x06) -#define ATA_R_LCYL (ATA_DEV9_HDD_BASE + 0x08) -#define ATA_R_HCYL (ATA_DEV9_HDD_BASE + 0x0a) -#define ATA_R_SELECT (ATA_DEV9_HDD_BASE + 0x0c) -#define ATA_R_STATUS (ATA_DEV9_HDD_BASE + 0x0e) -#define ATA_R_CONTROL (ATA_DEV9_HDD_BASE + 0x1c) -#define ATA_DEV9_INT (0x01) +#define ATA_R_DATA (ATA_DEV9_HDD_BASE + 0x00) +#define ATA_R_ERROR (ATA_DEV9_HDD_BASE + 0x02) +#define ATA_R_NSECTOR (ATA_DEV9_HDD_BASE + 0x04) +#define ATA_R_SECTOR (ATA_DEV9_HDD_BASE + 0x06) +#define ATA_R_LCYL (ATA_DEV9_HDD_BASE + 0x08) +#define ATA_R_HCYL (ATA_DEV9_HDD_BASE + 0x0a) +#define ATA_R_SELECT (ATA_DEV9_HDD_BASE + 0x0c) +#define ATA_R_STATUS (ATA_DEV9_HDD_BASE + 0x0e) +#define ATA_R_CONTROL (ATA_DEV9_HDD_BASE + 0x1c) +#define ATA_DEV9_INT (0x01) #define ATA_DEV9_INT_DMA (0x02) //not sure rly -#define ATA_DEV9_HDD_END (ATA_R_CONTROL+4) +#define ATA_DEV9_HDD_END (ATA_R_CONTROL + 4) /* * NAND Flash via Dev9 driver definitions * @@ -580,30 +583,31 @@ typedef struct _smap_bd { * * code included from the ps2sdk iop driver * */ -#define FLASH_ID_64MBIT 0xe6 -#define FLASH_ID_128MBIT 0x73 -#define FLASH_ID_256MBIT 0x75 -#define FLASH_ID_512MBIT 0x76 -#define FLASH_ID_1024MBIT 0x79 +#define FLASH_ID_64MBIT 0xe6 +#define FLASH_ID_128MBIT 0x73 +#define FLASH_ID_256MBIT 0x75 +#define FLASH_ID_512MBIT 0x76 +#define FLASH_ID_1024MBIT 0x79 /* SmartMedia commands. */ -#define SM_CMD_READ1 0x00 -#define SM_CMD_READ2 0x01 -#define SM_CMD_READ3 0x50 -#define SM_CMD_RESET 0xff -#define SM_CMD_WRITEDATA 0x80 -#define SM_CMD_PROGRAMPAGE 0x10 -#define SM_CMD_ERASEBLOCK 0x60 -#define SM_CMD_ERASECONFIRM 0xd0 -#define SM_CMD_GETSTATUS 0x70 -#define SM_CMD_READID 0x90 +#define SM_CMD_READ1 0x00 +#define SM_CMD_READ2 0x01 +#define SM_CMD_READ3 0x50 +#define SM_CMD_RESET 0xff +#define SM_CMD_WRITEDATA 0x80 +#define SM_CMD_PROGRAMPAGE 0x10 +#define SM_CMD_ERASEBLOCK 0x60 +#define SM_CMD_ERASECONFIRM 0xd0 +#define SM_CMD_GETSTATUS 0x70 +#define SM_CMD_READID 0x90 -typedef struct { - u32 id; - u32 mbits; - u32 page_bytes; /* bytes/page */ - u32 block_pages; /* pages/block */ - u32 blocks; +typedef struct +{ + u32 id; + u32 mbits; + u32 page_bytes; /* bytes/page */ + u32 block_pages; /* pages/block */ + u32 blocks; } flash_info_t; /* @@ -619,21 +623,21 @@ static flash_info_t devices[] = { // definitions added by Florin -#define FLASH_REGBASE 0x10004800 +#define FLASH_REGBASE 0x10004800 -#define FLASH_R_DATA (FLASH_REGBASE + 0x00) -#define FLASH_R_CMD (FLASH_REGBASE + 0x04) -#define FLASH_R_ADDR (FLASH_REGBASE + 0x08) -#define FLASH_R_CTRL (FLASH_REGBASE + 0x0C) -#define FLASH_PP_READY (1<<0) // r/w /BUSY -#define FLASH_PP_WRITE (1<<7) // -/w WRITE data -#define FLASH_PP_CSEL (1<<8) // -/w CS -#define FLASH_PP_READ (1<<11) // -/w READ data -#define FLASH_PP_NOECC (1<<12) // -/w ECC disabled +#define FLASH_R_DATA (FLASH_REGBASE + 0x00) +#define FLASH_R_CMD (FLASH_REGBASE + 0x04) +#define FLASH_R_ADDR (FLASH_REGBASE + 0x08) +#define FLASH_R_CTRL (FLASH_REGBASE + 0x0C) +#define FLASH_PP_READY (1 << 0) // r/w /BUSY +#define FLASH_PP_WRITE (1 << 7) // -/w WRITE data +#define FLASH_PP_CSEL (1 << 8) // -/w CS +#define FLASH_PP_READ (1 << 11) // -/w READ data +#define FLASH_PP_NOECC (1 << 12) // -/w ECC disabled //#define FLASH_R_10 (FLASH_REGBASE + 0x10) -#define FLASH_R_ID (FLASH_REGBASE + 0x14) +#define FLASH_R_ID (FLASH_REGBASE + 0x14) -#define FLASH_REGSIZE 0x20 +#define FLASH_REGSIZE 0x20 extern void dev9Irq(int cycles); extern void DEV9configure(); @@ -641,7 +645,7 @@ extern void DEV9configure(); void FLASHinit(); s32 DEV9init(); void DEV9close(); -s32 DEV9open(void *pDsp); +s32 DEV9open(void* pDsp); void DEV9shutdown(); u32 FLASHread32(u32 addr, int size); void FLASHwrite32(u32 addr, u32 value, int size); @@ -649,17 +653,17 @@ void _DEV9irq(int cause, int cycles); int DEV9irqHandler(void); void DEV9async(u32 cycles); void DEV9writeDMA8Mem(u32* pMem, int size); -void DEV9readDMA8Mem(u32 *pMem, int size); +void DEV9readDMA8Mem(u32* pMem, int size); u8 DEV9read8(u32 addr); u16 DEV9read16(u32 addr); u32 DEV9read32(u32 addr); -void DEV9write8(u32 addr, u8 value); +void DEV9write8(u32 addr, u8 value); void DEV9write16(u32 addr, u16 value); void DEV9write32(u32 addr, u32 value); -int emu_printf(const char *fmt, ...); +int emu_printf(const char* fmt, ...); #ifdef _WIN32 -#pragma warning(error:4013) +#pragma warning(error : 4013) #endif #endif diff --git a/pcsx2/DEV9/Linux/Config.cpp b/pcsx2/DEV9/Linux/Config.cpp index 9d41467f3b..9041c51f68 100644 --- a/pcsx2/DEV9/Linux/Config.cpp +++ b/pcsx2/DEV9/Linux/Config.cpp @@ -1,5 +1,5 @@ /* PCSX2 - PS2 Emulator for PCs - * Copyright (C) 2002-2014 David Quintana [gigaherz] + * Copyright (C) 2002-2010 PCSX2 Dev Team * * PCSX2 is free software: you can redistribute it and/or modify it under the terms * of the GNU Lesser General Public License as published by the Free Software Found- @@ -27,96 +27,106 @@ #include #include -void SaveConf() { +void SaveConf() +{ - xmlDocPtr doc = NULL; /* document pointer */ - xmlNodePtr root_node = NULL; - char buff[256]; + xmlDocPtr doc = NULL; /* document pointer */ + xmlNodePtr root_node = NULL; + char buff[256]; - /* + /* * Creates a new document, a node and set it as a root node */ - doc = xmlNewDoc(BAD_CAST "1.0"); - root_node = xmlNewNode(NULL, BAD_CAST "dev9"); - xmlDocSetRootElement(doc, root_node); + doc = xmlNewDoc(BAD_CAST "1.0"); + root_node = xmlNewNode(NULL, BAD_CAST "dev9"); + xmlDocSetRootElement(doc, root_node); - xmlNewChild(root_node, NULL, BAD_CAST "Eth", - BAD_CAST config.Eth); + xmlNewChild(root_node, NULL, BAD_CAST "Eth", + BAD_CAST config.Eth); - xmlNewChild(root_node, NULL, BAD_CAST "Hdd", - BAD_CAST config.Hdd); + xmlNewChild(root_node, NULL, BAD_CAST "Hdd", + BAD_CAST config.Hdd); - sprintf(buff,"%d",config.HddSize); - xmlNewChild(root_node, NULL, BAD_CAST "HddSize", - BAD_CAST buff); + sprintf(buff, "%d", config.HddSize); + xmlNewChild(root_node, NULL, BAD_CAST "HddSize", + BAD_CAST buff); - sprintf(buff,"%d",config.ethEnable); - xmlNewChild(root_node, NULL, BAD_CAST "ethEnable", - BAD_CAST buff); + sprintf(buff, "%d", config.ethEnable); + xmlNewChild(root_node, NULL, BAD_CAST "ethEnable", + BAD_CAST buff); - sprintf(buff,"%d",config.hddEnable); - xmlNewChild(root_node, NULL, BAD_CAST "hddEnable", - BAD_CAST buff); - /* + sprintf(buff, "%d", config.hddEnable); + xmlNewChild(root_node, NULL, BAD_CAST "hddEnable", + BAD_CAST buff); + /* * Dumping document to stdio or file */ - const std::string file(s_strIniPath + "DEV9.cfg"); + const std::string file(s_strIniPath + "DEV9.cfg"); - xmlSaveFormatFileEnc(file.c_str(), doc, "UTF-8", 1); -// free(configFile); + xmlSaveFormatFileEnc(file.c_str(), doc, "UTF-8", 1); + // free(configFile); - /*free the document */ - xmlFreeDoc(doc); + /*free the document */ + xmlFreeDoc(doc); - /* + /* *Free the global variables that may *have been allocated by the parser. */ - xmlCleanupParser(); + xmlCleanupParser(); } -void LoadConf() { +void LoadConf() +{ - const std::string file(s_strIniPath + "DEV9.cfg"); - if( -1 == access( file.c_str(), F_OK ) ) - return; + const std::string file(s_strIniPath + "DEV9.cfg"); + if (-1 == access(file.c_str(), F_OK)) + return; - memset(&config, 0, sizeof(config)); + memset(&config, 0, sizeof(config)); - // Read the files - xmlDoc *doc = NULL; - xmlNode *cur_node = NULL; + // Read the files + xmlDoc* doc = NULL; + xmlNode* cur_node = NULL; - doc = xmlReadFile(file.c_str(), NULL, 0); + doc = xmlReadFile(file.c_str(), NULL, 0); - if (doc == NULL){ - SysMessage("Unable to parse configuration file! Suggest deleting it and starting over."); - } + if (doc == NULL) + { + SysMessage("Unable to parse configuration file! Suggest deleting it and starting over."); + } - for (cur_node = xmlDocGetRootElement(doc)->children; cur_node; cur_node = cur_node->next) { - if (cur_node->type == XML_ELEMENT_NODE) { - // printf("node type: Element, name: %s\n", cur_node->name); - if(0 == strcmp((const char*)cur_node->name, "Eth")) { - strcpy(config.Eth, (const char*)xmlNodeGetContent(cur_node)); - } - if(0 == strcmp((const char*)cur_node->name, "Hdd")) { - strcpy(config.Hdd, (const char*)xmlNodeGetContent(cur_node)); - } - if(0 == strcmp((const char*)cur_node->name, "HddSize")) { - config.HddSize = atoi((const char*)xmlNodeGetContent(cur_node)); - } - if(0 == strcmp((const char*)cur_node->name, "ethEnable")) { - config.ethEnable = atoi((const char*)xmlNodeGetContent(cur_node)); - } - if(0 == strcmp((const char*)cur_node->name, "hddEnable")) { - config.hddEnable = atoi((const char*)xmlNodeGetContent(cur_node)); - } - } - } + for (cur_node = xmlDocGetRootElement(doc)->children; cur_node; cur_node = cur_node->next) + { + if (cur_node->type == XML_ELEMENT_NODE) + { + // printf("node type: Element, name: %s\n", cur_node->name); + if (0 == strcmp((const char*)cur_node->name, "Eth")) + { + strcpy(config.Eth, (const char*)xmlNodeGetContent(cur_node)); + } + if (0 == strcmp((const char*)cur_node->name, "Hdd")) + { + strcpy(config.Hdd, (const char*)xmlNodeGetContent(cur_node)); + } + if (0 == strcmp((const char*)cur_node->name, "HddSize")) + { + config.HddSize = atoi((const char*)xmlNodeGetContent(cur_node)); + } + if (0 == strcmp((const char*)cur_node->name, "ethEnable")) + { + config.ethEnable = atoi((const char*)xmlNodeGetContent(cur_node)); + } + if (0 == strcmp((const char*)cur_node->name, "hddEnable")) + { + config.hddEnable = atoi((const char*)xmlNodeGetContent(cur_node)); + } + } + } -// free(configFile); - xmlFreeDoc(doc); - xmlCleanupParser(); + // free(configFile); + xmlFreeDoc(doc); + xmlCleanupParser(); } diff --git a/pcsx2/DEV9/Linux/Linux.cpp b/pcsx2/DEV9/Linux/Linux.cpp index 0ede58eb60..b5de0cfb7b 100644 --- a/pcsx2/DEV9/Linux/Linux.cpp +++ b/pcsx2/DEV9/Linux/Linux.cpp @@ -1,5 +1,5 @@ /* PCSX2 - PS2 Emulator for PCs - * Copyright (C) 2002-2014 David Quintana [gigaherz] + * Copyright (C) 2002-2010 PCSX2 Dev Team * * PCSX2 is free software: you can redistribute it and/or modify it under the terms * of the GNU Lesser General Public License as published by the Free Software Found- @@ -29,147 +29,154 @@ #include "../net.h" #include "AppCoreThread.h" -static GtkBuilder * builder; +static GtkBuilder* builder; -void SysMessage(char *fmt, ...) { - va_list list; - char tmp[512]; +void SysMessage(char* fmt, ...) +{ + va_list list; + char tmp[512]; - va_start(list,fmt); - vsprintf(tmp,fmt,list); - va_end(list); + va_start(list, fmt); + vsprintf(tmp, fmt, list); + va_end(list); - GtkWidget *dialog = gtk_message_dialog_new (NULL, - GTK_DIALOG_MODAL, - GTK_MESSAGE_ERROR, - GTK_BUTTONS_CLOSE, - "%s", tmp); - gtk_dialog_run (GTK_DIALOG (dialog)); - gtk_widget_hide(dialog); + GtkWidget* dialog = gtk_message_dialog_new(NULL, + GTK_DIALOG_MODAL, + GTK_MESSAGE_ERROR, + GTK_BUTTONS_CLOSE, + "%s", tmp); + gtk_dialog_run(GTK_DIALOG(dialog)); + gtk_widget_hide(dialog); } -void OnInitDialog() { - char *dev; - gint idx = 0; - static int initialized = 0; +void OnInitDialog() +{ + char* dev; + gint idx = 0; + static int initialized = 0; - LoadConf(); + LoadConf(); - if( initialized ) - return; + if (initialized) + return; - gtk_combo_box_text_append_text((GtkComboBoxText *)gtk_builder_get_object(builder,"IDC_BAYTYPE"),"Expansion"); - gtk_combo_box_text_append_text((GtkComboBoxText *)gtk_builder_get_object(builder,"IDC_BAYTYPE"),"PC Card"); - for (int i=0; imessage); - g_error_free(error); - g_object_unref(G_OBJECT(builder)); - } - GtkDialog *dlg = GTK_DIALOG (gtk_builder_get_object(builder, "IDD_CONFDLG")); - OnInitDialog(); - gint result = gtk_dialog_run (dlg); - switch(result) { - case -5: //IDOK - OnOk(); - break; - case -6: //IDCANCEL - break; - } - gtk_widget_hide (GTK_WIDGET(dlg)); + gtk_init(NULL, NULL); + GError* error = NULL; + builder = gtk_builder_new(); + if (!builder_add_from_resource(builder, "/net/pcsx2/dev9/DEV9/Linux/dev9.ui", &error)) + { + g_warning("Could not build config ui: %s", error->message); + g_error_free(error); + g_object_unref(G_OBJECT(builder)); + } + GtkDialog* dlg = GTK_DIALOG(gtk_builder_get_object(builder, "IDD_CONFDLG")); + OnInitDialog(); + gint result = gtk_dialog_run(dlg); + switch (result) + { + case -5: //IDOK + OnOk(); + break; + case -6: //IDCANCEL + break; + } + gtk_widget_hide(GTK_WIDGET(dlg)); paused_core.AllowResume(); } NetAdapter* GetNetAdapter() { - NetAdapter* na; - na = new PCAPAdapter(); + NetAdapter* na; + na = new PCAPAdapter(); - if (!na->isInitialised()) - { - delete na; - return 0; - } - return na; + if (!na->isInitialised()) + { + delete na; + return 0; + } + return na; } -s32 _DEV9open() +s32 _DEV9open() { - NetAdapter* na=GetNetAdapter(); - if (!na) - { - emu_printf("Failed to GetNetAdapter()\n"); - config.ethEnable = false; - } - else - { - InitNet(na); - } - return 0; + NetAdapter* na = GetNetAdapter(); + if (!na) + { + emu_printf("Failed to GetNetAdapter()\n"); + config.ethEnable = false; + } + else + { + InitNet(na); + } + return 0; } -void _DEV9close() { - TermNet(); +void _DEV9close() +{ + TermNet(); } diff --git a/pcsx2/DEV9/Linux/net.cpp b/pcsx2/DEV9/Linux/net.cpp index dcb623d78b..ab0bbdbec7 100644 --- a/pcsx2/DEV9/Linux/net.cpp +++ b/pcsx2/DEV9/Linux/net.cpp @@ -1,5 +1,5 @@ /* PCSX2 - PS2 Emulator for PCs - * Copyright (C) 2002-2014 David Quintana [gigaherz] + * Copyright (C) 2002-2010 PCSX2 Dev Team * * PCSX2 is free software: you can redistribute it and/or modify it under the terms * of the GNU Lesser General Public License as published by the Free Software Found- @@ -22,58 +22,57 @@ NetAdapter* nif; pthread_t rx_thread; -volatile bool RxRunning=false; +volatile bool RxRunning = false; -void *NetRxThread(void *arg) +void* NetRxThread(void* arg) { - NetPacket tmp; - while(RxRunning) - { - while(rx_fifo_can_rx() && nif->recv(&tmp)) - { - rx_process(&tmp); - } + NetPacket tmp; + while (RxRunning) + { + while (rx_fifo_can_rx() && nif->recv(&tmp)) + { + rx_process(&tmp); + } + } - } - - return 0; + return 0; } void tx_put(NetPacket* pkt) { - nif->send(pkt); - //pkt must be copied if its not processed by here, since it can be allocated on the callers stack + nif->send(pkt); + //pkt must be copied if its not processed by here, since it can be allocated on the callers stack } void InitNet(NetAdapter* ad) { - nif=ad; - RxRunning=true; + nif = ad; + RxRunning = true; - pthread_attr_t thAttr; - int policy = 0; - int max_prio_for_policy = 0; + pthread_attr_t thAttr; + int policy = 0; + int max_prio_for_policy = 0; - int ret = pthread_create(&rx_thread, NULL, NetRxThread, NULL); - pthread_attr_init(&thAttr); - pthread_attr_getschedpolicy(&thAttr, &policy); - max_prio_for_policy = sched_get_priority_max(policy); + int ret = pthread_create(&rx_thread, NULL, NetRxThread, NULL); + pthread_attr_init(&thAttr); + pthread_attr_getschedpolicy(&thAttr, &policy); + max_prio_for_policy = sched_get_priority_max(policy); - pthread_setschedprio(rx_thread, max_prio_for_policy); - pthread_attr_destroy(&thAttr); + pthread_setschedprio(rx_thread, max_prio_for_policy); + pthread_attr_destroy(&thAttr); } void TermNet() { - if(RxRunning) - { - RxRunning = false; - emu_printf("Waiting for RX-net thread to terminate.."); - pthread_join(rx_thread,NULL); - emu_printf(".done\n"); + if (RxRunning) + { + RxRunning = false; + emu_printf("Waiting for RX-net thread to terminate.."); + pthread_join(rx_thread, NULL); + emu_printf(".done\n"); - delete nif; - } + delete nif; + } } diff --git a/pcsx2/DEV9/Win32/Config.cpp b/pcsx2/DEV9/Win32/Config.cpp index 09ed7c7b93..880238a5de 100644 --- a/pcsx2/DEV9/Win32/Config.cpp +++ b/pcsx2/DEV9/Win32/Config.cpp @@ -1,5 +1,5 @@ /* PCSX2 - PS2 Emulator for PCs - * Copyright (C) 2002-2014 David Quintana [gigaherz] + * Copyright (C) 2002-2010 PCSX2 Dev Team * * PCSX2 is free software: you can redistribute it and/or modify it under the terms * of the GNU Lesser General Public License as published by the Free Software Found- @@ -27,10 +27,11 @@ bool FileExists(std::string szPath) { DWORD dwAttrib = GetFileAttributes(szPath.c_str()); return (dwAttrib != INVALID_FILE_ATTRIBUTES && - !(dwAttrib & FILE_ATTRIBUTE_DIRECTORY)); + !(dwAttrib & FILE_ATTRIBUTE_DIRECTORY)); } -void SaveConf() { +void SaveConf() +{ const std::string file(s_strIniPath + "dev9ghz.ini"); DeleteFile(file.c_str()); @@ -41,7 +42,8 @@ void SaveConf() { WritePrivateProfileInt("DEV9", "hddEnable", config.hddEnable, file.c_str()); } -void LoadConf() { +void LoadConf() +{ const std::string file(s_strIniPath + "dev9ghz.ini"); if (FileExists(file.c_str()) == false) return; @@ -51,4 +53,4 @@ void LoadConf() { config.HddSize = GetPrivateProfileInt("DEV9", "HddSize", config.HddSize, file.c_str()); config.ethEnable = GetPrivateProfileInt("DEV9", "ethEnable", config.ethEnable, file.c_str()); config.hddEnable = GetPrivateProfileInt("DEV9", "hddEnable", config.hddEnable, file.c_str()); -} \ No newline at end of file +} diff --git a/pcsx2/DEV9/Win32/Devioctl.h b/pcsx2/DEV9/Win32/Devioctl.h deleted file mode 100644 index 661fda0297..0000000000 --- a/pcsx2/DEV9/Win32/Devioctl.h +++ /dev/null @@ -1,90 +0,0 @@ -/*++ BUILD Version: 0004 // Increment this if a change has global effects - Copyright (c) 1992-1993 Microsoft Corporation - Module Name: - devioctl.h - Revision History: - -- */ -// begin_winioctl -#ifndef _DEVIOCTL_ -#define _DEVIOCTL_ -// begin_ntddk begin_nthal begin_ntifs -// -// Define the various device type values. Note that values used by Microsoft -// Corporation are in the range 0-32767, and 32768-65535 are reserved for use -// by customers. -// -#define DEVICE_TYPE ULONG -#define FILE_DEVICE_BEEP 0x00000001 -#define FILE_DEVICE_CD_ROM 0x00000002 -#define FILE_DEVICE_CD_ROM_FILE_SYSTEM 0x00000003 -#define FILE_DEVICE_CONTROLLER 0x00000004 -#define FILE_DEVICE_DATALINK 0x00000005 -#define FILE_DEVICE_DFS 0x00000006 -#define FILE_DEVICE_DISK 0x00000007 -#define FILE_DEVICE_DISK_FILE_SYSTEM 0x00000008 -#define FILE_DEVICE_FILE_SYSTEM 0x00000009 -#define FILE_DEVICE_INPORT_PORT 0x0000000a -#define FILE_DEVICE_KEYBOARD 0x0000000b -#define FILE_DEVICE_MAILSLOT 0x0000000c -#define FILE_DEVICE_MIDI_IN 0x0000000d -#define FILE_DEVICE_MIDI_OUT 0x0000000e -#define FILE_DEVICE_MOUSE 0x0000000f -#define FILE_DEVICE_MULTI_UNC_PROVIDER 0x00000010 -#define FILE_DEVICE_NAMED_PIPE 0x00000011 -#define FILE_DEVICE_NETWORK 0x00000012 -#define FILE_DEVICE_NETWORK_BROWSER 0x00000013 -#define FILE_DEVICE_NETWORK_FILE_SYSTEM 0x00000014 -#define FILE_DEVICE_NULL 0x00000015 -#define FILE_DEVICE_PARALLEL_PORT 0x00000016 -#define FILE_DEVICE_PHYSICAL_NETCARD 0x00000017 -#define FILE_DEVICE_PRINTER 0x00000018 -#define FILE_DEVICE_SCANNER 0x00000019 -#define FILE_DEVICE_SERIAL_MOUSE_PORT 0x0000001a -#define FILE_DEVICE_SERIAL_PORT 0x0000001b -#define FILE_DEVICE_SCREEN 0x0000001c -#define FILE_DEVICE_SOUND 0x0000001d -#define FILE_DEVICE_STREAMS 0x0000001e -#define FILE_DEVICE_TAPE 0x0000001f -#define FILE_DEVICE_TAPE_FILE_SYSTEM 0x00000020 -#define FILE_DEVICE_TRANSPORT 0x00000021 -#define FILE_DEVICE_UNKNOWN 0x00000022 -#define FILE_DEVICE_VIDEO 0x00000023 -#define FILE_DEVICE_VIRTUAL_DISK 0x00000024 -#define FILE_DEVICE_WAVE_IN 0x00000025 -#define FILE_DEVICE_WAVE_OUT 0x00000026 -#define FILE_DEVICE_8042_PORT 0x00000027 -#define FILE_DEVICE_NETWORK_REDIRECTOR 0x00000028 -#define FILE_DEVICE_BATTERY 0x00000029 -#define FILE_DEVICE_BUS_EXTENDER 0x0000002a -#define FILE_DEVICE_MODEM 0x0000002b -#define FILE_DEVICE_VDM 0x0000002c -#define FILE_DEVICE_MASS_STORAGE 0x0000002d -// -// Macro definition for defining IOCTL and FSCTL function control codes. Note -// that function codes 0-2047 are reserved for Microsoft Corporation, and -// 2048-4095 are reserved for customers. -// -#define CTL_CODE( DeviceType, Function, Method, Access ) ( \ - ((DeviceType) << 16) | ((Access) << 14) | ((Function) << 2) | (Method) \ -) -// -// Define the method codes for how buffers are passed for I/O and FS controls -// -#define METHOD_BUFFERED 0 -#define METHOD_IN_DIRECT 1 -#define METHOD_OUT_DIRECT 2 -#define METHOD_NEITHER 3 -// -// Define the access check value for any access -// -// -// The FILE_READ_ACCESS and FILE_WRITE_ACCESS constants are also defined in -// ntioapi.h as FILE_READ_DATA and FILE_WRITE_DATA. The values for these -// constants *MUST* always be in sync. -// -#define FILE_ANY_ACCESS 0 -#define FILE_READ_ACCESS ( 0x0001 ) // file & pipe -#define FILE_WRITE_ACCESS ( 0x0002 ) // file & pipe -// end_ntddk end_nthal end_ntifs -#endif // _DEVIOCTL_ -// end_winioctl diff --git a/pcsx2/DEV9/Win32/Win32.cpp b/pcsx2/DEV9/Win32/Win32.cpp index 3524dac9ce..7304bd8074 100644 --- a/pcsx2/DEV9/Win32/Win32.cpp +++ b/pcsx2/DEV9/Win32/Win32.cpp @@ -1,5 +1,5 @@ /* PCSX2 - PS2 Emulator for PCs - * Copyright (C) 2002-2014 David Quintana [gigaherz] + * Copyright (C) 2002-2010 PCSX2 Dev Team * * PCSX2 is free software: you can redistribute it and/or modify it under the terms * of the GNU Lesser General Public License as published by the Free Software Found- @@ -30,37 +30,43 @@ extern HINSTANCE hInst; //HANDLE handleDEV9Thread = NULL; //DWORD dwThreadId, dwThrdParam; -void SysMessage(char *fmt, ...) { +void SysMessage(char* fmt, ...) +{ va_list list; char tmp[512]; - va_start(list,fmt); - vsprintf(tmp,fmt,list); + va_start(list, fmt); + vsprintf(tmp, fmt, list); va_end(list); MessageBox(0, tmp, "Dev9 Msg", 0); } -void OnInitDialog(HWND hW) { - char *dev; +void OnInitDialog(HWND hW) +{ + char* dev; //int i; LoadConf(); ComboBox_AddString(GetDlgItem(hW, IDC_BAYTYPE), "Expansion"); ComboBox_AddString(GetDlgItem(hW, IDC_BAYTYPE), "PC Card"); - for (int i=0; i * al=GetTapAdapters(); - for (size_t i=0; isize(); i++) { - int itm=ComboBox_AddString(GetDlgItem(hW, IDC_ETHDEV), al[0][i].name.c_str()); - ComboBox_SetItemData(GetDlgItem(hW, IDC_ETHDEV),itm,_strdup( al[0][i].guid.c_str())); - if (strcmp(al[0][i].guid.c_str(), config.Eth) == 0) { + vector* al = GetTapAdapters(); + for (size_t i = 0; i < al->size(); i++) + { + int itm = ComboBox_AddString(GetDlgItem(hW, IDC_ETHDEV), al[0][i].name.c_str()); + ComboBox_SetItemData(GetDlgItem(hW, IDC_ETHDEV), itm, _strdup(al[0][i].guid.c_str())); + if (strcmp(al[0][i].guid.c_str(), config.Eth) == 0) + { ComboBox_SetCurSel(GetDlgItem(hW, IDC_ETHDEV), itm); } } @@ -71,12 +77,13 @@ void OnInitDialog(HWND hW) { Button_SetCheck(GetDlgItem(hW, IDC_HDDENABLED), config.hddEnable); } -void OnOk(HWND hW) { +void OnOk(HWND hW) +{ int i = ComboBox_GetCurSel(GetDlgItem(hW, IDC_ETHDEV)); if (i == -1) { //adapter not selected - if ( Button_GetCheck(GetDlgItem(hW, IDC_ETHENABLED))) + if (Button_GetCheck(GetDlgItem(hW, IDC_ETHENABLED))) { //Trying to use an ethernet without //selected adapter, we can't have that @@ -107,15 +114,18 @@ void OnOk(HWND hW) { EndDialog(hW, TRUE); } -BOOL CALLBACK ConfigureDlgProc(HWND hW, UINT uMsg, WPARAM wParam, LPARAM lParam) { +BOOL CALLBACK ConfigureDlgProc(HWND hW, UINT uMsg, WPARAM wParam, LPARAM lParam) +{ - switch(uMsg) { + switch (uMsg) + { case WM_INITDIALOG: OnInitDialog(hW); return TRUE; case WM_COMMAND: - switch(LOWORD(wParam)) { + switch (LOWORD(wParam)) + { case IDCANCEL: EndDialog(hW, FALSE); return TRUE; @@ -127,13 +137,16 @@ BOOL CALLBACK ConfigureDlgProc(HWND hW, UINT uMsg, WPARAM wParam, LPARAM lParam) return FALSE; } -BOOL CALLBACK AboutDlgProc(HWND hW, UINT uMsg, WPARAM wParam, LPARAM lParam) { - switch(uMsg) { +BOOL CALLBACK AboutDlgProc(HWND hW, UINT uMsg, WPARAM wParam, LPARAM lParam) +{ + switch (uMsg) + { case WM_INITDIALOG: return TRUE; case WM_COMMAND: - switch(LOWORD(wParam)) { + switch (LOWORD(wParam)) + { case IDOK: EndDialog(hW, FALSE); return TRUE; @@ -142,29 +155,32 @@ BOOL CALLBACK AboutDlgProc(HWND hW, UINT uMsg, WPARAM wParam, LPARAM lParam) { return FALSE; } -void DEV9configure() { - ScopedCoreThreadPause paused_core; - DialogBox(hInst, - MAKEINTRESOURCE(IDD_CONFIG), - GetActiveWindow(), - (DLGPROC)ConfigureDlgProc); - //SysMessage("Nothing to Configure"); - paused_core.AllowResume(); +void DEV9configure() +{ + ScopedCoreThreadPause paused_core; + DialogBox(hInst, + MAKEINTRESOURCE(IDD_CONFIG), + GetActiveWindow(), + (DLGPROC)ConfigureDlgProc); + //SysMessage("Nothing to Configure"); + paused_core.AllowResume(); } EXPORT_C_(void) -DEV9about() { - DialogBox(hInst, - MAKEINTRESOURCE(IDD_ABOUT), - GetActiveWindow(), - (DLGPROC)AboutDlgProc); +DEV9about() +{ + DialogBox(hInst, + MAKEINTRESOURCE(IDD_ABOUT), + GetActiveWindow(), + (DLGPROC)AboutDlgProc); } -BOOL APIENTRY DllMain(HANDLE hModule, // DLL INIT - DWORD dwReason, - LPVOID lpReserved) { +BOOL APIENTRY DllMain(HANDLE hModule, // DLL INIT + DWORD dwReason, + LPVOID lpReserved) +{ hInst = (HINSTANCE)hModule; - return TRUE; // very quick :) + return TRUE; // very quick :) } /* UINT DEV9ThreadProc() { @@ -183,12 +199,12 @@ NetAdapter* GetNetAdapter() } return na; } -s32 _DEV9open() +s32 _DEV9open() { //handleDEV9Thread = CreateThread (NULL, 0, (LPTHREAD_START_ROUTINE) DEV9ThreadProc, &dwThrdParam, CREATE_SUSPENDED, &dwThreadId); //SetThreadPriority(handleDEV9Thread,THREAD_PRIORITY_HIGHEST); //ResumeThread (handleDEV9Thread); - NetAdapter* na=GetNetAdapter(); + NetAdapter* na = GetNetAdapter(); if (!na) { emu_printf("Failed to GetNetAdapter()\n"); @@ -201,7 +217,8 @@ s32 _DEV9open() return 0; } -void _DEV9close() { +void _DEV9close() +{ //TerminateThread(handleDEV9Thread,0); //handleDEV9Thread = NULL; TermNet(); diff --git a/pcsx2/DEV9/Win32/_Ntddndis.h b/pcsx2/DEV9/Win32/_Ntddndis.h deleted file mode 100644 index 77a53d7af4..0000000000 --- a/pcsx2/DEV9/Win32/_Ntddndis.h +++ /dev/null @@ -1,1400 +0,0 @@ -/*++ BUILD Version: 0001 // Increment this if a change has global effects - Copyright (c) 1990-1993 Microsoft Corporation - Module Name: - ntddndis.h - Abstract: - This is the include file that defines all constants and types for - accessing the Network driver interface device. - Author: - Steve Wood (stevewo) 27-May-1990 - Revision History: - Adam Barr (adamba) 04-Nov-1992 added the correct values for NDIS 3.0. - Jameel Hyder (jameelh) 01-Aug-95 added Pnp IoCTLs and structures - Kyle Brandon (kyleb) 09/24/96 added general co ndis oids. - -- */ -#ifndef _NTDDNDIS_ -#define _NTDDNDIS_ -// -// Device Name - this string is the name of the device. It is the name -// that should be passed to NtOpenFile when accessing the device. -// -// Note: For devices that support multiple units, it should be suffixed -// with the Ascii representation of the unit number. -// -#define DD_NDIS_DEVICE_NAME "\\Device\\UNKNOWN" -// -// NtDeviceIoControlFile IoControlCode values for this device. -// -// Warning: Remember that the low two bits of the code specify how the -// buffers are passed to the driver! -// -#define _NDIS_CONTROL_CODE(request,method) \ - CTL_CODE(FILE_DEVICE_PHYSICAL_NETCARD, request, method, FILE_ANY_ACCESS) -#define IOCTL_NDIS_QUERY_GLOBAL_STATS _NDIS_CONTROL_CODE( 0, METHOD_OUT_DIRECT ) -#define IOCTL_NDIS_QUERY_ALL_STATS _NDIS_CONTROL_CODE( 1, METHOD_OUT_DIRECT ) -#define IOCTL_NDIS_ADD_DEVICE _NDIS_CONTROL_CODE( 2, METHOD_BUFFERED ) -#define IOCTL_NDIS_DELETE_DEVICE _NDIS_CONTROL_CODE( 3, METHOD_BUFFERED ) -#define IOCTL_NDIS_TRANSLATE_NAME _NDIS_CONTROL_CODE( 4, METHOD_BUFFERED ) -#define IOCTL_NDIS_ADD_TDI_DEVICE _NDIS_CONTROL_CODE( 5, METHOD_BUFFERED ) -#define IOCTL_NDIS_NOTIFY_PROTOCOL _NDIS_CONTROL_CODE( 6, METHOD_BUFFERED ) -#define IOCTL_NDIS_GET_LOG_DATA _NDIS_CONTROL_CODE( 7, METHOD_OUT_DIRECT ) -// -// NtDeviceIoControlFile InputBuffer/OutputBuffer record structures for -// this device. -// -// -// This is the type of an NDIS OID value. -// -typedef ULONG NDIS_OID, *PNDIS_OID; -// -// IOCTL_NDIS_QUERY_ALL_STATS returns a sequence of these, packed -// together (no padding is required since statistics all have -// four or eight bytes of data). -// -typedef struct _NDIS_STATISTICS_VALUE { - NDIS_OID Oid; - ULONG DataLength; - UCHAR Data[1]; // variable length - -} NDIS_STATISTICS_VALUE, *PNDIS_STATISTICS_VALUE; - -// -// Structure used by TRANSLATE_NAME IOCTL -// -typedef struct _NET_PNP_ID { - ULONG ClassId; - ULONG Token; -} NET_PNP_ID, *PNET_PNP_ID; - -typedef struct _NET_PNP_TRANSLATE_LIST { - ULONG BytesNeeded; - NET_PNP_ID IdArray[ANYSIZE_ARRAY]; -} NET_PNP_TRANSLATE_LIST, *PNET_PNP_TRANSLATE_LIST; - -// -// Structure used to define a self-contained variable data structure -// -typedef struct _NDIS_VAR_DATA_DESC { - USHORT Length; // # of octects of data - - USHORT MaximumLength; // # of octects available - - LONG Offset; // Offset of data relative to the descriptor - -} NDIS_VAR_DATA_DESC, *PNDIS_VAR_DATA_DESC; - -// -// Object Identifiers used by NdisRequest Query/Set Information -// -// -// General Objects -// -#define OID_GEN_SUPPORTED_LIST 0x00010101 -#define OID_GEN_HARDWARE_STATUS 0x00010102 -#define OID_GEN_MEDIA_SUPPORTED 0x00010103 -#define OID_GEN_MEDIA_IN_USE 0x00010104 -#define OID_GEN_MAXIMUM_LOOKAHEAD 0x00010105 -#define OID_GEN_MAXIMUM_FRAME_SIZE 0x00010106 -#define OID_GEN_LINK_SPEED 0x00010107 -#define OID_GEN_TRANSMIT_BUFFER_SPACE 0x00010108 -#define OID_GEN_RECEIVE_BUFFER_SPACE 0x00010109 -#define OID_GEN_TRANSMIT_BLOCK_SIZE 0x0001010A -#define OID_GEN_RECEIVE_BLOCK_SIZE 0x0001010B -#define OID_GEN_VENDOR_ID 0x0001010C -#define OID_GEN_VENDOR_DESCRIPTION 0x0001010D -#define OID_GEN_CURRENT_PACKET_FILTER 0x0001010E -#define OID_GEN_CURRENT_LOOKAHEAD 0x0001010F -#define OID_GEN_DRIVER_VERSION 0x00010110 -#define OID_GEN_MAXIMUM_TOTAL_SIZE 0x00010111 -#define OID_GEN_PROTOCOL_OPTIONS 0x00010112 -#define OID_GEN_MAC_OPTIONS 0x00010113 -#define OID_GEN_MEDIA_CONNECT_STATUS 0x00010114 -#define OID_GEN_MAXIMUM_SEND_PACKETS 0x00010115 -#define OID_GEN_VENDOR_DRIVER_VERSION 0x00010116 -#define OID_GEN_XMIT_OK 0x00020101 -#define OID_GEN_RCV_OK 0x00020102 -#define OID_GEN_XMIT_ERROR 0x00020103 -#define OID_GEN_RCV_ERROR 0x00020104 -#define OID_GEN_RCV_NO_BUFFER 0x00020105 -#define OID_GEN_DIRECTED_BYTES_XMIT 0x00020201 -#define OID_GEN_DIRECTED_FRAMES_XMIT 0x00020202 -#define OID_GEN_MULTICAST_BYTES_XMIT 0x00020203 -#define OID_GEN_MULTICAST_FRAMES_XMIT 0x00020204 -#define OID_GEN_BROADCAST_BYTES_XMIT 0x00020205 -#define OID_GEN_BROADCAST_FRAMES_XMIT 0x00020206 -#define OID_GEN_DIRECTED_BYTES_RCV 0x00020207 -#define OID_GEN_DIRECTED_FRAMES_RCV 0x00020208 -#define OID_GEN_MULTICAST_BYTES_RCV 0x00020209 -#define OID_GEN_MULTICAST_FRAMES_RCV 0x0002020A -#define OID_GEN_BROADCAST_BYTES_RCV 0x0002020B -#define OID_GEN_BROADCAST_FRAMES_RCV 0x0002020C -#define OID_GEN_RCV_CRC_ERROR 0x0002020D -#define OID_GEN_TRANSMIT_QUEUE_LENGTH 0x0002020E -#define OID_GEN_GET_TIME_CAPS 0x0002020F -#define OID_GEN_GET_NETCARD_TIME 0x00020210 -// -// These are connection-oriented general OIDs. -// These replace the above OIDs for connection-oriented media. -// -#define OID_GEN_CO_SUPPORTED_LIST 0x00010101 -#define OID_GEN_CO_HARDWARE_STATUS 0x00010102 -#define OID_GEN_CO_MEDIA_SUPPORTED 0x00010103 -#define OID_GEN_CO_MEDIA_IN_USE 0x00010104 -#define OID_GEN_CO_LINK_SPEED 0x00010105 -#define OID_GEN_CO_VENDOR_ID 0x00010106 -#define OID_GEN_CO_VENDOR_DESCRIPTION 0x00010107 -#define OID_GEN_CO_DRIVER_VERSION 0x00010108 -#define OID_GEN_CO_PROTOCOL_OPTIONS 0x00010109 -#define OID_GEN_CO_MAC_OPTIONS 0x0001010A -#define OID_GEN_CO_MEDIA_CONNECT_STATUS 0x0001010B -#define OID_GEN_CO_VENDOR_DRIVER_VERSION 0x0001010C -#define OID_GEN_CO_MINIMUM_LINK_SPEED 0x0001010D -#define OID_GEN_CO_GET_TIME_CAPS 0x00010201 -#define OID_GEN_CO_GET_NETCARD_TIME 0x00010202 -// -// These are connection-oriented statistics OIDs. -// -#define OID_GEN_CO_XMIT_PDUS_OK 0x00020101 -#define OID_GEN_CO_RCV_PDUS_OK 0x00020102 -#define OID_GEN_CO_XMIT_PDUS_ERROR 0x00020103 -#define OID_GEN_CO_RCV_PDUS_ERROR 0x00020104 -#define OID_GEN_CO_RCV_PDUS_NO_BUFFER 0x00020105 -#define OID_GEN_CO_RCV_CRC_ERROR 0x00020201 -#define OID_GEN_CO_TRANSMIT_QUEUE_LENGTH 0x00020202 -#define OID_GEN_CO_BYTES_XMIT 0x00020203 -#define OID_GEN_CO_BYTES_RCV 0x00020204 -#define OID_GEN_CO_BYTES_XMIT_OUTSTANDING 0x00020205 -#define OID_GEN_CO_NETCARD_LOAD 0x00020206 -// -// These are objects for Connection-oriented media call-managers and are not -// valid for ndis drivers. Under construction. -// -#define OID_CO_ADD_PVC 0xFF000001 -#define OID_CO_DELETE_PVC 0xFF000002 -#define OID_CO_GET_CALL_INFORMATION 0xFF000003 -#define OID_CO_ADD_ADDRESS 0xFF000004 -#define OID_CO_DELETE_ADDRESS 0xFF000005 -#define OID_CO_GET_ADDRESSES 0xFF000006 -#define OID_CO_ADDRESS_CHANGE 0xFF000007 -#define OID_CO_SIGNALING_ENABLED 0xFF000008 -#define OID_CO_SIGNALING_DISABLED 0xFF000009 -// -// 802.3 Objects (Ethernet) -// -#define OID_802_3_PERMANENT_ADDRESS 0x01010101 -#define OID_802_3_CURRENT_ADDRESS 0x01010102 -#define OID_802_3_MULTICAST_LIST 0x01010103 -#define OID_802_3_MAXIMUM_LIST_SIZE 0x01010104 -#define OID_802_3_MAC_OPTIONS 0x01010105 -// -// -#define NDIS_802_3_MAC_OPTION_PRIORITY 0x00000001 -#define OID_802_3_RCV_ERROR_ALIGNMENT 0x01020101 -#define OID_802_3_XMIT_ONE_COLLISION 0x01020102 -#define OID_802_3_XMIT_MORE_COLLISIONS 0x01020103 -#define OID_802_3_XMIT_DEFERRED 0x01020201 -#define OID_802_3_XMIT_MAX_COLLISIONS 0x01020202 -#define OID_802_3_RCV_OVERRUN 0x01020203 -#define OID_802_3_XMIT_UNDERRUN 0x01020204 -#define OID_802_3_XMIT_HEARTBEAT_FAILURE 0x01020205 -#define OID_802_3_XMIT_TIMES_CRS_LOST 0x01020206 -#define OID_802_3_XMIT_LATE_COLLISIONS 0x01020207 -// -// 802.5 Objects (Token-Ring) -// -#define OID_802_5_PERMANENT_ADDRESS 0x02010101 -#define OID_802_5_CURRENT_ADDRESS 0x02010102 -#define OID_802_5_CURRENT_FUNCTIONAL 0x02010103 -#define OID_802_5_CURRENT_GROUP 0x02010104 -#define OID_802_5_LAST_OPEN_STATUS 0x02010105 -#define OID_802_5_CURRENT_RING_STATUS 0x02010106 -#define OID_802_5_CURRENT_RING_STATE 0x02010107 -#define OID_802_5_LINE_ERRORS 0x02020101 -#define OID_802_5_LOST_FRAMES 0x02020102 -#define OID_802_5_BURST_ERRORS 0x02020201 -#define OID_802_5_AC_ERRORS 0x02020202 -#define OID_802_5_ABORT_DELIMETERS 0x02020203 -#define OID_802_5_FRAME_COPIED_ERRORS 0x02020204 -#define OID_802_5_FREQUENCY_ERRORS 0x02020205 -#define OID_802_5_TOKEN_ERRORS 0x02020206 -#define OID_802_5_INTERNAL_ERRORS 0x02020207 -// -// FDDI Objects -// -#define OID_FDDI_LONG_PERMANENT_ADDR 0x03010101 -#define OID_FDDI_LONG_CURRENT_ADDR 0x03010102 -#define OID_FDDI_LONG_MULTICAST_LIST 0x03010103 -#define OID_FDDI_LONG_MAX_LIST_SIZE 0x03010104 -#define OID_FDDI_SHORT_PERMANENT_ADDR 0x03010105 -#define OID_FDDI_SHORT_CURRENT_ADDR 0x03010106 -#define OID_FDDI_SHORT_MULTICAST_LIST 0x03010107 -#define OID_FDDI_SHORT_MAX_LIST_SIZE 0x03010108 -#define OID_FDDI_ATTACHMENT_TYPE 0x03020101 -#define OID_FDDI_UPSTREAM_NODE_LONG 0x03020102 -#define OID_FDDI_DOWNSTREAM_NODE_LONG 0x03020103 -#define OID_FDDI_FRAME_ERRORS 0x03020104 -#define OID_FDDI_FRAMES_LOST 0x03020105 -#define OID_FDDI_RING_MGT_STATE 0x03020106 -#define OID_FDDI_LCT_FAILURES 0x03020107 -#define OID_FDDI_LEM_REJECTS 0x03020108 -#define OID_FDDI_LCONNECTION_STATE 0x03020109 -#define OID_FDDI_SMT_STATION_ID 0x03030201 -#define OID_FDDI_SMT_OP_VERSION_ID 0x03030202 -#define OID_FDDI_SMT_HI_VERSION_ID 0x03030203 -#define OID_FDDI_SMT_LO_VERSION_ID 0x03030204 -#define OID_FDDI_SMT_MANUFACTURER_DATA 0x03030205 -#define OID_FDDI_SMT_USER_DATA 0x03030206 -#define OID_FDDI_SMT_MIB_VERSION_ID 0x03030207 -#define OID_FDDI_SMT_MAC_CT 0x03030208 -#define OID_FDDI_SMT_NON_MASTER_CT 0x03030209 -#define OID_FDDI_SMT_MASTER_CT 0x0303020A -#define OID_FDDI_SMT_AVAILABLE_PATHS 0x0303020B -#define OID_FDDI_SMT_CONFIG_CAPABILITIES 0x0303020C -#define OID_FDDI_SMT_CONFIG_POLICY 0x0303020D -#define OID_FDDI_SMT_CONNECTION_POLICY 0x0303020E -#define OID_FDDI_SMT_T_NOTIFY 0x0303020F -#define OID_FDDI_SMT_STAT_RPT_POLICY 0x03030210 -#define OID_FDDI_SMT_TRACE_MAX_EXPIRATION 0x03030211 -#define OID_FDDI_SMT_PORT_INDEXES 0x03030212 -#define OID_FDDI_SMT_MAC_INDEXES 0x03030213 -#define OID_FDDI_SMT_BYPASS_PRESENT 0x03030214 -#define OID_FDDI_SMT_ECM_STATE 0x03030215 -#define OID_FDDI_SMT_CF_STATE 0x03030216 -#define OID_FDDI_SMT_HOLD_STATE 0x03030217 -#define OID_FDDI_SMT_REMOTE_DISCONNECT_FLAG 0x03030218 -#define OID_FDDI_SMT_STATION_STATUS 0x03030219 -#define OID_FDDI_SMT_PEER_WRAP_FLAG 0x0303021A -#define OID_FDDI_SMT_MSG_TIME_STAMP 0x0303021B -#define OID_FDDI_SMT_TRANSITION_TIME_STAMP 0x0303021C -#define OID_FDDI_SMT_SET_COUNT 0x0303021D -#define OID_FDDI_SMT_LAST_SET_STATION_ID 0x0303021E -#define OID_FDDI_MAC_FRAME_STATUS_FUNCTIONS 0x0303021F -#define OID_FDDI_MAC_BRIDGE_FUNCTIONS 0x03030220 -#define OID_FDDI_MAC_T_MAX_CAPABILITY 0x03030221 -#define OID_FDDI_MAC_TVX_CAPABILITY 0x03030222 -#define OID_FDDI_MAC_AVAILABLE_PATHS 0x03030223 -#define OID_FDDI_MAC_CURRENT_PATH 0x03030224 -#define OID_FDDI_MAC_UPSTREAM_NBR 0x03030225 -#define OID_FDDI_MAC_DOWNSTREAM_NBR 0x03030226 -#define OID_FDDI_MAC_OLD_UPSTREAM_NBR 0x03030227 -#define OID_FDDI_MAC_OLD_DOWNSTREAM_NBR 0x03030228 -#define OID_FDDI_MAC_DUP_ADDRESS_TEST 0x03030229 -#define OID_FDDI_MAC_REQUESTED_PATHS 0x0303022A -#define OID_FDDI_MAC_DOWNSTREAM_PORT_TYPE 0x0303022B -#define OID_FDDI_MAC_INDEX 0x0303022C -#define OID_FDDI_MAC_SMT_ADDRESS 0x0303022D -#define OID_FDDI_MAC_LONG_GRP_ADDRESS 0x0303022E -#define OID_FDDI_MAC_SHORT_GRP_ADDRESS 0x0303022F -#define OID_FDDI_MAC_T_REQ 0x03030230 -#define OID_FDDI_MAC_T_NEG 0x03030231 -#define OID_FDDI_MAC_T_MAX 0x03030232 -#define OID_FDDI_MAC_TVX_VALUE 0x03030233 -#define OID_FDDI_MAC_T_PRI0 0x03030234 -#define OID_FDDI_MAC_T_PRI1 0x03030235 -#define OID_FDDI_MAC_T_PRI2 0x03030236 -#define OID_FDDI_MAC_T_PRI3 0x03030237 -#define OID_FDDI_MAC_T_PRI4 0x03030238 -#define OID_FDDI_MAC_T_PRI5 0x03030239 -#define OID_FDDI_MAC_T_PRI6 0x0303023A -#define OID_FDDI_MAC_FRAME_CT 0x0303023B -#define OID_FDDI_MAC_COPIED_CT 0x0303023C -#define OID_FDDI_MAC_TRANSMIT_CT 0x0303023D -#define OID_FDDI_MAC_TOKEN_CT 0x0303023E -#define OID_FDDI_MAC_ERROR_CT 0x0303023F -#define OID_FDDI_MAC_LOST_CT 0x03030240 -#define OID_FDDI_MAC_TVX_EXPIRED_CT 0x03030241 -#define OID_FDDI_MAC_NOT_COPIED_CT 0x03030242 -#define OID_FDDI_MAC_LATE_CT 0x03030243 -#define OID_FDDI_MAC_RING_OP_CT 0x03030244 -#define OID_FDDI_MAC_FRAME_ERROR_THRESHOLD 0x03030245 -#define OID_FDDI_MAC_FRAME_ERROR_RATIO 0x03030246 -#define OID_FDDI_MAC_NOT_COPIED_THRESHOLD 0x03030247 -#define OID_FDDI_MAC_NOT_COPIED_RATIO 0x03030248 -#define OID_FDDI_MAC_RMT_STATE 0x03030249 -#define OID_FDDI_MAC_DA_FLAG 0x0303024A -#define OID_FDDI_MAC_UNDA_FLAG 0x0303024B -#define OID_FDDI_MAC_FRAME_ERROR_FLAG 0x0303024C -#define OID_FDDI_MAC_NOT_COPIED_FLAG 0x0303024D -#define OID_FDDI_MAC_MA_UNITDATA_AVAILABLE 0x0303024E -#define OID_FDDI_MAC_HARDWARE_PRESENT 0x0303024F -#define OID_FDDI_MAC_MA_UNITDATA_ENABLE 0x03030250 -#define OID_FDDI_PATH_INDEX 0x03030251 -#define OID_FDDI_PATH_RING_LATENCY 0x03030252 -#define OID_FDDI_PATH_TRACE_STATUS 0x03030253 -#define OID_FDDI_PATH_SBA_PAYLOAD 0x03030254 -#define OID_FDDI_PATH_SBA_OVERHEAD 0x03030255 -#define OID_FDDI_PATH_CONFIGURATION 0x03030256 -#define OID_FDDI_PATH_T_R_MODE 0x03030257 -#define OID_FDDI_PATH_SBA_AVAILABLE 0x03030258 -#define OID_FDDI_PATH_TVX_LOWER_BOUND 0x03030259 -#define OID_FDDI_PATH_T_MAX_LOWER_BOUND 0x0303025A -#define OID_FDDI_PATH_MAX_T_REQ 0x0303025B -#define OID_FDDI_PORT_MY_TYPE 0x0303025C -#define OID_FDDI_PORT_NEIGHBOR_TYPE 0x0303025D -#define OID_FDDI_PORT_CONNECTION_POLICIES 0x0303025E -#define OID_FDDI_PORT_MAC_INDICATED 0x0303025F -#define OID_FDDI_PORT_CURRENT_PATH 0x03030260 -#define OID_FDDI_PORT_REQUESTED_PATHS 0x03030261 -#define OID_FDDI_PORT_MAC_PLACEMENT 0x03030262 -#define OID_FDDI_PORT_AVAILABLE_PATHS 0x03030263 -#define OID_FDDI_PORT_MAC_LOOP_TIME 0x03030264 -#define OID_FDDI_PORT_PMD_CLASS 0x03030265 -#define OID_FDDI_PORT_CONNECTION_CAPABILITIES 0x03030266 -#define OID_FDDI_PORT_INDEX 0x03030267 -#define OID_FDDI_PORT_MAINT_LS 0x03030268 -#define OID_FDDI_PORT_BS_FLAG 0x03030269 -#define OID_FDDI_PORT_PC_LS 0x0303026A -#define OID_FDDI_PORT_EB_ERROR_CT 0x0303026B -#define OID_FDDI_PORT_LCT_FAIL_CT 0x0303026C -#define OID_FDDI_PORT_LER_ESTIMATE 0x0303026D -#define OID_FDDI_PORT_LEM_REJECT_CT 0x0303026E -#define OID_FDDI_PORT_LEM_CT 0x0303026F -#define OID_FDDI_PORT_LER_CUTOFF 0x03030270 -#define OID_FDDI_PORT_LER_ALARM 0x03030271 -#define OID_FDDI_PORT_CONNNECT_STATE 0x03030272 -#define OID_FDDI_PORT_PCM_STATE 0x03030273 -#define OID_FDDI_PORT_PC_WITHHOLD 0x03030274 -#define OID_FDDI_PORT_LER_FLAG 0x03030275 -#define OID_FDDI_PORT_HARDWARE_PRESENT 0x03030276 -#define OID_FDDI_SMT_STATION_ACTION 0x03030277 -#define OID_FDDI_PORT_ACTION 0x03030278 -#define OID_FDDI_IF_DESCR 0x03030279 -#define OID_FDDI_IF_TYPE 0x0303027A -#define OID_FDDI_IF_MTU 0x0303027B -#define OID_FDDI_IF_SPEED 0x0303027C -#define OID_FDDI_IF_PHYS_ADDRESS 0x0303027D -#define OID_FDDI_IF_ADMIN_STATUS 0x0303027E -#define OID_FDDI_IF_OPER_STATUS 0x0303027F -#define OID_FDDI_IF_LAST_CHANGE 0x03030280 -#define OID_FDDI_IF_IN_OCTETS 0x03030281 -#define OID_FDDI_IF_IN_UCAST_PKTS 0x03030282 -#define OID_FDDI_IF_IN_NUCAST_PKTS 0x03030283 -#define OID_FDDI_IF_IN_DISCARDS 0x03030284 -#define OID_FDDI_IF_IN_ERRORS 0x03030285 -#define OID_FDDI_IF_IN_UNKNOWN_PROTOS 0x03030286 -#define OID_FDDI_IF_OUT_OCTETS 0x03030287 -#define OID_FDDI_IF_OUT_UCAST_PKTS 0x03030288 -#define OID_FDDI_IF_OUT_NUCAST_PKTS 0x03030289 -#define OID_FDDI_IF_OUT_DISCARDS 0x0303028A -#define OID_FDDI_IF_OUT_ERRORS 0x0303028B -#define OID_FDDI_IF_OUT_QLEN 0x0303028C -#define OID_FDDI_IF_SPECIFIC 0x0303028D -// -// WAN objects -// -#define OID_WAN_PERMANENT_ADDRESS 0x04010101 -#define OID_WAN_CURRENT_ADDRESS 0x04010102 -#define OID_WAN_QUALITY_OF_SERVICE 0x04010103 -#define OID_WAN_PROTOCOL_TYPE 0x04010104 -#define OID_WAN_MEDIUM_SUBTYPE 0x04010105 -#define OID_WAN_HEADER_FORMAT 0x04010106 -#define OID_WAN_GET_INFO 0x04010107 -#define OID_WAN_SET_LINK_INFO 0x04010108 -#define OID_WAN_GET_LINK_INFO 0x04010109 -#define OID_WAN_LINE_COUNT 0x0401010A -#define OID_WAN_GET_BRIDGE_INFO 0x0401020A -#define OID_WAN_SET_BRIDGE_INFO 0x0401020B -#define OID_WAN_GET_COMP_INFO 0x0401020C -#define OID_WAN_SET_COMP_INFO 0x0401020D -#define OID_WAN_GET_STATS_INFO 0x0401020E -// -// LocalTalk objects -// -#define OID_LTALK_CURRENT_NODE_ID 0x05010102 -#define OID_LTALK_IN_BROADCASTS 0x05020101 -#define OID_LTALK_IN_LENGTH_ERRORS 0x05020102 -#define OID_LTALK_OUT_NO_HANDLERS 0x05020201 -#define OID_LTALK_COLLISIONS 0x05020202 -#define OID_LTALK_DEFERS 0x05020203 -#define OID_LTALK_NO_DATA_ERRORS 0x05020204 -#define OID_LTALK_RANDOM_CTS_ERRORS 0x05020205 -#define OID_LTALK_FCS_ERRORS 0x05020206 -// -// Arcnet objects -// -#define OID_ARCNET_PERMANENT_ADDRESS 0x06010101 -#define OID_ARCNET_CURRENT_ADDRESS 0x06010102 -#define OID_ARCNET_RECONFIGURATIONS 0x06020201 -// -// TAPI objects -// -#define OID_TAPI_ACCEPT 0x07030101 -#define OID_TAPI_ANSWER 0x07030102 -#define OID_TAPI_CLOSE 0x07030103 -#define OID_TAPI_CLOSE_CALL 0x07030104 -#define OID_TAPI_CONDITIONAL_MEDIA_DETECTION 0x07030105 -#define OID_TAPI_CONFIG_DIALOG 0x07030106 -#define OID_TAPI_DEV_SPECIFIC 0x07030107 -#define OID_TAPI_DIAL 0x07030108 -#define OID_TAPI_DROP 0x07030109 -#define OID_TAPI_GET_ADDRESS_CAPS 0x0703010A -#define OID_TAPI_GET_ADDRESS_ID 0x0703010B -#define OID_TAPI_GET_ADDRESS_STATUS 0x0703010C -#define OID_TAPI_GET_CALL_ADDRESS_ID 0x0703010D -#define OID_TAPI_GET_CALL_INFO 0x0703010E -#define OID_TAPI_GET_CALL_STATUS 0x0703010F -#define OID_TAPI_GET_DEV_CAPS 0x07030110 -#define OID_TAPI_GET_DEV_CONFIG 0x07030111 -#define OID_TAPI_GET_EXTENSION_ID 0x07030112 -#define OID_TAPI_GET_ID 0x07030113 -#define OID_TAPI_GET_LINE_DEV_STATUS 0x07030114 -#define OID_TAPI_MAKE_CALL 0x07030115 -#define OID_TAPI_NEGOTIATE_EXT_VERSION 0x07030116 -#define OID_TAPI_OPEN 0x07030117 -#define OID_TAPI_PROVIDER_INITIALIZE 0x07030118 -#define OID_TAPI_PROVIDER_SHUTDOWN 0x07030119 -#define OID_TAPI_SECURE_CALL 0x0703011A -#define OID_TAPI_SELECT_EXT_VERSION 0x0703011B -#define OID_TAPI_SEND_USER_USER_INFO 0x0703011C -#define OID_TAPI_SET_APP_SPECIFIC 0x0703011D -#define OID_TAPI_SET_CALL_PARAMS 0x0703011E -#define OID_TAPI_SET_DEFAULT_MEDIA_DETECTION 0x0703011F -#define OID_TAPI_SET_DEV_CONFIG 0x07030120 -#define OID_TAPI_SET_MEDIA_MODE 0x07030121 -#define OID_TAPI_SET_STATUS_MESSAGES 0x07030122 -// -// ATM Connection Oriented Ndis -// -#define OID_ATM_SUPPORTED_VC_RATES 0x08010101 -#define OID_ATM_SUPPORTED_SERVICE_CATEGORY 0x08010102 -#define OID_ATM_SUPPORTED_AAL_TYPES 0x08010103 -#define OID_ATM_HW_CURRENT_ADDRESS 0x08010104 -#define OID_ATM_MAX_ACTIVE_VCS 0x08010105 -#define OID_ATM_MAX_ACTIVE_VCI_BITS 0x08010106 -#define OID_ATM_MAX_ACTIVE_VPI_BITS 0x08010107 -#define OID_ATM_MAX_AAL0_PACKET_SIZE 0x08010108 -#define OID_ATM_MAX_AAL1_PACKET_SIZE 0x08010109 -#define OID_ATM_MAX_AAL34_PACKET_SIZE 0x0801010A -#define OID_ATM_MAX_AAL5_PACKET_SIZE 0x0801010B -#define OID_ATM_SIGNALING_VPIVCI 0x08010201 -#define OID_ATM_ASSIGNED_VPI 0x08010202 -#define OID_ATM_ACQUIRE_ACCESS_NET_RESOURCES 0x08010203 -#define OID_ATM_RELEASE_ACCESS_NET_RESOURCES 0x08010204 -#define OID_ATM_ILMI_VPIVCI 0x08010205 -#define OID_ATM_DIGITAL_BROADCAST_VPIVCI 0x08010206 -#define OID_ATM_GET_NEAREST_FLOW 0x08010207 -#define OID_ATM_ALIGNMENT_REQUIRED 0x08010208 -// -// ATM specific statistics OIDs. -// -#define OID_ATM_RCV_CELLS_OK 0x08020101 -#define OID_ATM_XMIT_CELLS_OK 0x08020102 -#define OID_ATM_RCV_CELLS_DROPPED 0x08020103 -#define OID_ATM_RCV_INVALID_VPI_VCI 0x08020201 -#define OID_ATM_CELLS_HEC_ERROR 0x08020202 -#define OID_ATM_RCV_REASSEMBLY_ERROR 0x08020203 -// -// PCCA (Wireless) object -// -// -// All WirelessWAN devices must support the following OIDs -// -#define OID_WW_GEN_NETWORK_TYPES_SUPPORTED 0x09010101 -#define OID_WW_GEN_NETWORK_TYPE_IN_USE 0x09010102 -#define OID_WW_GEN_HEADER_FORMATS_SUPPORTED 0x09010103 -#define OID_WW_GEN_HEADER_FORMAT_IN_USE 0x09010104 -#define OID_WW_GEN_INDICATION_REQUEST 0x09010105 -#define OID_WW_GEN_DEVICE_INFO 0x09010106 -#define OID_WW_GEN_OPERATION_MODE 0x09010107 -#define OID_WW_GEN_LOCK_STATUS 0x09010108 -#define OID_WW_GEN_DISABLE_TRANSMITTER 0x09010109 -#define OID_WW_GEN_NETWORK_ID 0x0901010A -#define OID_WW_GEN_PERMANENT_ADDRESS 0x0901010B -#define OID_WW_GEN_CURRENT_ADDRESS 0x0901010C -#define OID_WW_GEN_SUSPEND_DRIVER 0x0901010D -#define OID_WW_GEN_BASESTATION_ID 0x0901010E -#define OID_WW_GEN_CHANNEL_ID 0x0901010F -#define OID_WW_GEN_ENCRYPTION_SUPPORTED 0x09010110 -#define OID_WW_GEN_ENCRYPTION_IN_USE 0x09010111 -#define OID_WW_GEN_ENCRYPTION_STATE 0x09010112 -#define OID_WW_GEN_CHANNEL_QUALITY 0x09010113 -#define OID_WW_GEN_REGISTRATION_STATUS 0x09010114 -#define OID_WW_GEN_RADIO_LINK_SPEED 0x09010115 -#define OID_WW_GEN_LATENCY 0x09010116 -#define OID_WW_GEN_BATTERY_LEVEL 0x09010117 -#define OID_WW_GEN_EXTERNAL_POWER 0x09010118 -// -// Network Dependent OIDs - Mobitex: -// -#define OID_WW_MBX_SUBADDR 0x09050101 -// OID 0x09050102 is reserved and may not be used -#define OID_WW_MBX_FLEXLIST 0x09050103 -#define OID_WW_MBX_GROUPLIST 0x09050104 -#define OID_WW_MBX_TRAFFIC_AREA 0x09050105 -#define OID_WW_MBX_LIVE_DIE 0x09050106 -#define OID_WW_MBX_TEMP_DEFAULTLIST 0x09050107 -// -// Network Dependent OIDs - Pinpoint: -// -#define OID_WW_PIN_LOC_AUTHORIZE 0x09090101 -#define OID_WW_PIN_LAST_LOCATION 0x09090102 -#define OID_WW_PIN_LOC_FIX 0x09090103 -// -// Network Dependent - CDPD: -// -#define OID_WW_CDPD_SPNI 0x090D0101 -#define OID_WW_CDPD_WASI 0x090D0102 -#define OID_WW_CDPD_AREA_COLOR 0x090D0103 -#define OID_WW_CDPD_TX_POWER_LEVEL 0x090D0104 -#define OID_WW_CDPD_EID 0x090D0105 -#define OID_WW_CDPD_HEADER_COMPRESSION 0x090D0106 -#define OID_WW_CDPD_DATA_COMPRESSION 0x090D0107 -#define OID_WW_CDPD_CHANNEL_SELECT 0x090D0108 -#define OID_WW_CDPD_CHANNEL_STATE 0x090D0109 -#define OID_WW_CDPD_NEI 0x090D010A -#define OID_WW_CDPD_NEI_STATE 0x090D010B -#define OID_WW_CDPD_SERVICE_PROVIDER_IDENTIFIER 0x090D010C -#define OID_WW_CDPD_SLEEP_MODE 0x090D010D -#define OID_WW_CDPD_CIRCUIT_SWITCHED 0x090D010E -#define OID_WW_CDPD_TEI 0x090D010F -#define OID_WW_CDPD_RSSI 0x090D0110 -// -// Network Dependent - Ardis: -// -#define OID_WW_ARD_SNDCP 0x09110101 -#define OID_WW_ARD_TMLY_MSG 0x09110102 -#define OID_WW_ARD_DATAGRAM 0x09110103 -// -// Network Dependent - DataTac: -// -#define OID_WW_TAC_COMPRESSION 0x09150101 -#define OID_WW_TAC_SET_CONFIG 0x09150102 -#define OID_WW_TAC_GET_STATUS 0x09150103 -#define OID_WW_TAC_USER_HEADER 0x09150104 -// -// Network Dependent - Metricom: -// -#define OID_WW_MET_FUNCTION 0x09190101 -// -// IRDA objects -// -#define OID_IRDA_RECEIVING 0x0A010100 -#define OID_IRDA_TURNAROUND_TIME 0x0A010101 -#define OID_IRDA_SUPPORTED_SPEEDS 0x0A010102 -#define OID_IRDA_LINK_SPEED 0x0A010103 -#define OID_IRDA_MEDIA_BUSY 0x0A010104 -#define OID_IRDA_EXTRA_RCV_BOFS 0x0A010200 -#define OID_IRDA_RATE_SNIFF 0x0A010201 -#define OID_IRDA_UNICAST_LIST 0x0A010202 -#define OID_IRDA_MAX_UNICAST_LIST_SIZE 0x0A010203 -#define OID_IRDA_MAX_RECEIVE_WINDOW_SIZE 0x0A010204 -#define OID_IRDA_MAX_SEND_WINDOW_SIZE 0x0A010205 -// -// Medium the Ndis Driver is running on (OID_GEN_MEDIA_SUPPORTED/ -// OID_GEN_MEDIA_IN_USE). -// -typedef enum _NDIS_MEDIUM { - NdisMedium802_3, - NdisMedium802_5, - NdisMediumFddi, - NdisMediumWan, - NdisMediumLocalTalk, - NdisMediumDix, // defined for convenience, not a real medium - NdisMediumArcnetRaw, - NdisMediumArcnet878_2, - NdisMediumAtm, - NdisMediumWirelessWan, - NdisMediumIrda, - NdisMediumMax // Not a real medium, defined as an upper-bound -} NDIS_MEDIUM, *PNDIS_MEDIUM; - -// -// Hardware status codes (OID_GEN_HARDWARE_STATUS). -// -typedef enum _NDIS_HARDWARE_STATUS { - NdisHardwareStatusReady, - NdisHardwareStatusInitializing, - NdisHardwareStatusReset, - NdisHardwareStatusClosing, - NdisHardwareStatusNotReady -} NDIS_HARDWARE_STATUS, *PNDIS_HARDWARE_STATUS; - -// -// this is the type passed in the OID_GEN_GET_TIME_CAPS request -// -typedef struct _GEN_GET_TIME_CAPS { - ULONG Flags; // Bits defined below - - ULONG ClockPrecision; -} GEN_GET_TIME_CAPS, *PGEN_GET_TIME_CAPS; - -#define READABLE_LOCAL_CLOCK 0x000000001 -#define CLOCK_NETWORK_DERIVED 0x000000002 -#define CLOCK_PRECISION 0x000000004 -#define RECEIVE_TIME_INDICATION_CAPABLE 0x000000008 -#define TIMED_SEND_CAPABLE 0x000000010 -#define TIME_STAMP_CAPABLE 0x000000020 -// -// -// this is the type passed in the OID_GEN_GET_NETCARD_TIME request -// -typedef struct _GEN_GET_NETCARD_TIME { - ULONG ReadTime; -} GEN_GET_NETCARD_TIME, *PGEN_GET_NETCARD_TIME; - -// -// Defines the attachment types for FDDI (OID_FDDI_ATTACHMENT_TYPE). -// -typedef enum _NDIS_FDDI_ATTACHMENT_TYPE { - NdisFddiTypeIsolated = 1, - NdisFddiTypeLocalA, - NdisFddiTypeLocalB, - NdisFddiTypeLocalAB, - NdisFddiTypeLocalS, - NdisFddiTypeWrapA, - NdisFddiTypeWrapB, - NdisFddiTypeWrapAB, - NdisFddiTypeWrapS, - NdisFddiTypeCWrapA, - NdisFddiTypeCWrapB, - NdisFddiTypeCWrapS, - NdisFddiTypeThrough -} NDIS_FDDI_ATTACHMENT_TYPE, *PNDIS_FDDI_ATTACHMENT_TYPE; - -// -// Defines the ring management states for FDDI (OID_FDDI_RING_MGT_STATE). -// -typedef enum _NDIS_FDDI_RING_MGT_STATE { - NdisFddiRingIsolated = 1, - NdisFddiRingNonOperational, - NdisFddiRingOperational, - NdisFddiRingDetect, - NdisFddiRingNonOperationalDup, - NdisFddiRingOperationalDup, - NdisFddiRingDirected, - NdisFddiRingTrace -} NDIS_FDDI_RING_MGT_STATE, *PNDIS_FDDI_RING_MGT_STATE; - -// -// Defines the Lconnection state for FDDI (OID_FDDI_LCONNECTION_STATE). -// -typedef enum _NDIS_FDDI_LCONNECTION_STATE { - NdisFddiStateOff = 1, - NdisFddiStateBreak, - NdisFddiStateTrace, - NdisFddiStateConnect, - NdisFddiStateNext, - NdisFddiStateSignal, - NdisFddiStateJoin, - NdisFddiStateVerify, - NdisFddiStateActive, - NdisFddiStateMaintenance -} NDIS_FDDI_LCONNECTION_STATE, *PNDIS_FDDI_LCONNECTION_STATE; - -// -// Defines the medium subtypes for WAN medium (OID_WAN_MEDIUM_SUBTYPE). -// -typedef enum _NDIS_WAN_MEDIUM_SUBTYPE { - NdisWanMediumHub, - NdisWanMediumX_25, - NdisWanMediumIsdn, - NdisWanMediumSerial, - NdisWanMediumFrameRelay, - NdisWanMediumAtm, - NdisWanMediumSonet, - NdisWanMediumSW56K -} NDIS_WAN_MEDIUM_SUBTYPE, *PNDIS_WAN_MEDIUM_SUBTYPE; - -// -// Defines the header format for WAN medium (OID_WAN_HEADER_FORMAT). -// -typedef enum _NDIS_WAN_HEADER_FORMAT { - NdisWanHeaderNative, // src/dest based on subtype, followed by NLPID - NdisWanHeaderEthernet // emulation of ethernet header -} NDIS_WAN_HEADER_FORMAT, *PNDIS_WAN_HEADER_FORMAT; - -// -// Defines the line quality on a WAN line (OID_WAN_QUALITY_OF_SERVICE). -// -typedef enum _NDIS_WAN_QUALITY { - NdisWanRaw, - NdisWanErrorControl, - NdisWanReliable -} NDIS_WAN_QUALITY, *PNDIS_WAN_QUALITY; - -// -// Defines the state of a token-ring adapter (OID_802_5_CURRENT_RING_STATE). -// -typedef enum _NDIS_802_5_RING_STATE { - NdisRingStateOpened = 1, - NdisRingStateClosed, - NdisRingStateOpening, - NdisRingStateClosing, - NdisRingStateOpenFailure, - NdisRingStateRingFailure -} NDIS_802_5_RING_STATE, *PNDIS_802_5_RING_STATE; - -// -// Defines the state of the LAN media -// -typedef enum _NDIS_MEDIA_STATE { - NdisMediaStateConnected, - NdisMediaStateDisconnected -} NDIS_MEDIA_STATE, *PNDIS_MEDIA_STATE; - -// -// The following is set on a per-packet basis as OOB data with NdisClass802_3Priority -// -typedef ULONG Priority_802_3; // 0-7 priority levels -// -// The following structure is used to query OID_GEN_CO_LINK_SPEED and -// OID_GEN_CO_MINIMUM_LINK_SPEED. The first OID will return the current -// link speed of the adapter. The second will return the minimum link speed -// the adapter is capable of. -// - -typedef struct _NDIS_CO_LINK_SPEED { - ULONG Outbound; - ULONG Inbound; -} NDIS_CO_LINK_SPEED, - -*PNDIS_CO_LINK_SPEED; -// -// Ndis Packet Filter Bits (OID_GEN_CURRENT_PACKET_FILTER). -// -#define NDIS_PACKET_TYPE_DIRECTED 0x0001 -#define NDIS_PACKET_TYPE_MULTICAST 0x0002 -#define NDIS_PACKET_TYPE_ALL_MULTICAST 0x0004 -#define NDIS_PACKET_TYPE_BROADCAST 0x0008 -#define NDIS_PACKET_TYPE_SOURCE_ROUTING 0x0010 -#define NDIS_PACKET_TYPE_PROMISCUOUS 0x0020 -#define NDIS_PACKET_TYPE_SMT 0x0040 -#define NDIS_PACKET_TYPE_ALL_LOCAL 0x0080 -#define NDIS_PACKET_TYPE_MAC_FRAME 0x8000 -#define NDIS_PACKET_TYPE_FUNCTIONAL 0x4000 -#define NDIS_PACKET_TYPE_ALL_FUNCTIONAL 0x2000 -#define NDIS_PACKET_TYPE_GROUP 0x1000 -// -// Ndis Token-Ring Ring Status Codes (OID_802_5_CURRENT_RING_STATUS). -// -#define NDIS_RING_SIGNAL_LOSS 0x00008000 -#define NDIS_RING_HARD_ERROR 0x00004000 -#define NDIS_RING_SOFT_ERROR 0x00002000 -#define NDIS_RING_TRANSMIT_BEACON 0x00001000 -#define NDIS_RING_LOBE_WIRE_FAULT 0x00000800 -#define NDIS_RING_AUTO_REMOVAL_ERROR 0x00000400 -#define NDIS_RING_REMOVE_RECEIVED 0x00000200 -#define NDIS_RING_COUNTER_OVERFLOW 0x00000100 -#define NDIS_RING_SINGLE_STATION 0x00000080 -#define NDIS_RING_RING_RECOVERY 0x00000040 -// -// Ndis protocol option bits (OID_GEN_PROTOCOL_OPTIONS). -// -#define NDIS_PROT_OPTION_ESTIMATED_LENGTH 0x00000001 -#define NDIS_PROT_OPTION_NO_LOOPBACK 0x00000002 -#define NDIS_PROT_OPTION_NO_RSVD_ON_RCVPKT 0x00000004 -// -// Ndis MAC option bits (OID_GEN_MAC_OPTIONS). -// -#define NDIS_MAC_OPTION_COPY_LOOKAHEAD_DATA 0x00000001 -#define NDIS_MAC_OPTION_RECEIVE_SERIALIZED 0x00000002 -#define NDIS_MAC_OPTION_TRANSFERS_NOT_PEND 0x00000004 -#define NDIS_MAC_OPTION_NO_LOOPBACK 0x00000008 -#define NDIS_MAC_OPTION_FULL_DUPLEX 0x00000010 -#define NDIS_MAC_OPTION_EOTX_INDICATION 0x00000020 -#define NDIS_MAC_OPTION_RESERVED 0x80000000 -// -// NDIS MAC option bits for OID_GEN_CO_MAC_OPTIONS. -// -#define NDIS_CO_MAC_OPTION_DYNAMIC_LINK_SPEED 0x00000001 -#ifdef IRDA -// -// The following is set on a per-packet basis as OOB data with NdisClassIrdaPacketInfo -// This is the per-packet info specified on a per-packet basis -// -typedef struct _NDIS_IRDA_PACKET_INFO { - UINT ExtraBOFs; - UINT MinTurnAroundTime; -} NDIS_IRDA_PACKET_INFO, *PNDIS_IRDA_PACKET_INFO; - -#endif -#ifdef WIRELESS_WAN -// -// Wireless WAN structure definitions -// -// -// currently defined Wireless network subtypes -// -typedef enum _NDIS_WW_NETWORK_TYPE { - NdisWWGeneric, - NdisWWMobitex, - NdisWWPinpoint, - NdisWWCDPD, - NdisWWArdis, - NdisWWDataTAC, - NdisWWMetricom, - NdisWWGSM, - NdisWWCDMA, - NdisWWTDMA, - NdisWWAMPS, - NdisWWInmarsat, - NdisWWpACT -} NDIS_WW_NETWORK_TYPE; - -// -// currently defined header formats -// -typedef enum _NDIS_WW_HEADER_FORMAT { - NdisWWDIXEthernetFrames, - NdisWWMPAKFrames, - NdisWWRDLAPFrames, - NdisWWMDC4800Frames -} NDIS_WW_HEADER_FORMAT; - -// -// currently defined encryption types -// -typedef enum _NDIS_WW_ENCRYPTION_TYPE { - NdisWWUnknownEncryption = -1, - NdisWWNoEncryption, - NdisWWDefaultEncryption -} NDIS_WW_ENCRYPTION_TYPE, *PNDIS_WW_ENCRYPTION_TYPE; - -// -// OID_WW_GEN_INDICATION_REQUEST -// -typedef struct _NDIS_WW_INDICATION_REQUEST { - NDIS_OID Oid; // IN - - UINT uIndicationFlag; // IN - - UINT uApplicationToken; // IN OUT - - HANDLE hIndicationHandle; // IN OUT - - INT iPollingInterval; // IN OUT - - NDIS_VAR_DATA_DESC InitialValue; // IN OUT - - NDIS_VAR_DATA_DESC OIDIndicationValue; // OUT - only valid after indication - - NDIS_VAR_DATA_DESC TriggerValue; // IN - -} NDIS_WW_INDICATION_REQUEST, *PNDIS_WW_INDICATION_REQUEST; - -#define OID_INDICATION_REQUEST_ENABLE 0x0000 -#define OID_INDICATION_REQUEST_CANCEL 0x0001 -// -// OID_WW_GEN_DEVICE_INFO -// -typedef struct _WW_DEVICE_INFO { - NDIS_VAR_DATA_DESC Manufacturer; - NDIS_VAR_DATA_DESC ModelNum; - NDIS_VAR_DATA_DESC SWVersionNum; - NDIS_VAR_DATA_DESC SerialNum; -} WW_DEVICE_INFO, *PWW_DEVICE_INFO; - -// -// OID_WW_GEN_OPERATION_MODE -// -typedef INT WW_OPERATION_MODE; // 0 = Normal mode - // 1 = Power saving mode - // -1 = mode unknown -// -// OID_WW_GEN_LOCK_STATUS -// - -typedef INT WW_LOCK_STATUS; // 0 = unlocked - // 1 = locked - // -1 = unknown lock status -// -// OID_WW_GEN_DISABLE_TRANSMITTER -// - -typedef INT WW_DISABLE_TRANSMITTER; // 0 = transmitter enabled - // 1 = transmitter disabled - // -1 = unknown value -// -// OID_WW_GEN_NETWORK_ID -// - -typedef NDIS_VAR_DATA_DESC WW_NETWORK_ID; -// -// OID_WW_GEN_PERMANENT_ADDRESS -// -typedef NDIS_VAR_DATA_DESC WW_PERMANENT_ADDRESS; -// -// OID_WW_GEN_CURRENT_ADDRESS -// -typedef struct _WW_CURRENT_ADDRESS { - NDIS_WW_HEADER_FORMAT Format; - NDIS_VAR_DATA_DESC Address; -} WW_CURRENT_ADDRESS, *PWW_CURRENT_ADDRESS; - -// -// OID_WW_GEN_SUSPEND_DRIVER -// -typedef BOOLEAN WW_SUSPEND_DRIVER; // 0 = driver operational - // 1 = driver suspended -// -// OID_WW_GEN_BASESTATION_ID -// - -typedef NDIS_VAR_DATA_DESC WW_BASESTATION_ID; -// -// OID_WW_GEN_CHANNEL_ID -// -typedef NDIS_VAR_DATA_DESC WW_CHANNEL_ID; -// -// OID_WW_GEN_ENCRYPTION_STATE -// -typedef BOOLEAN WW_ENCRYPTION_STATE; // 0 = if encryption is disabled - // 1 = if encryption is enabled -// -// OID_WW_GEN_CHANNEL_QUALITY -// - -typedef INT WW_CHANNEL_QUALITY; // 0 = Not in network contact, - // 1-100 = Quality of Channel (100 is highest quality). - // -1 = channel quality is unknown -// -// OID_WW_GEN_REGISTRATION_STATUS -// - -typedef INT WW_REGISTRATION_STATUS; // 0 = Registration denied - // 1 = Registration pending - // 2 = Registered - // -1 = unknown registration status -// -// OID_WW_GEN_RADIO_LINK_SPEED -// - -typedef UINT WW_RADIO_LINK_SPEED; // Bits per second. -// -// OID_WW_GEN_LATENCY -// - -typedef UINT WW_LATENCY; // milliseconds -// -// OID_WW_GEN_BATTERY_LEVEL -// - -typedef INT WW_BATTERY_LEVEL; // 0-100 = battery level in percentage - // (100=fully charged) - // -1 = unknown battery level. -// -// OID_WW_GEN_EXTERNAL_POWER -// - -typedef INT WW_EXTERNAL_POWER; // 0 = no external power connected - // 1 = external power connected - // -1 = unknown -// -// OID_WW_MET_FUNCTION -// - -typedef NDIS_VAR_DATA_DESC WW_MET_FUNCTION; -// -// OID_WW_TAC_COMPRESSION -// -typedef BOOLEAN WW_TAC_COMPRESSION; // Determines whether or not network level compression - // is being used. -// -// OID_WW_TAC_SET_CONFIG -// - -typedef struct _WW_TAC_SETCONFIG { - NDIS_VAR_DATA_DESC RCV_MODE; - NDIS_VAR_DATA_DESC TX_CONTROL; - NDIS_VAR_DATA_DESC RX_CONTROL; - NDIS_VAR_DATA_DESC FLOW_CONTROL; - NDIS_VAR_DATA_DESC RESET_CNF; - NDIS_VAR_DATA_DESC READ_CNF; -} WW_TAC_SETCONFIG, *PWW_TAC_SETCONFIG; - -// -// OID_WW_TAC_GET_STATUS -// -typedef struct _WW_TAC_GETSTATUS { - BOOLEAN Action; // Set = Execute command. - - NDIS_VAR_DATA_DESC Command; - NDIS_VAR_DATA_DESC Option; - NDIS_VAR_DATA_DESC Response; // The response to the requested command - // - max. length of string is 256 octets. - -} WW_TAC_GETSTATUS, *PWW_TAC_GETSTATUS; - -// -// OID_WW_TAC_USER_HEADER -// -typedef NDIS_VAR_DATA_DESC WW_TAC_USERHEADER; // This will hold the user header - Max. 64 octets. -// -// OID_WW_ARD_SNDCP -// - -typedef struct _WW_ARD_SNDCP { - NDIS_VAR_DATA_DESC Version; // The version of SNDCP protocol supported. - - INT BlockSize; // The block size used for SNDCP - - INT Window; // The window size used in SNDCP - -} WW_ARD_SNDCP, *PWW_ARD_SNDCP; - -// -// OID_WW_ARD_TMLY_MSG -// -typedef BOOLEAN WW_ARD_CHANNEL_STATUS; // The current status of the inbound RF Channel. -// -// OID_WW_ARD_DATAGRAM -// - -typedef struct _WW_ARD_DATAGRAM { - BOOLEAN LoadLevel; // Byte that contains the load level info. - - INT SessionTime; // Datagram session time remaining. - - NDIS_VAR_DATA_DESC HostAddr; // Host address. - - NDIS_VAR_DATA_DESC THostAddr; // Test host address. - -} WW_ARD_DATAGRAM, *PWW_ARD_DATAGRAM; - -// -// OID_WW_CDPD_SPNI -// -typedef struct _WW_CDPD_SPNI { - UINT SPNI[10]; //10 16-bit service provider network IDs - - INT OperatingMode; // 0 = ignore SPNI, - // 1 = require SPNI from list, - // 2 = prefer SPNI from list. - // 3 = exclude SPNI from list. - -} WW_CDPD_SPNI, *PWW_CDPD_SPNI; - -// -// OID_WW_CDPD_WASI -// -typedef struct _WW_CDPD_WIDE_AREA_SERVICE_ID { - UINT WASI[10]; //10 16-bit wide area service IDs - - INT OperatingMode; // 0 = ignore WASI, - // 1 = Require WASI from list, - // 2 = prefer WASI from list - // 3 = exclude WASI from list. - -} WW_CDPD_WIDE_AREA_SERVICE_ID, *PWW_CDPD_WIDE_AREA_SERVICE_ID; - -// -// OID_WW_CDPD_AREA_COLOR -// -typedef INT WW_CDPD_AREA_COLOR; -// -// OID_WW_CDPD_TX_POWER_LEVEL -// -typedef UINT WW_CDPD_TX_POWER_LEVEL; -// -// OID_WW_CDPD_EID -// -typedef NDIS_VAR_DATA_DESC WW_CDPD_EID; -// -// OID_WW_CDPD_HEADER_COMPRESSION -// -typedef INT WW_CDPD_HEADER_COMPRESSION; // 0 = no header compression, - // 1 = always compress headers, - // 2 = compress headers if MD-IS does - // -1 = unknown -// -// OID_WW_CDPD_DATA_COMPRESSION -// - -typedef INT WW_CDPD_DATA_COMPRESSION; // 0 = no data compression, - // 1 = data compression enabled - // -1 = unknown -// -// OID_WW_CDPD_CHANNEL_SELECT -// - -typedef struct _WW_CDPD_CHANNEL_SELECT { - UINT ChannelID; // channel number - - UINT fixedDuration; // duration in seconds - -} WW_CDPD_CHANNEL_SELECT, *PWW_CDPD_CHANNEL_SELECT; - -// -// OID_WW_CDPD_CHANNEL_STATE -// -typedef enum _WW_CDPD_CHANNEL_STATE { - CDPDChannelNotAvail, - CDPDChannelScanning, - CDPDChannelInitAcquired, - CDPDChannelAcquired, - CDPDChannelSleeping, - CDPDChannelWaking, - CDPDChannelCSDialing, - CDPDChannelCSRedial, - CDPDChannelCSAnswering, - CDPDChannelCSConnected, - CDPDChannelCSSuspended -} WW_CDPD_CHANNEL_STATE, *PWW_CDPD_CHANNEL_STATE; - -// -// OID_WW_CDPD_NEI -// -typedef enum _WW_CDPD_NEI_FORMAT { - CDPDNeiIPv4, - CDPDNeiCLNP, - CDPDNeiIPv6 -} WW_CDPD_NEI_FORMAT, *PWW_CDPD_NEI_FORMAT; -typedef enum _WW_CDPD_NEI_TYPE { - CDPDNeiIndividual, - CDPDNeiMulticast, - CDPDNeiBroadcast -} WW_CDPD_NEI_TYPE; -typedef struct _WW_CDPD_NEI { - UINT uNeiIndex; - WW_CDPD_NEI_FORMAT NeiFormat; - WW_CDPD_NEI_TYPE NeiType; - WORD NeiGmid; // group member identifier, only - // meaningful if NeiType == - // CDPDNeiMulticast - - NDIS_VAR_DATA_DESC NeiAddress; -} WW_CDPD_NEI; - -// -// OID_WW_CDPD_NEI_STATE -// -typedef enum _WW_CDPD_NEI_STATE { - CDPDUnknown, - CDPDRegistered, - CDPDDeregistered -} WW_CDPD_NEI_STATE, *PWW_CDPD_NEI_STATE; -typedef enum _WW_CDPD_NEI_SUB_STATE { - CDPDPending, // Registration pending - CDPDNoReason, // Registration denied - no reason given - CDPDMDISNotCapable, // Registration denied - MD-IS not capable of - // handling M-ES at this time - CDPDNEINotAuthorized, // Registration denied - NEI is not authorized to - // use this subnetwork - CDPDInsufficientAuth, // Registration denied - M-ES gave insufficient - // authentication credentials - CDPDUnsupportedAuth, // Registration denied - M-ES gave unsupported - // authentication credentials - CDPDUsageExceeded, // Registration denied - NEI has exceeded usage - // limitations - CDPDDeniedThisNetwork // Registration denied on this network, service - // may be obtained on alternate Service Provider - // network -} WW_CDPD_NEI_SUB_STATE; -typedef struct _WW_CDPD_NEI_REG_STATE { - UINT uNeiIndex; - WW_CDPD_NEI_STATE NeiState; - WW_CDPD_NEI_SUB_STATE NeiSubState; -} WW_CDPD_NEI_REG_STATE, *PWW_CDPD_NEI_REG_STATE; - -// -// OID_WW_CDPD_SERVICE_PROVIDER_IDENTIFIER -// -typedef struct _WW_CDPD_SERVICE_PROVIDER_ID { - UINT SPI[10]; //10 16-bit service provider IDs - - INT OperatingMode; // 0 = ignore SPI, - // 1 = require SPI from list, - // 2 = prefer SPI from list. - // 3 = exclude SPI from list. - -} WW_CDPD_SERVICE_PROVIDER_ID, *PWW_CDPD_SERVICE_PROVIDER_ID; - -// -// OID_WW_CDPD_SLEEP_MODE -// -typedef INT WW_CDPD_SLEEP_MODE; -// -// OID_WW_CDPD_TEI -// -typedef ULONG WW_CDPD_TEI; -// -// OID_WW_CDPD_CIRCUIT_SWITCHED -// -typedef struct _WW_CDPD_CIRCUIT_SWITCHED { - INT service_preference; // -1 = unknown, - // 0 = always use packet switched CDPD, - // 1 = always use CS CDPD via AMPS, - // 2 = always use CS CDPD via PSTN, - // 3 = use circuit switched via AMPS only - // when packet switched is not available. - // 4 = use packet switched only when circuit - // switched via AMPS is not available. - // 5 = device manuf. defined service - // preference. - // 6 = device manuf. defined service - // preference. - - INT service_status; // -1 = unknown, - // 0 = packet switched CDPD, - // 1 = circuit switched CDPD via AMPS, - // 2 = circuit switched CDPD via PSTN. - - INT connect_rate; // CS connection bit rate (bits per second). - // 0 = no active connection, - // -1 = unknown - // Dial code last used to dial. - - NDIS_VAR_DATA_DESC dial_code[20]; - - UINT sid; // Current AMPS system ID - - INT a_b_side_selection; // -1 = unknown, - // 0 = no AMPS service - // 1 = AMPS "A" side channels selected - // 2 = AMPS "B" side channels selected - - INT AMPS_channel; // -1= unknown - // 0 = no AMPS service. - // 1-1023 = AMPS channel number in use - - UINT action; // 0 = no action - // 1 = suspend (hangup) - // 2 = dial - - // Default dial code for CS CDPD service - // encoded as specified in the CS CDPD - // implementor guidelines. - NDIS_VAR_DATA_DESC default_dial[20]; - - // Number for the CS CDPD network to call - // back the mobile, encoded as specified in - // the CS CDPD implementor guidelines. - NDIS_VAR_DATA_DESC call_back[20]; - - UINT sid_list[10]; // List of 10 16-bit preferred AMPS - // system IDs for CS CDPD. - - UINT inactivity_timer; // Wait time after last data before dropping - // call. - // 0-65535 = inactivity time limit (seconds). - - UINT receive_timer; // secs. per CS-CDPD Implementor Guidelines. - - UINT conn_resp_timer; // secs. per CS-CDPD Implementor Guidelines. - - UINT reconn_resp_timer; // secs. per CS-CDPD Implementor Guidelines. - - UINT disconn_timer; // secs. per CS-CDPD Implementor Guidelines. - - UINT NEI_reg_timer; // secs. per CS-CDPD Implementor Guidelines. - - UINT reconn_retry_timer; // secs. per CS-CDPD Implementor Guidelines. - - UINT link_reset_timer; // secs. per CS-CDPD Implementor Guidelines. - - UINT link_reset_ack_timer; // secs. per CS-CDPD Implementor Guidelines. - - UINT n401_retry_limit; // per CS-CDPD Implementor Guidelines. - - UINT n402_retry_limit; // per CS-CDPD Implementor Guidelines. - - UINT n404_retry_limit; // per CS-CDPD Implementor Guidelines. - - UINT n405_retry_limit; // per CS-CDPD Implementor Guidelines. - -} WW_CDPD_CIRCUIT_SWITCHED, *WW_PCDPD_CIRCUIT_SWITCHED; -typedef UINT WW_CDPD_RSSI; -// -// OID_WW_PIN_LOC_AUTHORIZE -// -typedef INT WW_PIN_AUTHORIZED; // 0 = unauthorized - // 1 = authorized - // -1 = unknown -// -// OID_WW_PIN_LAST_LOCATION -// OID_WW_PIN_LOC_FIX -// - -typedef struct _WW_PIN_LOCATION { - INT Latitude; // Latitude in hundredths of a second - - INT Longitude; // Longitude in hundredths of a second - - INT Altitude; // Altitude in feet - - INT FixTime; // Time of the location fix, since midnight, local time (of the - // current day), in tenths of a second - - INT NetTime; // Current local network time of the current day, since midnight, - // in tenths of a second - - INT LocQuality; // 0-100 = location quality - - INT LatReg; // Latitude registration offset, in hundredths of a second - - INT LongReg; // Longitude registration offset, in hundredths of a second - - INT GMTOffset; // Offset in minutes of the local time zone from GMT - -} WW_PIN_LOCATION, *PWW_PIN_LOCATION; - -// -// The following is set on a per-packet basis as OOB data with NdisClassWirelessWanMbxMailbox -// -typedef ULONG WW_MBX_MAILBOX_FLAG; // 1 = set mailbox flag, 0 = do not set mailbox flag -// -// OID_WW_MBX_SUBADDR -// - -typedef struct _WW_MBX_PMAN { - BOOLEAN ACTION; // 0 = Login PMAN, 1 = Logout PMAN - - UINT MAN; - UCHAR PASSWORD[8]; // Password should be null for Logout and indications. - // Maximum length of password is 8 chars. - -} WW_MBX_PMAN, *PWW_MBX_PMAN; - -// -// OID_WW_MBX_FLEXLIST -// -typedef struct _WW_MBX_FLEXLIST { - INT count; // Number of MAN entries used. - // -1=unknown. - - UINT MAN[7]; // List of MANs. - -} WW_MBX_FLEXLIST; - -// -// OID_WW_MBX_GROUPLIST -// -typedef struct _WW_MBX_GROUPLIST { - INT count; // Number of MAN entries used. - // -1=unknown. - - UINT MAN[15]; // List of MANs. - -} WW_MBX_GROUPLIST; - -// -// OID_WW_MBX_TRAFFIC_AREA -// -typedef enum _WW_MBX_TRAFFIC_AREA { - unknown_traffic_area, // The driver has no information about the current traffic area. - in_traffic_area, // Mobile unit has entered a subscribed traffic area. - in_auth_traffic_area, // Mobile unit is outside traffic area but is authorized. - unauth_traffic_area // Mobile unit is outside traffic area but is un-authorized. -} WW_MBX_TRAFFIC_AREA; - -// -// OID_WW_MBX_LIVE_DIE -// -typedef INT WW_MBX_LIVE_DIE; // 0 = DIE last received - // 1 = LIVE last received - // -1 = unknown -// -// OID_WW_MBX_TEMP_DEFAULTLIST -// - -typedef struct _WW_MBX_CHANNEL_PAIR { - UINT Mobile_Tx; - UINT Mobile_Rx; -} WW_MBX_CHANNEL_PAIR, *PWW_MBX_CHANNEL_PAIR; -typedef struct _WW_MBX_TEMPDEFAULTLIST { - UINT Length; - WW_MBX_CHANNEL_PAIR ChannelPair[1]; -} WW_MBX_TEMPDEFAULTLIST, *WW_PMBX_TEMPDEFAULTLIST; - -#endif // WIRELESS_WAN -#endif // _NTDDNDIS_ diff --git a/pcsx2/DEV9/Win32/afxresmw.h b/pcsx2/DEV9/Win32/afxresmw.h deleted file mode 100644 index 5b1a990135..0000000000 --- a/pcsx2/DEV9/Win32/afxresmw.h +++ /dev/null @@ -1,20 +0,0 @@ -/* PCSX2 - PS2 Emulator for PCs - * Copyright (C) 2002-2014 David Quintana [gigaherz] - * - * PCSX2 is free software: you can redistribute it and/or modify it under the terms - * of the GNU Lesser General Public License as published by the Free Software Found- - * ation, either version 3 of the License, or (at your option) any later version. - * - * PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; - * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR - * PURPOSE. See the GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along with PCSX2. - * If not, see . - */ - - -#include -#include - -#define IDC_STATIC (-1) diff --git a/pcsx2/DEV9/Win32/mtfifo.h b/pcsx2/DEV9/Win32/mtfifo.h deleted file mode 100644 index 7ee1c849dd..0000000000 --- a/pcsx2/DEV9/Win32/mtfifo.h +++ /dev/null @@ -1,85 +0,0 @@ -/* PCSX2 - PS2 Emulator for PCs - * Copyright (C) 2002-2014 David Quintana [gigaherz] - * - * PCSX2 is free software: you can redistribute it and/or modify it under the terms - * of the GNU Lesser General Public License as published by the Free Software Found- - * ation, either version 3 of the License, or (at your option) any later version. - * - * PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; - * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR - * PURPOSE. See the GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along with PCSX2. - * If not, see . - */ - -#pragma once -#include -//a simple, mt-safe fifo template class -template -class mtfifo -{ - struct container - { - container(container* n,T d) - { - next=n; - data=d; - } - container* next;T data; - }; - container* start; - container* end; - - CRITICAL_SECTION cs; -public: - mtfifo() - { - InitializeCriticalSection(&cs); - } - ~mtfifo() - { - //no need to destroy the CS? i cant remember realy .. ;p - } - void put(T data) - { - EnterCriticalSection(&cs); - if (end==0) - { - end=start=new container(0,data); - } - else - { - end=end->next=new container(0,data); - } - LeaveCriticalSection(&cs); - } - //Note, this is partialy mt-safe, the get may fail even if that returned false - bool empty(){ return start==0;} - bool get(T& rvi) - { - container* rv; - EnterCriticalSection(&cs); - if (start==0) - { - rv=0; //error - - - } - else - { - rv=start; - start=rv->next; - if (!start) - end=0; //last item - } - LeaveCriticalSection(&cs); - - if(!rv) - return false; - rvi=rv->data; - delete rv; - - return true; - } -}; \ No newline at end of file diff --git a/pcsx2/DEV9/Win32/net.cpp b/pcsx2/DEV9/Win32/net.cpp index 3853607c95..7fef7d2021 100644 --- a/pcsx2/DEV9/Win32/net.cpp +++ b/pcsx2/DEV9/Win32/net.cpp @@ -1,5 +1,5 @@ /* PCSX2 - PS2 Emulator for PCs - * Copyright (C) 2002-2014 David Quintana [gigaherz] + * Copyright (C) 2002-2010 PCSX2 Dev Team * * PCSX2 is free software: you can redistribute it and/or modify it under the terms * of the GNU Lesser General Public License as published by the Free Software Found- @@ -22,18 +22,18 @@ NetAdapter* nif; HANDLE rx_thread; -volatile bool RxRunning=false; +volatile bool RxRunning = false; //rx thread DWORD WINAPI NetRxThread(LPVOID lpThreadParameter) -{ +{ NetPacket tmp; - while(RxRunning) + while (RxRunning) { - while(rx_fifo_can_rx() && nif->recv(&tmp)) + while (rx_fifo_can_rx() && nif->recv(&tmp)) { rx_process(&tmp); } - + Sleep(10); } @@ -42,23 +42,23 @@ DWORD WINAPI NetRxThread(LPVOID lpThreadParameter) void tx_put(NetPacket* pkt) { - if (nif!=NULL) + if (nif != NULL) nif->send(pkt); //pkt must be copied if its not processed by here, since it can be allocated on the callers stack } void InitNet(NetAdapter* ad) { - nif=ad; - RxRunning=true; + nif = ad; + RxRunning = true; - rx_thread=CreateThread(0,0,NetRxThread,0,CREATE_SUSPENDED,0); + rx_thread = CreateThread(0, 0, NetRxThread, 0, CREATE_SUSPENDED, 0); - SetThreadPriority(rx_thread,THREAD_PRIORITY_HIGHEST); + SetThreadPriority(rx_thread, THREAD_PRIORITY_HIGHEST); ResumeThread(rx_thread); } void TermNet() { - if(RxRunning) + if (RxRunning) { RxRunning = false; emu_printf("Waiting for RX-net thread to terminate.."); @@ -68,4 +68,4 @@ void TermNet() delete nif; nif = NULL; } -} \ No newline at end of file +} diff --git a/pcsx2/DEV9/Win32/resource.h b/pcsx2/DEV9/Win32/resource.h index 43cdef498b..b43e1862c9 100644 --- a/pcsx2/DEV9/Win32/resource.h +++ b/pcsx2/DEV9/Win32/resource.h @@ -4,27 +4,27 @@ // #ifndef IDC_STATIC -#define IDC_STATIC -1 +#define IDC_STATIC -1 #endif -#define IDD_CONFDLG 101 -#define IDD_CONFIG 101 -#define IDD_ABOUT 103 -#define IDC_NAME 1000 -#define IDC_COMBO1 1007 -#define IDC_ETHDEV 1007 -#define IDC_BAYTYPE 1008 -#define IDC_ETHENABLED 1009 -#define IDC_HDDFILE 1010 -#define IDC_HDDENABLED 1011 +#define IDD_CONFDLG 101 +#define IDD_CONFIG 101 +#define IDD_ABOUT 103 +#define IDC_NAME 1000 +#define IDC_COMBO1 1007 +#define IDC_ETHDEV 1007 +#define IDC_BAYTYPE 1008 +#define IDC_ETHENABLED 1009 +#define IDC_HDDFILE 1010 +#define IDC_HDDENABLED 1011 // Next default values for new objects -// +// #ifdef APSTUDIO_INVOKED #ifndef APSTUDIO_READONLY_SYMBOLS -#define _APS_NEXT_RESOURCE_VALUE 105 -#define _APS_NEXT_COMMAND_VALUE 40001 -#define _APS_NEXT_CONTROL_VALUE 1011 -#define _APS_NEXT_SYMED_VALUE 101 +#define _APS_NEXT_RESOURCE_VALUE 105 +#define _APS_NEXT_COMMAND_VALUE 40001 +#define _APS_NEXT_CONTROL_VALUE 1011 +#define _APS_NEXT_SYMED_VALUE 101 #endif #endif diff --git a/pcsx2/DEV9/Win32/socks.c b/pcsx2/DEV9/Win32/socks.c index 5e0371a8d6..75cff95b61 100644 --- a/pcsx2/DEV9/Win32/socks.c +++ b/pcsx2/DEV9/Win32/socks.c @@ -1,5 +1,5 @@ /* PCSX2 - PS2 Emulator for PCs - * Copyright (C) 2002-2014 David Quintana [gigaherz] + * Copyright (C) 2002-2010 PCSX2 Dev Team * * PCSX2 is free software: you can redistribute it and/or modify it under the terms * of the GNU Lesser General Public License as published by the Free Software Found- diff --git a/pcsx2/DEV9/Win32/socks.h b/pcsx2/DEV9/Win32/socks.h index 138ebe3edc..2d7b8cc205 100644 --- a/pcsx2/DEV9/Win32/socks.h +++ b/pcsx2/DEV9/Win32/socks.h @@ -1,5 +1,5 @@ /* PCSX2 - PS2 Emulator for PCs - * Copyright (C) 2002-2014 David Quintana [gigaherz] + * Copyright (C) 2002-2010 PCSX2 Dev Team * * PCSX2 is free software: you can redistribute it and/or modify it under the terms * of the GNU Lesser General Public License as published by the Free Software Found- @@ -16,12 +16,12 @@ #ifndef __SOCKS_H__ #define __SOCKS_H__ -long sockOpen(char *Device); +long sockOpen(char* Device); void sockClose(); -long sockSendData(void *pData, int Size); -long sockRecvData(void *pData, int Size); +long sockSendData(void* pData, int Size); +long sockRecvData(void* pData, int Size); long sockGetDevicesNum(); -char *sockGetDevice(int index); -char *sockGetDeviceDesc(int index); +char* sockGetDevice(int index); +char* sockGetDeviceDesc(int index); #endif /* __SOCKS_H__*/ diff --git a/pcsx2/DEV9/Win32/tap-win32.cpp b/pcsx2/DEV9/Win32/tap-win32.cpp index 78a3831849..d39ced7d98 100644 --- a/pcsx2/DEV9/Win32/tap-win32.cpp +++ b/pcsx2/DEV9/Win32/tap-win32.cpp @@ -1,31 +1,18 @@ -/* - * TAP-Win32 -- A kernel driver to provide virtual tap device functionality - * on Windows. Originally derived from the CIPE-Win32 - * project by Damion K. Wilson, with extensive modifications by - * James Yonan. +/* PCSX2 - PS2 Emulator for PCs + * Copyright (C) 2002-2010 PCSX2 Dev Team * - * All source code which derives from the CIPE-Win32 project is - * Copyright (C) Damion K. Wilson, 2003, and is released under the - * GPL version 2 (see below). + * PCSX2 is free software: you can redistribute it and/or modify it under the terms + * of the GNU Lesser General Public License as published by the Free Software Found- + * ation, either version 3 of the License, or (at your option) any later version. * - * All other source code is Copyright (C) James Yonan, 2003-2004, - * and is released under the GPL version 2 (see below). + * PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; + * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR + * PURPOSE. See the GNU General Public License for more details. * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program (see the file COPYING included with this - * distribution); if not, write to the Free Software Foundation, Inc., - * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * You should have received a copy of the GNU General Public License along with PCSX2. + * If not, see . */ + #include #include #include @@ -37,18 +24,18 @@ // TAP IOCTLs //============= -#define TAP_CONTROL_CODE(request,method) \ - CTL_CODE (FILE_DEVICE_UNKNOWN, request, method, FILE_ANY_ACCESS) +#define TAP_CONTROL_CODE(request, method) \ + CTL_CODE(FILE_DEVICE_UNKNOWN, request, method, FILE_ANY_ACCESS) -#define TAP_IOCTL_GET_MAC TAP_CONTROL_CODE (1, METHOD_BUFFERED) -#define TAP_IOCTL_GET_VERSION TAP_CONTROL_CODE (2, METHOD_BUFFERED) -#define TAP_IOCTL_GET_MTU TAP_CONTROL_CODE (3, METHOD_BUFFERED) -#define TAP_IOCTL_GET_INFO TAP_CONTROL_CODE (4, METHOD_BUFFERED) -#define TAP_IOCTL_CONFIG_POINT_TO_POINT TAP_CONTROL_CODE (5, METHOD_BUFFERED) -#define TAP_IOCTL_SET_MEDIA_STATUS TAP_CONTROL_CODE (6, METHOD_BUFFERED) -#define TAP_IOCTL_CONFIG_DHCP_MASQ TAP_CONTROL_CODE (7, METHOD_BUFFERED) -#define TAP_IOCTL_GET_LOG_LINE TAP_CONTROL_CODE (8, METHOD_BUFFERED) -#define TAP_IOCTL_CONFIG_DHCP_SET_OPT TAP_CONTROL_CODE (9, METHOD_BUFFERED) +#define TAP_IOCTL_GET_MAC TAP_CONTROL_CODE(1, METHOD_BUFFERED) +#define TAP_IOCTL_GET_VERSION TAP_CONTROL_CODE(2, METHOD_BUFFERED) +#define TAP_IOCTL_GET_MTU TAP_CONTROL_CODE(3, METHOD_BUFFERED) +#define TAP_IOCTL_GET_INFO TAP_CONTROL_CODE(4, METHOD_BUFFERED) +#define TAP_IOCTL_CONFIG_POINT_TO_POINT TAP_CONTROL_CODE(5, METHOD_BUFFERED) +#define TAP_IOCTL_SET_MEDIA_STATUS TAP_CONTROL_CODE(6, METHOD_BUFFERED) +#define TAP_IOCTL_CONFIG_DHCP_MASQ TAP_CONTROL_CODE(7, METHOD_BUFFERED) +#define TAP_IOCTL_GET_LOG_LINE TAP_CONTROL_CODE(8, METHOD_BUFFERED) +#define TAP_IOCTL_CONFIG_DHCP_SET_OPT TAP_CONTROL_CODE(9, METHOD_BUFFERED) //================= // Registry keys @@ -63,7 +50,7 @@ //====================== #define USERMODEDEVICEDIR "\\\\.\\Global\\" -#define TAPSUFFIX ".tap" +#define TAPSUFFIX ".tap" #define TAP_COMPONENT_ID "tap0901" @@ -211,56 +198,60 @@ vector* GetTapAdapters() //Set the connection status static int TAPSetStatus(HANDLE handle, int status) { - unsigned long len = 0; + unsigned long len = 0; - return DeviceIoControl(handle, TAP_IOCTL_SET_MEDIA_STATUS, - &status, sizeof (status), - &status, sizeof (status), &len, NULL); + return DeviceIoControl(handle, TAP_IOCTL_SET_MEDIA_STATUS, + &status, sizeof(status), + &status, sizeof(status), &len, NULL); } //Open the TAP adapter and set the connection to enabled :) -HANDLE TAPOpen(const char *device_guid) +HANDLE TAPOpen(const char* device_guid) { char device_path[256]; - - struct { - unsigned long major; - unsigned long minor; - unsigned long debug; - } version; - LONG version_len; - _snprintf (device_path, sizeof(device_path), "%s%s%s", - USERMODEDEVICEDIR, - device_guid, - TAPSUFFIX); + struct + { + unsigned long major; + unsigned long minor; + unsigned long debug; + } version; + LONG version_len; - HANDLE handle = CreateFile ( - device_path, - GENERIC_READ | GENERIC_WRITE, - 0, - 0, - OPEN_EXISTING, - FILE_ATTRIBUTE_SYSTEM | FILE_FLAG_OVERLAPPED, - 0 ); + _snprintf(device_path, sizeof(device_path), "%s%s%s", + USERMODEDEVICEDIR, + device_guid, + TAPSUFFIX); - if (handle == INVALID_HANDLE_VALUE) { - return INVALID_HANDLE_VALUE; - } + HANDLE handle = CreateFile( + device_path, + GENERIC_READ | GENERIC_WRITE, + 0, + 0, + OPEN_EXISTING, + FILE_ATTRIBUTE_SYSTEM | FILE_FLAG_OVERLAPPED, + 0); - BOOL bret = DeviceIoControl(handle, TAP_IOCTL_GET_VERSION, - &version, sizeof (version), - &version, sizeof (version), (LPDWORD)&version_len, NULL); + if (handle == INVALID_HANDLE_VALUE) + { + return INVALID_HANDLE_VALUE; + } - if (bret == FALSE) { - CloseHandle(handle); - return INVALID_HANDLE_VALUE; - } + BOOL bret = DeviceIoControl(handle, TAP_IOCTL_GET_VERSION, + &version, sizeof(version), + &version, sizeof(version), (LPDWORD)&version_len, NULL); - if (!TAPSetStatus(handle, TRUE)) { - return INVALID_HANDLE_VALUE; - } + if (bret == FALSE) + { + CloseHandle(handle); + return INVALID_HANDLE_VALUE; + } - return handle; + if (!TAPSetStatus(handle, TRUE)) + { + return INVALID_HANDLE_VALUE; + } + + return handle; } @@ -273,69 +264,67 @@ TAPAdapter::TAPAdapter() if (htap == INVALID_HANDLE_VALUE) SysMessage("Can't open Device '%s'\n", config.Eth); - read.Offset = 0; - read.OffsetHigh = 0; - read.hEvent = CreateEvent(NULL, FALSE, FALSE, NULL); + read.Offset = 0; + read.OffsetHigh = 0; + read.hEvent = CreateEvent(NULL, FALSE, FALSE, NULL); write.Offset = 0; write.OffsetHigh = 0; write.hEvent = CreateEvent(NULL, FALSE, FALSE, NULL); isActive = true; - - } bool TAPAdapter::blocks() { - return true; //we use blocking io + return true; //we use blocking io } bool TAPAdapter::isInitialised() { return (htap != NULL); } -u8 broadcast_adddrrrr[6]={0xFF,0xFF,0xFF,0xFF,0xFF,0xFF}; +u8 broadcast_adddrrrr[6] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}; //gets a packet.rv :true success bool TAPAdapter::recv(NetPacket* pkt) { DWORD read_size; BOOL result = ReadFile(htap, - pkt->buffer, - sizeof(pkt->buffer), - &read_size, - &read); + pkt->buffer, + sizeof(pkt->buffer), + &read_size, + &read); - if (!result) { - DWORD dwError = GetLastError(); - if (dwError == ERROR_IO_PENDING) + if (!result) + { + DWORD dwError = GetLastError(); + if (dwError == ERROR_IO_PENDING) + { + WaitForSingleObject(read.hEvent, INFINITE); + result = GetOverlappedResult(htap, &read, + &read_size, FALSE); + if (!result) { - WaitForSingleObject(read.hEvent, INFINITE); - result = GetOverlappedResult( htap, &read, - &read_size, FALSE); - if (!result) - { - - } - } - else { - - } - } + } + } + else + { + } + } if (result) { - if((memcmp(pkt->buffer,dev9.eeprom,6)!=0)&&(memcmp(pkt->buffer,&broadcast_adddrrrr,6)!=0)) + if ((memcmp(pkt->buffer, dev9.eeprom, 6) != 0) && (memcmp(pkt->buffer, &broadcast_adddrrrr, 6) != 0)) { //ignore strange packets return false; } - if(memcmp(pkt->buffer+6,dev9.eeprom,6)==0) + if (memcmp(pkt->buffer + 6, dev9.eeprom, 6) == 0) { //avoid pcap looping packets return false; } - pkt->size=read_size; + pkt->size = read_size; return true; } else @@ -346,31 +335,31 @@ bool TAPAdapter::send(NetPacket* pkt) { DWORD writen; BOOL result = WriteFile(htap, - pkt->buffer, - pkt->size, - &writen, - &write); + pkt->buffer, + pkt->size, + &writen, + &write); - if (!result) { - DWORD dwError = GetLastError(); - if (dwError == ERROR_IO_PENDING) + if (!result) + { + DWORD dwError = GetLastError(); + if (dwError == ERROR_IO_PENDING) + { + WaitForSingleObject(write.hEvent, INFINITE); + result = GetOverlappedResult(htap, &write, + &writen, FALSE); + if (!result) { - WaitForSingleObject(write.hEvent, INFINITE); - result = GetOverlappedResult( htap, &write, - &writen, FALSE); - if (!result) - { - - } - } - else { - - } - } + } + } + else + { + } + } if (result) { - if (writen!=pkt->size) + if (writen != pkt->size) return false; return true; @@ -390,7 +379,7 @@ TAPAdapter::~TAPAdapter() } //i leave these for reference, in case we need msth :p -#if 0==666 +#if 0 == 666 //====================== // Compile time configuration //====================== @@ -785,7 +774,7 @@ static int tap_win32_write(tap_win32_overlapped_t *overlapped, if (!result) { switch (error = GetLastError()) { - case ERROR_IO_PENDING: + case ERROR_IO_PENDING: #ifndef TUN_ASYNCHRONOUS_WRITES WaitForSingleObject(overlapped->write_event, INFINITE); #endif diff --git a/pcsx2/DEV9/Win32/tap.h b/pcsx2/DEV9/Win32/tap.h index 57c5e0e82d..fd840a1c55 100644 --- a/pcsx2/DEV9/Win32/tap.h +++ b/pcsx2/DEV9/Win32/tap.h @@ -1,5 +1,5 @@ /* PCSX2 - PS2 Emulator for PCs - * Copyright (C) 2002-2014 David Quintana [gigaherz] + * Copyright (C) 2002-2010 PCSX2 Dev Team * * PCSX2 is free software: you can redistribute it and/or modify it under the terms * of the GNU Lesser General Public License as published by the Free Software Found- diff --git a/pcsx2/DEV9/Win32/vl.h b/pcsx2/DEV9/Win32/vl.h deleted file mode 100644 index 618519fca8..0000000000 --- a/pcsx2/DEV9/Win32/vl.h +++ /dev/null @@ -1,1419 +0,0 @@ -/* - * QEMU System Emulator header - * - * Copyright (c) 2003 Fabrice Bellard - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef VL_H -#define VL_H - -/* we put basic includes here to avoid repeating them in device drivers */ -#include -#include -#include -#include -//#include -typedef signed char int8_t; -typedef signed short int16_t; -typedef signed int int32_t; - -typedef unsigned char uint8_t; -typedef unsigned short uint16_t; -typedef unsigned int uint32_t; - -//typedef signed long int intptr_t; -//typedef unsigned long int uintptr_t; - -typedef signed long long int64_t; -typedef unsigned long long uint64_t; -typedef signed long long int intmax_t; -typedef unsigned long long int uintmax_t; - - -#include -#include -#include -#include -//#include -#include -#include - -#ifndef O_LARGEFILE -#define O_LARGEFILE 0 -#endif -#ifndef O_BINARY -#define O_BINARY 0 -#endif - -#ifndef ENOMEDIUM -#define ENOMEDIUM ENODEV -#endif - -#ifdef _WIN32 -#include -#define fsync _commit -#define lseek _lseeki64 -#define ENOTSUP 4096 -extern int qemu_ftruncate64(int, int64_t); -#define ftruncate qemu_ftruncate64 - - -static inline char *realpath(const char *path, char *resolved_path) -{ - _fullpath(resolved_path, path, _MAX_PATH); - return resolved_path; -} - -#define PRId64 "I64d" -#define PRIx64 "I64x" -#define PRIu64 "I64u" -#define PRIo64 "I64o" -#endif - -#ifdef QEMU_TOOL - -/* we use QEMU_TOOL in the command line tools which do not depend on - the target CPU type */ -#include "config-host.h" -#include -#include "osdep.h" -#include "bswap.h" - -#else - -//#include "audio/audio.h" -//#include "cpu.h" - -#endif /* !defined(QEMU_TOOL) */ - -#ifndef glue -#define xglue(x, y) x ## y -#define glue(x, y) xglue(x, y) -#define stringify(s) tostring(s) -#define tostring(s) #s -#endif - -#ifndef MIN -#define MIN(a, b) (((a) < (b)) ? (a) : (b)) -#endif -#ifndef MAX -#define MAX(a, b) (((a) > (b)) ? (a) : (b)) -#endif - -/* cutils.c */ -void pstrcpy(char *buf, int buf_size, const char *str); -char *pstrcat(char *buf, int buf_size, const char *s); -int strstart(const char *str, const char *val, const char **ptr); -int stristart(const char *str, const char *val, const char **ptr); - -/* vl.c */ -uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c); - -void hw_error(const char *fmt, ...); - -extern const char *bios_dir; - -extern int vm_running; - -typedef struct vm_change_state_entry VMChangeStateEntry; -typedef void VMChangeStateHandler(void *opaque, int running); -typedef void VMStopHandler(void *opaque, int reason); - -VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb, - void *opaque); -void qemu_del_vm_change_state_handler(VMChangeStateEntry *e); - -int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque); -void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque); - -void vm_start(void); -void vm_stop(int reason); - -typedef void QEMUResetHandler(void *opaque); - -void qemu_register_reset(QEMUResetHandler *func, void *opaque); -void qemu_system_reset_request(void); -void qemu_system_shutdown_request(void); -void qemu_system_powerdown_request(void); -#if !defined(TARGET_SPARC) -// Please implement a power failure function to signal the OS -#define qemu_system_powerdown() do{}while(0) -#else -void qemu_system_powerdown(void); -#endif - -void main_loop_wait(int timeout); - -extern int ram_size; -extern int bios_size; -extern int rtc_utc; -extern int cirrus_vga_enabled; -extern int graphic_width; -extern int graphic_height; -extern int graphic_depth; -extern const char *keyboard_layout; -extern int kqemu_allowed; -extern int win2k_install_hack; -extern int usb_enabled; -extern int smp_cpus; -extern int no_quit; -extern int semihosting_enabled; -extern int autostart; - -#define MAX_OPTION_ROMS 16 -extern const char *option_rom[MAX_OPTION_ROMS]; -extern int nb_option_roms; - -/* XXX: make it dynamic */ -#if defined (TARGET_PPC) || defined (TARGET_SPARC64) -#define BIOS_SIZE ((512 + 32) * 1024) -#elif defined(TARGET_MIPS) -#define BIOS_SIZE (4 * 1024 * 1024) -#else -#define BIOS_SIZE ((256 + 64) * 1024) -#endif - -/* keyboard/mouse support */ - -#define MOUSE_EVENT_LBUTTON 0x01 -#define MOUSE_EVENT_RBUTTON 0x02 -#define MOUSE_EVENT_MBUTTON 0x04 - -typedef void QEMUPutKBDEvent(void *opaque, int keycode); -typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state); - -typedef struct QEMUPutMouseEntry { - QEMUPutMouseEvent *qemu_put_mouse_event; - void *qemu_put_mouse_event_opaque; - int qemu_put_mouse_event_absolute; - char *qemu_put_mouse_event_name; - - /* used internally by qemu for handling mice */ - struct QEMUPutMouseEntry *next; -} QEMUPutMouseEntry; - -void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque); -QEMUPutMouseEntry *qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, - void *opaque, int absolute, - const char *name); -void qemu_remove_mouse_event_handler(QEMUPutMouseEntry *entry); - -void kbd_put_keycode(int keycode); -void kbd_mouse_event(int dx, int dy, int dz, int buttons_state); -int kbd_mouse_is_absolute(void); - -void do_info_mice(void); -void do_mouse_set(int index); - -/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx - constants) */ -#define QEMU_KEY_ESC1(c) ((c) | 0xe100) -#define QEMU_KEY_BACKSPACE 0x007f -#define QEMU_KEY_UP QEMU_KEY_ESC1('A') -#define QEMU_KEY_DOWN QEMU_KEY_ESC1('B') -#define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C') -#define QEMU_KEY_LEFT QEMU_KEY_ESC1('D') -#define QEMU_KEY_HOME QEMU_KEY_ESC1(1) -#define QEMU_KEY_END QEMU_KEY_ESC1(4) -#define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5) -#define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6) -#define QEMU_KEY_DELETE QEMU_KEY_ESC1(3) - -#define QEMU_KEY_CTRL_UP 0xe400 -#define QEMU_KEY_CTRL_DOWN 0xe401 -#define QEMU_KEY_CTRL_LEFT 0xe402 -#define QEMU_KEY_CTRL_RIGHT 0xe403 -#define QEMU_KEY_CTRL_HOME 0xe404 -#define QEMU_KEY_CTRL_END 0xe405 -#define QEMU_KEY_CTRL_PAGEUP 0xe406 -#define QEMU_KEY_CTRL_PAGEDOWN 0xe407 - -void kbd_put_keysym(int keysym); - -/* async I/O support */ - -typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size); -typedef int IOCanRWHandler(void *opaque); -typedef void IOHandler(void *opaque); - -int qemu_set_fd_handler2(int fd, - IOCanRWHandler *fd_read_poll, - IOHandler *fd_read, - IOHandler *fd_write, - void *opaque); -int qemu_set_fd_handler(int fd, - IOHandler *fd_read, - IOHandler *fd_write, - void *opaque); - -/* Polling handling */ - -/* return TRUE if no sleep should be done afterwards */ -typedef int PollingFunc(void *opaque); - -int qemu_add_polling_cb(PollingFunc *func, void *opaque); -void qemu_del_polling_cb(PollingFunc *func, void *opaque); - -#ifdef _WIN32 -/* Wait objects handling */ -typedef void WaitObjectFunc(void *opaque); - -int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque); -void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque); -#endif - -typedef struct QEMUBH QEMUBH; - -/* character device */ - -#define CHR_EVENT_BREAK 0 /* serial break char */ -#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */ -#define CHR_EVENT_RESET 2 /* new connection established */ - - -#define CHR_IOCTL_SERIAL_SET_PARAMS 1 -typedef struct { - int speed; - int parity; - int data_bits; - int stop_bits; -} QEMUSerialSetParams; - -#define CHR_IOCTL_SERIAL_SET_BREAK 2 - -#define CHR_IOCTL_PP_READ_DATA 3 -#define CHR_IOCTL_PP_WRITE_DATA 4 -#define CHR_IOCTL_PP_READ_CONTROL 5 -#define CHR_IOCTL_PP_WRITE_CONTROL 6 -#define CHR_IOCTL_PP_READ_STATUS 7 - -typedef void IOEventHandler(void *opaque, int event); - -typedef struct CharDriverState { - int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len); - void (*chr_update_read_handler)(struct CharDriverState *s); - int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg); - IOEventHandler *chr_event; - IOCanRWHandler *chr_can_read; - IOReadHandler *chr_read; - void *handler_opaque; - void (*chr_send_event)(struct CharDriverState *chr, int event); - void (*chr_close)(struct CharDriverState *chr); - void *opaque; - QEMUBH *bh; -} CharDriverState; - -CharDriverState *qemu_chr_open(const char *filename); -void qemu_chr_printf(CharDriverState *s, const char *fmt, ...); -int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len); -void qemu_chr_send_event(CharDriverState *s, int event); -void qemu_chr_add_handlers(CharDriverState *s, - IOCanRWHandler *fd_can_read, - IOReadHandler *fd_read, - IOEventHandler *fd_event, - void *opaque); -int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg); -void qemu_chr_reset(CharDriverState *s); -int qemu_chr_can_read(CharDriverState *s); -void qemu_chr_read(CharDriverState *s, uint8_t *buf, int len); - -/* consoles */ - -typedef struct DisplayState DisplayState; -typedef struct TextConsole TextConsole; - -typedef void (*vga_hw_update_ptr)(void *); -typedef void (*vga_hw_invalidate_ptr)(void *); -typedef void (*vga_hw_screen_dump_ptr)(void *, const char *); - -TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update, - vga_hw_invalidate_ptr invalidate, - vga_hw_screen_dump_ptr screen_dump, - void *opaque); -void vga_hw_update(void); -void vga_hw_invalidate(void); -void vga_hw_screen_dump(const char *filename); - -int is_graphic_console(void); -CharDriverState *text_console_init(DisplayState *ds); -void console_select(unsigned int index); - -/* serial ports */ - -#define MAX_SERIAL_PORTS 4 - -extern CharDriverState *serial_hds[MAX_SERIAL_PORTS]; - -/* parallel ports */ - -#define MAX_PARALLEL_PORTS 3 - -extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS]; - -/* VLANs support */ - -typedef struct VLANClientState VLANClientState; - -struct VLANClientState { - IOReadHandler *fd_read; - /* Packets may still be sent if this returns zero. It's used to - rate-limit the slirp code. */ - IOCanRWHandler *fd_can_read; - void *opaque; - struct VLANClientState *next; - struct VLANState *vlan; - char info_str[256]; -}; - -typedef struct VLANState { - int id; - VLANClientState *first_client; - struct VLANState *next; -} VLANState; - -VLANState *qemu_find_vlan(int id); -VLANClientState *qemu_new_vlan_client(VLANState *vlan, - IOReadHandler *fd_read, - IOCanRWHandler *fd_can_read, - void *opaque); -int qemu_can_send_packet(VLANClientState *vc); -void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size); -void qemu_handler_true(void *opaque); - -void do_info_network(void); - -/* TAP win32 */ -int tap_win32_init(VLANState *vlan, const char *ifname); - -/* NIC info */ - -#define MAX_NICS 8 - -typedef struct NICInfo { - uint8_t macaddr[6]; - const char *model; - VLANState *vlan; -} NICInfo; - -extern int nb_nics; -extern NICInfo nd_table[MAX_NICS]; - -/* timers */ - -typedef struct QEMUClock QEMUClock; -typedef struct QEMUTimer QEMUTimer; -typedef void QEMUTimerCB(void *opaque); - -/* The real time clock should be used only for stuff which does not - change the virtual machine state, as it is run even if the virtual - machine is stopped. The real time clock has a frequency of 1000 - Hz. */ -extern QEMUClock *rt_clock; - -/* The virtual clock is only run during the emulation. It is stopped - when the virtual machine is stopped. Virtual timers use a high - precision clock, usually cpu cycles (use ticks_per_sec). */ -extern QEMUClock *vm_clock; - -int64_t qemu_get_clock(QEMUClock *clock); - -QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque); -void qemu_free_timer(QEMUTimer *ts); -void qemu_del_timer(QEMUTimer *ts); -void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time); -int qemu_timer_pending(QEMUTimer *ts); - -extern int64_t ticks_per_sec; -extern int pit_min_timer_count; - -int64_t cpu_get_ticks(void); -void cpu_enable_ticks(void); -void cpu_disable_ticks(void); - -/* VM Load/Save */ - -typedef struct QEMUFile QEMUFile; - -QEMUFile *qemu_fopen(const char *filename, const char *mode); -void qemu_fflush(QEMUFile *f); -void qemu_fclose(QEMUFile *f); -void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size); -void qemu_put_byte(QEMUFile *f, int v); -void qemu_put_be16(QEMUFile *f, unsigned int v); -void qemu_put_be32(QEMUFile *f, unsigned int v); -void qemu_put_be64(QEMUFile *f, uint64_t v); -int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size); -int qemu_get_byte(QEMUFile *f); -unsigned int qemu_get_be16(QEMUFile *f); -unsigned int qemu_get_be32(QEMUFile *f); -uint64_t qemu_get_be64(QEMUFile *f); - -static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv) -{ - qemu_put_be64(f, *pv); -} - -static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv) -{ - qemu_put_be32(f, *pv); -} - -static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv) -{ - qemu_put_be16(f, *pv); -} - -static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv) -{ - qemu_put_byte(f, *pv); -} - -static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv) -{ - *pv = qemu_get_be64(f); -} - -static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv) -{ - *pv = qemu_get_be32(f); -} - -static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv) -{ - *pv = qemu_get_be16(f); -} - -static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv) -{ - *pv = qemu_get_byte(f); -} - -#if TARGET_LONG_BITS == 64 -#define qemu_put_betl qemu_put_be64 -#define qemu_get_betl qemu_get_be64 -#define qemu_put_betls qemu_put_be64s -#define qemu_get_betls qemu_get_be64s -#else -#define qemu_put_betl qemu_put_be32 -#define qemu_get_betl qemu_get_be32 -#define qemu_put_betls qemu_put_be32s -#define qemu_get_betls qemu_get_be32s -#endif - -int64_t qemu_ftell(QEMUFile *f); -int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence); - -typedef void SaveStateHandler(QEMUFile *f, void *opaque); -typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id); - -int register_savevm(const char *idstr, - int instance_id, - int version_id, - SaveStateHandler *save_state, - LoadStateHandler *load_state, - void *opaque); -void qemu_get_timer(QEMUFile *f, QEMUTimer *ts); -void qemu_put_timer(QEMUFile *f, QEMUTimer *ts); - -void cpu_save(QEMUFile *f, void *opaque); -int cpu_load(QEMUFile *f, void *opaque, int version_id); - -void do_savevm(const char *name); -void do_loadvm(const char *name); -void do_delvm(const char *name); -void do_info_snapshots(void); - -/* bottom halves */ -typedef void QEMUBHFunc(void *opaque); - -QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque); -void qemu_bh_schedule(QEMUBH *bh); -void qemu_bh_cancel(QEMUBH *bh); -void qemu_bh_delete(QEMUBH *bh); -int qemu_bh_poll(void); - -/* block.c */ -typedef struct BlockDriverState BlockDriverState; -typedef struct BlockDriver BlockDriver; - -extern BlockDriver bdrv_raw; -extern BlockDriver bdrv_host_device; -extern BlockDriver bdrv_cow; -extern BlockDriver bdrv_qcow; -extern BlockDriver bdrv_vmdk; -extern BlockDriver bdrv_cloop; -extern BlockDriver bdrv_dmg; -extern BlockDriver bdrv_bochs; -extern BlockDriver bdrv_vpc; -extern BlockDriver bdrv_vvfat; -extern BlockDriver bdrv_qcow2; - -typedef struct BlockDriverInfo { - /* in bytes, 0 if irrelevant */ - int cluster_size; - /* offset at which the VM state can be saved (0 if not possible) */ - int64_t vm_state_offset; -} BlockDriverInfo; - -typedef struct QEMUSnapshotInfo { - char id_str[128]; /* unique snapshot id */ - /* the following fields are informative. They are not needed for - the consistency of the snapshot */ - char name[256]; /* user choosen name */ - uint32_t vm_state_size; /* VM state info size */ - uint32_t date_sec; /* UTC date of the snapshot */ - uint32_t date_nsec; - uint64_t vm_clock_nsec; /* VM clock relative to boot */ -} QEMUSnapshotInfo; - -#define BDRV_O_RDONLY 0x0000 -#define BDRV_O_RDWR 0x0002 -#define BDRV_O_ACCESS 0x0003 -#define BDRV_O_CREAT 0x0004 /* create an empty file */ -#define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */ -#define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to - use a disk image format on top of - it (default for - bdrv_file_open()) */ - -void bdrv_init(void); -BlockDriver *bdrv_find_format(const char *format_name); -int bdrv_create(BlockDriver *drv, - const char *filename, int64_t size_in_sectors, - const char *backing_file, int flags); -BlockDriverState *bdrv_new(const char *device_name); -void bdrv_delete(BlockDriverState *bs); -int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags); -int bdrv_open(BlockDriverState *bs, const char *filename, int flags); -int bdrv_open2(BlockDriverState *bs, const char *filename, int flags, - BlockDriver *drv); -void bdrv_close(BlockDriverState *bs); -int bdrv_read(BlockDriverState *bs, int64_t sector_num, - uint8_t *buf, int nb_sectors); -int bdrv_write(BlockDriverState *bs, int64_t sector_num, - const uint8_t *buf, int nb_sectors); -int bdrv_pread(BlockDriverState *bs, int64_t offset, - void *buf, int count); -int bdrv_pwrite(BlockDriverState *bs, int64_t offset, - const void *buf, int count); -int bdrv_truncate(BlockDriverState *bs, int64_t offset); -int64_t bdrv_getlength(BlockDriverState *bs); -void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr); -int bdrv_commit(BlockDriverState *bs); -void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size); -/* async block I/O */ -typedef struct BlockDriverAIOCB BlockDriverAIOCB; -typedef void BlockDriverCompletionFunc(void *opaque, int ret); - -BlockDriverAIOCB *bdrv_aio_read(BlockDriverState *bs, int64_t sector_num, - uint8_t *buf, int nb_sectors, - BlockDriverCompletionFunc *cb, void *opaque); -BlockDriverAIOCB *bdrv_aio_write(BlockDriverState *bs, int64_t sector_num, - const uint8_t *buf, int nb_sectors, - BlockDriverCompletionFunc *cb, void *opaque); -void bdrv_aio_cancel(BlockDriverAIOCB *acb); - -void qemu_aio_init(void); -void qemu_aio_poll(void); -void qemu_aio_flush(void); -void qemu_aio_wait_start(void); -void qemu_aio_wait(void); -void qemu_aio_wait_end(void); - -/* Ensure contents are flushed to disk. */ -void bdrv_flush(BlockDriverState *bs); - -#define BDRV_TYPE_HD 0 -#define BDRV_TYPE_CDROM 1 -#define BDRV_TYPE_FLOPPY 2 -#define BIOS_ATA_TRANSLATION_AUTO 0 -#define BIOS_ATA_TRANSLATION_NONE 1 -#define BIOS_ATA_TRANSLATION_LBA 2 -#define BIOS_ATA_TRANSLATION_LARGE 3 -#define BIOS_ATA_TRANSLATION_RECHS 4 - -void bdrv_set_geometry_hint(BlockDriverState *bs, - int cyls, int heads, int secs); -void bdrv_set_type_hint(BlockDriverState *bs, int type); -void bdrv_set_translation_hint(BlockDriverState *bs, int translation); -void bdrv_get_geometry_hint(BlockDriverState *bs, - int *pcyls, int *pheads, int *psecs); -int bdrv_get_type_hint(BlockDriverState *bs); -int bdrv_get_translation_hint(BlockDriverState *bs); -int bdrv_is_removable(BlockDriverState *bs); -int bdrv_is_read_only(BlockDriverState *bs); -int bdrv_is_inserted(BlockDriverState *bs); -int bdrv_media_changed(BlockDriverState *bs); -int bdrv_is_locked(BlockDriverState *bs); -void bdrv_set_locked(BlockDriverState *bs, int locked); -void bdrv_eject(BlockDriverState *bs, int eject_flag); -void bdrv_set_change_cb(BlockDriverState *bs, - void (*change_cb)(void *opaque), void *opaque); -void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size); -void bdrv_info(void); -BlockDriverState *bdrv_find(const char *name); -void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque); -int bdrv_is_encrypted(BlockDriverState *bs); -int bdrv_set_key(BlockDriverState *bs, const char *key); -void bdrv_iterate_format(void (*it)(void *opaque, const char *name), - void *opaque); -const char *bdrv_get_device_name(BlockDriverState *bs); -int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num, - const uint8_t *buf, int nb_sectors); -int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi); - -void bdrv_get_backing_filename(BlockDriverState *bs, - char *filename, int filename_size); -int bdrv_snapshot_create(BlockDriverState *bs, - QEMUSnapshotInfo *sn_info); -int bdrv_snapshot_goto(BlockDriverState *bs, - const char *snapshot_id); -int bdrv_snapshot_delete(BlockDriverState *bs, const char *snapshot_id); -int bdrv_snapshot_list(BlockDriverState *bs, - QEMUSnapshotInfo **psn_info); -char *bdrv_snapshot_dump(char *buf, int buf_size, QEMUSnapshotInfo *sn); - -char *get_human_readable_size(char *buf, int buf_size, int64_t size); -int path_is_absolute(const char *path); -void path_combine(char *dest, int dest_size, - const char *base_path, - const char *filename); - -#ifndef QEMU_TOOL - -typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size, - int boot_device, - DisplayState *ds, const char **fd_filename, int snapshot, - const char *kernel_filename, const char *kernel_cmdline, - const char *initrd_filename); - -typedef struct QEMUMachine { - const char *name; - const char *desc; - QEMUMachineInitFunc *init; - struct QEMUMachine *next; -} QEMUMachine; - -int qemu_register_machine(QEMUMachine *m); - -typedef void SetIRQFunc(void *opaque, int irq_num, int level); -typedef void IRQRequestFunc(void *opaque, int level); - -#ifdef ASDDasdasda0011 -/* ISA bus */ - -extern target_phys_addr_t isa_mem_base; - -typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data); -typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address); - -int register_ioport_read(int start, int length, int size, - IOPortReadFunc *func, void *opaque); -int register_ioport_write(int start, int length, int size, - IOPortWriteFunc *func, void *opaque); -void isa_unassign_ioport(int start, int length); - -void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size); - -/* PCI bus */ - -extern target_phys_addr_t pci_mem_base; - -typedef struct PCIBus PCIBus; -typedef struct PCIDevice PCIDevice; - -typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, - uint32_t address, uint32_t data, int len); -typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev, - uint32_t address, int len); -typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, - uint32_t addr, uint32_t size, int type); - -#define PCI_ADDRESS_SPACE_MEM 0x00 -#define PCI_ADDRESS_SPACE_IO 0x01 -#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08 - -typedef struct PCIIORegion { - uint32_t addr; /* current PCI mapping address. -1 means not mapped */ - uint32_t size; - uint8_t type; - PCIMapIORegionFunc *map_func; -} PCIIORegion; - -#define PCI_ROM_SLOT 6 -#define PCI_NUM_REGIONS 7 - -#define PCI_DEVICES_MAX 64 - -#define PCI_VENDOR_ID 0x00 /* 16 bits */ -#define PCI_DEVICE_ID 0x02 /* 16 bits */ -#define PCI_COMMAND 0x04 /* 16 bits */ -#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */ -#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ -#define PCI_CLASS_DEVICE 0x0a /* Device class */ -#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */ -#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */ -#define PCI_MIN_GNT 0x3e /* 8 bits */ -#define PCI_MAX_LAT 0x3f /* 8 bits */ - -struct PCIDevice { - /* PCI config space */ - uint8_t config[256]; - - /* the following fields are read only */ - PCIBus *bus; - int devfn; - char name[64]; - PCIIORegion io_regions[PCI_NUM_REGIONS]; - - /* do not access the following fields */ - PCIConfigReadFunc *config_read; - PCIConfigWriteFunc *config_write; - /* ??? This is a PC-specific hack, and should be removed. */ - int irq_index; - - /* Current IRQ levels. Used internally by the generic PCI code. */ - int irq_state[4]; -}; - -PCIDevice *pci_register_device(PCIBus *bus, const char *name, - int instance_size, int devfn, - PCIConfigReadFunc *config_read, - PCIConfigWriteFunc *config_write); - -void pci_register_io_region(PCIDevice *pci_dev, int region_num, - uint32_t size, int type, - PCIMapIORegionFunc *map_func); - -void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level); - -uint32_t pci_default_read_config(PCIDevice *d, - uint32_t address, int len); -void pci_default_write_config(PCIDevice *d, - uint32_t address, uint32_t val, int len); -void pci_device_save(PCIDevice *s, QEMUFile *f); -int pci_device_load(PCIDevice *s, QEMUFile *f); - -typedef void (*pci_set_irq_fn)(void *pic, int irq_num, int level); -typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num); -PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, - void *pic, int devfn_min, int nirq); - -void pci_nic_init(PCIBus *bus, NICInfo *nd, int devfn); -void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len); -uint32_t pci_data_read(void *opaque, uint32_t addr, int len); -int pci_bus_num(PCIBus *s); -void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d)); - -void pci_info(void); -PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id, - pci_map_irq_fn map_irq, const char *name); - -/* prep_pci.c */ -PCIBus *pci_prep_init(void); - -/* grackle_pci.c */ -PCIBus *pci_grackle_init(uint32_t base, void *pic); - -/* unin_pci.c */ -PCIBus *pci_pmac_init(void *pic); - -/* apb_pci.c */ -PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base, - void *pic); - -PCIBus *pci_vpb_init(void *pic, int irq, int realview); - -/* piix_pci.c */ -PCIBus *i440fx_init(PCIDevice **pi440fx_state); -void i440fx_set_smm(PCIDevice *d, int val); -int piix3_init(PCIBus *bus, int devfn); -void i440fx_init_memory_mappings(PCIDevice *d); - -int piix4_init(PCIBus *bus, int devfn); - -/* openpic.c */ -typedef struct openpic_t openpic_t; -void openpic_set_irq(void *opaque, int n_IRQ, int level); -openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus, - CPUState **envp); - -/* heathrow_pic.c */ -typedef struct HeathrowPICS HeathrowPICS; -void heathrow_pic_set_irq(void *opaque, int num, int level); -HeathrowPICS *heathrow_pic_init(int *pmem_index); - -/* gt64xxx.c */ -PCIBus *pci_gt64120_init(void *pic); - -#ifdef HAS_AUDIO -struct soundhw { - const char *name; - const char *descr; - int enabled; - int isa; - union { - int (*init_isa) (AudioState *s); - int (*init_pci) (PCIBus *bus, AudioState *s); - } init; -}; - -extern struct soundhw soundhw[]; -#endif - -/* vga.c */ - -#define VGA_RAM_SIZE (8192 * 1024) - -struct DisplayState { - uint8_t *data; - int linesize; - int depth; - int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */ - int width; - int height; - void *opaque; - - void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h); - void (*dpy_resize)(struct DisplayState *s, int w, int h); - void (*dpy_refresh)(struct DisplayState *s); - void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h); -}; - -static inline void dpy_update(DisplayState *s, int x, int y, int w, int h) -{ - s->dpy_update(s, x, y, w, h); -} - -static inline void dpy_resize(DisplayState *s, int w, int h) -{ - s->dpy_resize(s, w, h); -} - -int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base, - unsigned long vga_ram_offset, int vga_ram_size); -int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, - unsigned long vga_ram_offset, int vga_ram_size, - unsigned long vga_bios_offset, int vga_bios_size); - -/* cirrus_vga.c */ -void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, - unsigned long vga_ram_offset, int vga_ram_size); -void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base, - unsigned long vga_ram_offset, int vga_ram_size); - -/* sdl.c */ -void sdl_display_init(DisplayState *ds, int full_screen); - -/* cocoa.m */ -void cocoa_display_init(DisplayState *ds, int full_screen); - -/* vnc.c */ -void vnc_display_init(DisplayState *ds, const char *display); -void do_info_vnc(void); - -/* x_keymap.c */ -extern uint8_t _translate_keycode(const int key); - -/* ide.c */ -#define MAX_DISKS 4 - -extern BlockDriverState *bs_table[MAX_DISKS + 1]; - -void isa_ide_init(int iobase, int iobase2, int irq, - BlockDriverState *hd0, BlockDriverState *hd1); -void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table, - int secondary_ide_enabled); -void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn); -int pmac_ide_init (BlockDriverState **hd_table, - SetIRQFunc *set_irq, void *irq_opaque, int irq); - -/* cdrom.c */ -int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track); -int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num); - -/* es1370.c */ -int es1370_init (PCIBus *bus, AudioState *s); - -/* sb16.c */ -int SB16_init (AudioState *s); - -/* adlib.c */ -int Adlib_init (AudioState *s); - -/* gus.c */ -int GUS_init (AudioState *s); - -/* dma.c */ -typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size); -int DMA_get_channel_mode (int nchan); -int DMA_read_memory (int nchan, void *buf, int pos, int size); -int DMA_write_memory (int nchan, void *buf, int pos, int size); -void DMA_hold_DREQ (int nchan); -void DMA_release_DREQ (int nchan); -void DMA_schedule(int nchan); -void DMA_run (void); -void DMA_init (int high_page_enable); -void DMA_register_channel (int nchan, - DMA_transfer_handler transfer_handler, - void *opaque); -/* fdc.c */ -#define MAX_FD 2 -extern BlockDriverState *fd_table[MAX_FD]; - -typedef struct fdctrl_t fdctrl_t; - -fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, - uint32_t io_base, - BlockDriverState **fds); -int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num); - -/* ne2000.c */ - -void isa_ne2000_init(int base, int irq, NICInfo *nd); -void pci_ne2000_init(PCIBus *bus, NICInfo *nd, int devfn); - -/* rtl8139.c */ - -void pci_rtl8139_init(PCIBus *bus, NICInfo *nd, int devfn); - -/* pcnet.c */ - -void pci_pcnet_init(PCIBus *bus, NICInfo *nd, int devfn); -void pcnet_h_reset(void *opaque); -void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque); - - -/* pckbd.c */ - -void kbd_init(void); - -/* mc146818rtc.c */ - -typedef struct RTCState RTCState; - -RTCState *rtc_init(int base, int irq); -void rtc_set_memory(RTCState *s, int addr, int val); -void rtc_set_date(RTCState *s, const struct tm *tm); - -/* serial.c */ - -typedef struct SerialState SerialState; -SerialState *serial_init(SetIRQFunc *set_irq, void *opaque, - int base, int irq, CharDriverState *chr); -SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque, - target_ulong base, int it_shift, - int irq, CharDriverState *chr); - -/* parallel.c */ - -typedef struct ParallelState ParallelState; -ParallelState *parallel_init(int base, int irq, CharDriverState *chr); - -/* i8259.c */ - -typedef struct PicState2 PicState2; -extern PicState2 *isa_pic; -void pic_set_irq(int irq, int level); -void pic_set_irq_new(void *opaque, int irq, int level); -PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque); -void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func, - void *alt_irq_opaque); -int pic_read_irq(PicState2 *s); -void pic_update_irq(PicState2 *s); -uint32_t pic_intack_read(PicState2 *s); -void pic_info(void); -void irq_info(void); - -/* APIC */ -typedef struct IOAPICState IOAPICState; - -int apic_init(CPUState *env); -int apic_get_interrupt(CPUState *env); -IOAPICState *ioapic_init(void); -void ioapic_set_irq(void *opaque, int vector, int level); - -/* i8254.c */ - -#define PIT_FREQ 1193182 - -typedef struct PITState PITState; - -PITState *pit_init(int base, int irq); -void pit_set_gate(PITState *pit, int channel, int val); -int pit_get_gate(PITState *pit, int channel); -int pit_get_initial_count(PITState *pit, int channel); -int pit_get_mode(PITState *pit, int channel); -int pit_get_out(PITState *pit, int channel, int64_t current_time); - -/* pcspk.c */ -void pcspk_init(PITState *); -int pcspk_audio_init(AudioState *); - -#include "hw/smbus.h" - -/* acpi.c */ -extern int acpi_enabled; -void piix4_pm_init(PCIBus *bus, int devfn); -void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); -void acpi_bios_init(void); - -/* smbus_eeprom.c */ -SMBusDevice *smbus_eeprom_device_init(uint8_t addr, uint8_t *buf); - -/* pc.c */ -extern QEMUMachine pc_machine; -extern QEMUMachine isapc_machine; -extern int fd_bootchk; - -void ioport_set_a20(int enable); -int ioport_get_a20(void); - -/* ppc.c */ -extern QEMUMachine prep_machine; -extern QEMUMachine core99_machine; -extern QEMUMachine heathrow_machine; - -/* mips_r4k.c */ -extern QEMUMachine mips_machine; - -/* mips_malta.c */ -extern QEMUMachine mips_malta_machine; - -/* mips_int */ -extern void cpu_mips_irq_request(void *opaque, int irq, int level); - -/* mips_timer.c */ -extern void cpu_mips_clock_init(CPUState *); -extern void cpu_mips_irqctrl_init (void); - -/* shix.c */ -extern QEMUMachine shix_machine; - -#ifdef TARGET_PPC -ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq); -#endif -void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val); - -extern CPUWriteMemoryFunc *PPC_io_write[]; -extern CPUReadMemoryFunc *PPC_io_read[]; -void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val); - -/* sun4m.c */ -extern QEMUMachine sun4m_machine; -void pic_set_irq_cpu(int irq, int level, unsigned int cpu); - -/* iommu.c */ -void *iommu_init(uint32_t addr); -void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr, - uint8_t *buf, int len, int is_write); -static inline void sparc_iommu_memory_read(void *opaque, - target_phys_addr_t addr, - uint8_t *buf, int len) -{ - sparc_iommu_memory_rw(opaque, addr, buf, len, 0); -} - -static inline void sparc_iommu_memory_write(void *opaque, - target_phys_addr_t addr, - uint8_t *buf, int len) -{ - sparc_iommu_memory_rw(opaque, addr, buf, len, 1); -} - -/* tcx.c */ -void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base, - unsigned long vram_offset, int vram_size, int width, int height); - -/* slavio_intctl.c */ -void *slavio_intctl_init(); -void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env); -void slavio_pic_info(void *opaque); -void slavio_irq_info(void *opaque); -void slavio_pic_set_irq(void *opaque, int irq, int level); -void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu); - -/* loader.c */ -int get_image_size(const char *filename); -int load_image(const char *filename, uint8_t *addr); -int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry); -int load_aout(const char *filename, uint8_t *addr); - -/* slavio_timer.c */ -void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu); - -/* slavio_serial.c */ -SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2); -void slavio_serial_ms_kbd_init(int base, int irq); - -/* slavio_misc.c */ -void *slavio_misc_init(uint32_t base, int irq); -void slavio_set_power_fail(void *opaque, int power_failing); - -/* esp.c */ -void esp_scsi_attach(void *opaque, BlockDriverState *bd, int id); -void *esp_init(BlockDriverState **bd, uint32_t espaddr, void *dma_opaque); -void esp_reset(void *opaque); - -/* sparc32_dma.c */ -void *sparc32_dma_init(uint32_t daddr, int espirq, int leirq, void *iommu, - void *intctl); -void ledma_set_irq(void *opaque, int isr); -void ledma_memory_read(void *opaque, target_phys_addr_t addr, - uint8_t *buf, int len, int do_bswap); -void ledma_memory_write(void *opaque, target_phys_addr_t addr, - uint8_t *buf, int len, int do_bswap); -void espdma_raise_irq(void *opaque); -void espdma_clear_irq(void *opaque); -void espdma_memory_read(void *opaque, uint8_t *buf, int len); -void espdma_memory_write(void *opaque, uint8_t *buf, int len); -void sparc32_dma_set_reset_data(void *opaque, void *esp_opaque, - void *lance_opaque); - -/* cs4231.c */ -void cs_init(target_phys_addr_t base, int irq, void *intctl); - -/* sun4u.c */ -extern QEMUMachine sun4u_machine; - -/* NVRAM helpers */ -#include "hw/m48t59.h" - -void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value); -uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr); -void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value); -uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr); -void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value); -uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr); -void NVRAM_set_string (m48t59_t *nvram, uint32_t addr, - const unsigned char *str, uint32_t max); -int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max); -void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr, - uint32_t start, uint32_t count); -int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size, - const unsigned char *arch, - uint32_t RAM_size, int boot_device, - uint32_t kernel_image, uint32_t kernel_size, - const char *cmdline, - uint32_t initrd_image, uint32_t initrd_size, - uint32_t NVRAM_image, - int width, int height, int depth); - -/* adb.c */ - -#define MAX_ADB_DEVICES 16 - -#define ADB_MAX_OUT_LEN 16 - -typedef struct ADBDevice ADBDevice; - -/* buf = NULL means polling */ -typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out, - const uint8_t *buf, int len); -typedef int ADBDeviceReset(ADBDevice *d); - -struct ADBDevice { - struct ADBBusState *bus; - int devaddr; - int handler; - ADBDeviceRequest *devreq; - ADBDeviceReset *devreset; - void *opaque; -}; - -typedef struct ADBBusState { - ADBDevice devices[MAX_ADB_DEVICES]; - int nb_devices; - int poll_index; -} ADBBusState; - -int adb_request(ADBBusState *s, uint8_t *buf_out, - const uint8_t *buf, int len); -int adb_poll(ADBBusState *s, uint8_t *buf_out); - -ADBDevice *adb_register_device(ADBBusState *s, int devaddr, - ADBDeviceRequest *devreq, - ADBDeviceReset *devreset, - void *opaque); -void adb_kbd_init(ADBBusState *bus); -void adb_mouse_init(ADBBusState *bus); - -/* cuda.c */ - -extern ADBBusState adb_bus; -int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq); - -#include "hw/usb.h" - -/* usb ports of the VM */ - -void qemu_register_usb_port(USBPort *port, void *opaque, int index, - usb_attachfn attach); - -#define VM_USB_HUB_SIZE 8 - -void do_usb_add(const char *devname); -void do_usb_del(const char *devname); -void usb_info(void); - -/* scsi-disk.c */ -enum scsi_reason { - SCSI_REASON_DONE, /* Command complete. */ - SCSI_REASON_DATA /* Transfer complete, more data required. */ -}; - -typedef struct SCSIDevice SCSIDevice; -typedef void (*scsi_completionfn)(void *opaque, int reason, uint32_t tag, - uint32_t arg); - -SCSIDevice *scsi_disk_init(BlockDriverState *bdrv, - int tcq, - scsi_completionfn completion, - void *opaque); -void scsi_disk_destroy(SCSIDevice *s); - -int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun); -/* SCSI data transfers are asynchrnonous. However, unlike the block IO - layer the completion routine may be called directly by - scsi_{read,write}_data. */ -void scsi_read_data(SCSIDevice *s, uint32_t tag); -int scsi_write_data(SCSIDevice *s, uint32_t tag); -void scsi_cancel_io(SCSIDevice *s, uint32_t tag); -uint8_t *scsi_get_buf(SCSIDevice *s, uint32_t tag); - -/* lsi53c895a.c */ -void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id); -void *lsi_scsi_init(PCIBus *bus, int devfn); - -/* integratorcp.c */ -extern QEMUMachine integratorcp926_machine; -extern QEMUMachine integratorcp1026_machine; - -/* versatilepb.c */ -extern QEMUMachine versatilepb_machine; -extern QEMUMachine versatileab_machine; - -/* realview.c */ -extern QEMUMachine realview_machine; - -/* ps2.c */ -void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg); -void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg); -void ps2_write_mouse(void *, int val); -void ps2_write_keyboard(void *, int val); -uint32_t ps2_read_data(void *); -void ps2_queue(void *, int b); -void ps2_keyboard_set_translation(void *opaque, int mode); - -/* smc91c111.c */ -void smc91c111_init(NICInfo *, uint32_t, void *, int); - -/* pl110.c */ -void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int); - -/* pl011.c */ -void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr); - -/* pl050.c */ -void pl050_init(uint32_t base, void *pic, int irq, int is_mouse); - -/* pl080.c */ -void *pl080_init(uint32_t base, void *pic, int irq, int nchannels); - -/* pl190.c */ -void *pl190_init(uint32_t base, void *parent, int irq, int fiq); - -/* arm-timer.c */ -void sp804_init(uint32_t base, void *pic, int irq); -void icp_pit_init(uint32_t base, void *pic, int irq); - -/* arm_sysctl.c */ -void arm_sysctl_init(uint32_t base, uint32_t sys_id); - -/* arm_gic.c */ -void *arm_gic_init(uint32_t base, void *parent, int parent_irq); - -/* arm_boot.c */ - -void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename, - const char *kernel_cmdline, const char *initrd_filename, - int board_id); - -/* sh7750.c */ -struct SH7750State; - -struct SH7750State *sh7750_init(CPUState * cpu); - -typedef struct { - /* The callback will be triggered if any of the designated lines change */ - uint16_t portamask_trigger; - uint16_t portbmask_trigger; - /* Return 0 if no action was taken */ - int (*port_change_cb) (uint16_t porta, uint16_t portb, - uint16_t * periph_pdtra, - uint16_t * periph_portdira, - uint16_t * periph_pdtrb, - uint16_t * periph_portdirb); -} sh7750_io_device; - -int sh7750_register_io_device(struct SH7750State *s, - sh7750_io_device * device); -/* tc58128.c */ -int tc58128_init(struct SH7750State *s, char *zone1, char *zone2); - -/* NOR flash devices */ -typedef struct pflash_t pflash_t; - -pflash_t *pflash_register (target_ulong base, ram_addr_t off, - BlockDriverState *bs, - target_ulong sector_len, int nb_blocs, int width, - uint16_t id0, uint16_t id1, - uint16_t id2, uint16_t id3); - -#include "gdbstub.h" - -#endif /* defined(QEMU_TOOL) */ - -/* monitor.c */ -void monitor_init(CharDriverState *hd, int show_banner); -void term_puts(const char *str); -void term_vprintf(const char *fmt, va_list ap); -void term_printf(const char *fmt, ...); -void term_print_filename(const char *filename); -void term_flush(void); -void term_print_help(void); -void monitor_readline(const char *prompt, int is_password, - char *buf, int buf_size); - -/* readline.c */ -typedef void ReadLineFunc(void *opaque, const char *str); - -extern int completion_index; -void add_completion(const char *str); -void readline_handle_byte(int ch); -void readline_find_completion(const char *cmdline); -const char *readline_get_history(unsigned int index); -void readline_start(const char *prompt, int is_password, - ReadLineFunc *readline_func, void *opaque); - -void kqemu_record_dump(void); -#endif - -#endif /* VL_H */ diff --git a/pcsx2/DEV9/ata.h b/pcsx2/DEV9/ata.h index b1745e1317..e733d48bba 100644 --- a/pcsx2/DEV9/ata.h +++ b/pcsx2/DEV9/ata.h @@ -1,5 +1,5 @@ /* PCSX2 - PS2 Emulator for PCs - * Copyright (C) 2002-2014 David Quintana [gigaherz] + * Copyright (C) 2002-2010 PCSX2 Dev Team * * PCSX2 is free software: you can redistribute it and/or modify it under the terms * of the GNU Lesser General Public License as published by the Free Software Found- @@ -19,12 +19,12 @@ void ata_init(); void ata_term(); -template +template void ata_write(u32 addr, u32 value); -template +template u8 ata_read(u32 addr); EXPORT_C_(void) -ata_readDMA8Mem(u32 *pMem, int size); +ata_readDMA8Mem(u32* pMem, int size); EXPORT_C_(void) -ata_writeDMA8Mem(u32 *pMem, int size); +ata_writeDMA8Mem(u32* pMem, int size); diff --git a/pcsx2/DEV9/flash.cpp b/pcsx2/DEV9/flash.cpp index 5093b10a4a..728dbc8bf6 100644 --- a/pcsx2/DEV9/flash.cpp +++ b/pcsx2/DEV9/flash.cpp @@ -1,5 +1,5 @@ /* PCSX2 - PS2 Emulator for PCs - * Copyright (C) 2002-2014 David Quintana [gigaherz] + * Copyright (C) 2002-2010 PCSX2 Dev Team * * PCSX2 is free software: you can redistribute it and/or modify it under the terms * of the GNU Lesser General Public License as published by the Free Software Found- @@ -18,253 +18,328 @@ //#include #include "DEV9.h" -#define PAGE_SIZE_BITS 9 -#define PAGE_SIZE (1<>2), page+PAGE_SIZE+0*3);//(ECC_SIZE>>2)); - xfromman_call20_calculateXors(page + 1*(PAGE_SIZE>>2), page+PAGE_SIZE+1*3);//(ECC_SIZE>>2)); - xfromman_call20_calculateXors(page + 2*(PAGE_SIZE>>2), page+PAGE_SIZE+2*3);//(ECC_SIZE>>2)); - xfromman_call20_calculateXors(page + 3*(PAGE_SIZE>>2), page+PAGE_SIZE+3*3);//(ECC_SIZE>>2)); +static void calculateECC(u8 page[PAGE_SIZE_ECC]) +{ + memset(page + PAGE_SIZE, 0x00, ECC_SIZE); + xfromman_call20_calculateXors(page + 0 * (PAGE_SIZE >> 2), page + PAGE_SIZE + 0 * 3); //(ECC_SIZE>>2)); + xfromman_call20_calculateXors(page + 1 * (PAGE_SIZE >> 2), page + PAGE_SIZE + 1 * 3); //(ECC_SIZE>>2)); + xfromman_call20_calculateXors(page + 2 * (PAGE_SIZE >> 2), page + PAGE_SIZE + 2 * 3); //(ECC_SIZE>>2)); + xfromman_call20_calculateXors(page + 3 * (PAGE_SIZE >> 2), page + PAGE_SIZE + 3 * 3); //(ECC_SIZE>>2)); } -static const char* getCmdName(u32 cmd){ - switch(cmd) { - case SM_CMD_READ1: return "READ1"; - case SM_CMD_READ2: return "READ2"; - case SM_CMD_READ3: return "READ3"; - case SM_CMD_RESET: return "RESET"; - case SM_CMD_WRITEDATA: return "WRITEDATA"; - case SM_CMD_PROGRAMPAGE: return "PROGRAMPAGE"; - case SM_CMD_ERASEBLOCK: return "ERASEBLOCK"; - case SM_CMD_ERASECONFIRM: return "ERASECONFIRM"; - case SM_CMD_GETSTATUS: return "GETSTATUS"; - case SM_CMD_READID: return "READID"; - default: return "unknown"; +static const char* getCmdName(u32 cmd) +{ + switch (cmd) + { + case SM_CMD_READ1: + return "READ1"; + case SM_CMD_READ2: + return "READ2"; + case SM_CMD_READ3: + return "READ3"; + case SM_CMD_RESET: + return "RESET"; + case SM_CMD_WRITEDATA: + return "WRITEDATA"; + case SM_CMD_PROGRAMPAGE: + return "PROGRAMPAGE"; + case SM_CMD_ERASEBLOCK: + return "ERASEBLOCK"; + case SM_CMD_ERASECONFIRM: + return "ERASECONFIRM"; + case SM_CMD_GETSTATUS: + return "GETSTATUS"; + case SM_CMD_READID: + return "READID"; + default: + return "unknown"; } } -void FLASHinit(){ - FILE *fd; +void FLASHinit() +{ + FILE* fd; - id= FLASH_ID_64MBIT; - counter= 0; - addrbyte= 0; + id = FLASH_ID_64MBIT; + counter = 0; + addrbyte = 0; address = 0; memset(data, 0xFF, PAGE_SIZE); calculateECC(data); ctrl = FLASH_PP_READY; - - fd=fopen("flash.dat", "rb"); - if (fd != NULL){ + + fd = fopen("flash.dat", "rb"); + if (fd != NULL) + { size_t ret; ret = fread(file, 1, CARD_SIZE_ECC, fd); - if (ret != CARD_SIZE_ECC) { DEV9_LOG("Reading error."); } + if (ret != CARD_SIZE_ECC) + { + DEV9_LOG("Reading error."); + } fclose(fd); - }else + } + else memset(file, 0xFF, CARD_SIZE_ECC); } - u32 FLASHread32(u32 addr, int size) { - u32 value, refill= 0; +u32 FLASHread32(u32 addr, int size) +{ + u32 value, refill = 0; - switch(addr) { - case FLASH_R_DATA: - memcpy(&value, &data[counter], size); - counter += size; - DEV9_LOG("*FLASH DATA %dbit read 0x%08lX %s\n", size*8, value, (ctrl & FLASH_PP_READ) ? "READ_ENABLE" : "READ_DISABLE"); - if (cmd == SM_CMD_READ3){ - if (counter >= PAGE_SIZE_ECC){ - counter= PAGE_SIZE; - refill= 1; + switch (addr) + { + case FLASH_R_DATA: + memcpy(&value, &data[counter], size); + counter += size; + DEV9_LOG("*FLASH DATA %dbit read 0x%08lX %s\n", size * 8, value, (ctrl & FLASH_PP_READ) ? "READ_ENABLE" : "READ_DISABLE"); + if (cmd == SM_CMD_READ3) + { + if (counter >= PAGE_SIZE_ECC) + { + counter = PAGE_SIZE; + refill = 1; + } } - }else{ - if ( (ctrl & FLASH_PP_NOECC) && (counter >= PAGE_SIZE)){ - counter %= PAGE_SIZE; - refill= 1; - }else - if (!(ctrl & FLASH_PP_NOECC) && (counter >= PAGE_SIZE_ECC)){ - counter %= PAGE_SIZE_ECC; - refill= 1; + else + { + if ((ctrl & FLASH_PP_NOECC) && (counter >= PAGE_SIZE)) + { + counter %= PAGE_SIZE; + refill = 1; + } + else if (!(ctrl & FLASH_PP_NOECC) && (counter >= PAGE_SIZE_ECC)) + { + counter %= PAGE_SIZE_ECC; + refill = 1; + } } - } - if (refill){ - ctrl &= ~FLASH_PP_READY; - address += PAGE_SIZE; - address %= CARD_SIZE; - memcpy(data, file+(address>>PAGE_SIZE_BITS)*PAGE_SIZE_ECC, PAGE_SIZE); - calculateECC(data); // calculate ECC; should be in the file already - ctrl |= FLASH_PP_READY; - } - - return value; - - case FLASH_R_CMD: - DEV9_LOG("*FLASH CMD %dbit read %s DENIED\n", size*8, getCmdName(cmd)); - return cmd; - - case FLASH_R_ADDR: - DEV9_LOG("*FLASH ADDR %dbit read DENIED\n", size*8); - return 0; - - case FLASH_R_CTRL: - DEV9_LOG("*FLASH CTRL %dbit read 0x%08lX\n", size*8, ctrl); - return ctrl; - - case FLASH_R_ID: - if (cmd == SM_CMD_READID){ - DEV9_LOG("*FLASH ID %dbit read 0x%08lX\n", size*8, id); - return id;//0x98=Toshiba/0xEC=Samsung maker code should be returned first - }else - if (cmd == SM_CMD_GETSTATUS){ - value= 0x80 | ((ctrl & 1) << 6); // 0:0=pass, 6:ready/busy, 7:1=not protected - DEV9_LOG("*FLASH STATUS %dbit read 0x%08lX\n", size*8, value); - return value; - }//else fall off - return 0; - - default: - DEV9_LOG("*FLASH Unknown %dbit read at address %lx\n", size*8, addr); - return 0; - } -} - -void FLASHwrite32(u32 addr, u32 value, int size) { - - switch(addr & 0x1FFFFFFF) { - case FLASH_R_DATA: - - DEV9_LOG("*FLASH DATA %dbit write 0x%08lX %s\n", size*8, value, (ctrl & FLASH_PP_WRITE) ? "WRITE_ENABLE" : "WRITE_DISABLE"); - memcpy(&data[counter], &value, size); - counter += size; - counter %= PAGE_SIZE_ECC;//should not get past the last byte, but at the end - break; - - case FLASH_R_CMD: - if (!(ctrl & FLASH_PP_READY)){ - if ((value != SM_CMD_GETSTATUS) && (value != SM_CMD_RESET)){ - DEV9_LOG("*FLASH CMD %dbit write %s ILLEGAL in busy mode - IGNORED\n", size*8, getCmdName(value)); - break; - } - } - if (cmd == SM_CMD_WRITEDATA){ - if ((value != SM_CMD_PROGRAMPAGE) && (value != SM_CMD_RESET)){ - DEV9_LOG("*FLASH CMD %dbit write %s ILLEGAL after WRITEDATA cmd - IGNORED\n", size*8, getCmdName(value)); - ctrl &= ~FLASH_PP_READY;//go busy, reset is needed - break; - } - } - DEV9_LOG("*FLASH CMD %dbit write %s\n", size*8, getCmdName(value)); - switch (value){ // A8 bit is encoded in READ cmd;) - case SM_CMD_READ1: counter= 0; if (cmd != SM_CMD_GETSTATUS) address= counter; addrbyte= 0; break; - case SM_CMD_READ2: counter= PAGE_SIZE/2; if (cmd != SM_CMD_GETSTATUS) address= counter; addrbyte= 0; break; - case SM_CMD_READ3: counter= PAGE_SIZE; if (cmd != SM_CMD_GETSTATUS) address= counter; addrbyte= 0; break; - case SM_CMD_RESET: FLASHinit(); break; - case SM_CMD_WRITEDATA: counter= 0; address= counter; addrbyte= 0; break; - case SM_CMD_ERASEBLOCK: counter= 0; memset(data, 0xFF, PAGE_SIZE); address= counter; addrbyte= 1; break; - case SM_CMD_PROGRAMPAGE: //fall - case SM_CMD_ERASECONFIRM: - ctrl &= ~FLASH_PP_READY; - calculateECC(data); - memcpy(file+(address/PAGE_SIZE)*PAGE_SIZE_ECC, data, PAGE_SIZE_ECC); - /*write2file*/ - ctrl |= FLASH_PP_READY; break; - case SM_CMD_GETSTATUS: break; - case SM_CMD_READID: counter= 0; address= counter; addrbyte= 0; break; - default: - ctrl &= ~FLASH_PP_READY; - return;//ignore any other command; go busy, reset is needed - } - cmd= value; - break; - - case FLASH_R_ADDR: - DEV9_LOG("*FLASH ADDR %dbit write 0x%08lX\n", size*8, value); - address |= (value & 0xFF) << (addrbyte == 0 ? 0 : (1 + 8 * addrbyte)); - addrbyte++; - DEV9_LOG("*FLASH ADDR = 0x%08lX (addrbyte=%d)\n", address, addrbyte); - if (!(value & 0x100)){ // address is complete - if ((cmd == SM_CMD_READ1) || (cmd == SM_CMD_READ2) || (cmd == SM_CMD_READ3)) { + if (refill) + { ctrl &= ~FLASH_PP_READY; - memcpy(data, file+(address>>PAGE_SIZE_BITS)*PAGE_SIZE_ECC, PAGE_SIZE); - calculateECC(data); // calculate ECC; should be in the file already + address += PAGE_SIZE; + address %= CARD_SIZE; + memcpy(data, file + (address >> PAGE_SIZE_BITS) * PAGE_SIZE_ECC, PAGE_SIZE); + calculateECC(data); // calculate ECC; should be in the file already ctrl |= FLASH_PP_READY; } - addrbyte= 0; // address reset + + return value; + + case FLASH_R_CMD: + DEV9_LOG("*FLASH CMD %dbit read %s DENIED\n", size * 8, getCmdName(cmd)); + return cmd; + + case FLASH_R_ADDR: + DEV9_LOG("*FLASH ADDR %dbit read DENIED\n", size * 8); + return 0; + + case FLASH_R_CTRL: + DEV9_LOG("*FLASH CTRL %dbit read 0x%08lX\n", size * 8, ctrl); + return ctrl; + + case FLASH_R_ID: + if (cmd == SM_CMD_READID) { - u32 bytes, pages, blocks; - - blocks = address / BLOCK_SIZE; - pages = address-(blocks*BLOCK_SIZE); - bytes = pages % PAGE_SIZE; - pages = pages / PAGE_SIZE; - DEV9_LOG("*FLASH ADDR = 0x%08lX (%d:%d:%d) (addrbyte=%d) FINAL\n", address, blocks, pages, bytes, addrbyte); + DEV9_LOG("*FLASH ID %dbit read 0x%08lX\n", size * 8, id); + return id; //0x98=Toshiba/0xEC=Samsung maker code should be returned first } - } - break; - - case FLASH_R_CTRL: - DEV9_LOG("*FLASH CTRL %dbit write 0x%08lX\n", size*8, value); - ctrl = (ctrl & FLASH_PP_READY) | (value & ~FLASH_PP_READY); - break; + else if (cmd == SM_CMD_GETSTATUS) + { + value = 0x80 | ((ctrl & 1) << 6); // 0:0=pass, 6:ready/busy, 7:1=not protected + DEV9_LOG("*FLASH STATUS %dbit read 0x%08lX\n", size * 8, value); + return value; + } //else fall off + return 0; - case FLASH_R_ID: - DEV9_LOG("*FLASH ID %dbit write 0x%08lX DENIED :P\n", size*8, value); - break; - - default: - DEV9_LOG("*FLASH Unkwnown %dbit write at address 0x%08lX= 0x%08lX IGNORED\n", size*8, addr, value); - break; + default: + DEV9_LOG("*FLASH Unknown %dbit read at address %lx\n", size * 8, addr); + return 0; } } -static unsigned char xor_table[256]={ - 0x00, 0x87, 0x96, 0x11, 0xA5, 0x22, 0x33, 0xB4, 0xB4, 0x33, 0x22, 0xA5, 0x11, 0x96, 0x87, 0x00, - 0xC3, 0x44, 0x55, 0xD2, 0x66, 0xE1, 0xF0, 0x77, 0x77, 0xF0, 0xE1, 0x66, 0xD2, 0x55, 0x44, 0xC3, - 0xD2, 0x55, 0x44, 0xC3, 0x77, 0xF0, 0xE1, 0x66, 0x66, 0xE1, 0xF0, 0x77, 0xC3, 0x44, 0x55, 0xD2, - 0x11, 0x96, 0x87, 0x00, 0xB4, 0x33, 0x22, 0xA5, 0xA5, 0x22, 0x33, 0xB4, 0x00, 0x87, 0x96, 0x11, - 0xE1, 0x66, 0x77, 0xF0, 0x44, 0xC3, 0xD2, 0x55, 0x55, 0xD2, 0xC3, 0x44, 0xF0, 0x77, 0x66, 0xE1, - 0x22, 0xA5, 0xB4, 0x33, 0x87, 0x00, 0x11, 0x96, 0x96, 0x11, 0x00, 0x87, 0x33, 0xB4, 0xA5, 0x22, - 0x33, 0xB4, 0xA5, 0x22, 0x96, 0x11, 0x00, 0x87, 0x87, 0x00, 0x11, 0x96, 0x22, 0xA5, 0xB4, 0x33, - 0xF0, 0x77, 0x66, 0xE1, 0x55, 0xD2, 0xC3, 0x44, 0x44, 0xC3, 0xD2, 0x55, 0xE1, 0x66, 0x77, 0xF0, - 0xF0, 0x77, 0x66, 0xE1, 0x55, 0xD2, 0xC3, 0x44, 0x44, 0xC3, 0xD2, 0x55, 0xE1, 0x66, 0x77, 0xF0, - 0x33, 0xB4, 0xA5, 0x22, 0x96, 0x11, 0x00, 0x87, 0x87, 0x00, 0x11, 0x96, 0x22, 0xA5, 0xB4, 0x33, - 0x22, 0xA5, 0xB4, 0x33, 0x87, 0x00, 0x11, 0x96, 0x96, 0x11, 0x00, 0x87, 0x33, 0xB4, 0xA5, 0x22, - 0xE1, 0x66, 0x77, 0xF0, 0x44, 0xC3, 0xD2, 0x55, 0x55, 0xD2, 0xC3, 0x44, 0xF0, 0x77, 0x66, 0xE1, - 0x11, 0x96, 0x87, 0x00, 0xB4, 0x33, 0x22, 0xA5, 0xA5, 0x22, 0x33, 0xB4, 0x00, 0x87, 0x96, 0x11, - 0xD2, 0x55, 0x44, 0xC3, 0x77, 0xF0, 0xE1, 0x66, 0x66, 0xE1, 0xF0, 0x77, 0xC3, 0x44, 0x55, 0xD2, - 0xC3, 0x44, 0x55, 0xD2, 0x66, 0xE1, 0xF0, 0x77, 0x77, 0xF0, 0xE1, 0x66, 0xD2, 0x55, 0x44, 0xC3, - 0x00, 0x87, 0x96, 0x11, 0xA5, 0x22, 0x33, 0xB4, 0xB4, 0x33, 0x22, 0xA5, 0x11, 0x96, 0x87, 0x00}; +void FLASHwrite32(u32 addr, u32 value, int size) +{ -static void xfromman_call20_calculateXors(unsigned char buffer[128], unsigned char blah[4]){ - unsigned char a=0, b=0, c=0, i; + switch (addr & 0x1FFFFFFF) + { + case FLASH_R_DATA: - for (i=0; i<128; i++){ + DEV9_LOG("*FLASH DATA %dbit write 0x%08lX %s\n", size * 8, value, (ctrl & FLASH_PP_WRITE) ? "WRITE_ENABLE" : "WRITE_DISABLE"); + memcpy(&data[counter], &value, size); + counter += size; + counter %= PAGE_SIZE_ECC; //should not get past the last byte, but at the end + break; + + case FLASH_R_CMD: + if (!(ctrl & FLASH_PP_READY)) + { + if ((value != SM_CMD_GETSTATUS) && (value != SM_CMD_RESET)) + { + DEV9_LOG("*FLASH CMD %dbit write %s ILLEGAL in busy mode - IGNORED\n", size * 8, getCmdName(value)); + break; + } + } + if (cmd == SM_CMD_WRITEDATA) + { + if ((value != SM_CMD_PROGRAMPAGE) && (value != SM_CMD_RESET)) + { + DEV9_LOG("*FLASH CMD %dbit write %s ILLEGAL after WRITEDATA cmd - IGNORED\n", size * 8, getCmdName(value)); + ctrl &= ~FLASH_PP_READY; //go busy, reset is needed + break; + } + } + DEV9_LOG("*FLASH CMD %dbit write %s\n", size * 8, getCmdName(value)); + switch (value) + { // A8 bit is encoded in READ cmd;) + case SM_CMD_READ1: + counter = 0; + if (cmd != SM_CMD_GETSTATUS) + address = counter; + addrbyte = 0; + break; + case SM_CMD_READ2: + counter = PAGE_SIZE / 2; + if (cmd != SM_CMD_GETSTATUS) + address = counter; + addrbyte = 0; + break; + case SM_CMD_READ3: + counter = PAGE_SIZE; + if (cmd != SM_CMD_GETSTATUS) + address = counter; + addrbyte = 0; + break; + case SM_CMD_RESET: + FLASHinit(); + break; + case SM_CMD_WRITEDATA: + counter = 0; + address = counter; + addrbyte = 0; + break; + case SM_CMD_ERASEBLOCK: + counter = 0; + memset(data, 0xFF, PAGE_SIZE); + address = counter; + addrbyte = 1; + break; + case SM_CMD_PROGRAMPAGE: //fall + case SM_CMD_ERASECONFIRM: + ctrl &= ~FLASH_PP_READY; + calculateECC(data); + memcpy(file + (address / PAGE_SIZE) * PAGE_SIZE_ECC, data, PAGE_SIZE_ECC); + /*write2file*/ + ctrl |= FLASH_PP_READY; + break; + case SM_CMD_GETSTATUS: + break; + case SM_CMD_READID: + counter = 0; + address = counter; + addrbyte = 0; + break; + default: + ctrl &= ~FLASH_PP_READY; + return; //ignore any other command; go busy, reset is needed + } + cmd = value; + break; + + case FLASH_R_ADDR: + DEV9_LOG("*FLASH ADDR %dbit write 0x%08lX\n", size * 8, value); + address |= (value & 0xFF) << (addrbyte == 0 ? 0 : (1 + 8 * addrbyte)); + addrbyte++; + DEV9_LOG("*FLASH ADDR = 0x%08lX (addrbyte=%d)\n", address, addrbyte); + if (!(value & 0x100)) + { // address is complete + if ((cmd == SM_CMD_READ1) || (cmd == SM_CMD_READ2) || (cmd == SM_CMD_READ3)) + { + ctrl &= ~FLASH_PP_READY; + memcpy(data, file + (address >> PAGE_SIZE_BITS) * PAGE_SIZE_ECC, PAGE_SIZE); + calculateECC(data); // calculate ECC; should be in the file already + ctrl |= FLASH_PP_READY; + } + addrbyte = 0; // address reset + { + u32 bytes, pages, blocks; + + blocks = address / BLOCK_SIZE; + pages = address - (blocks * BLOCK_SIZE); + bytes = pages % PAGE_SIZE; + pages = pages / PAGE_SIZE; + DEV9_LOG("*FLASH ADDR = 0x%08lX (%d:%d:%d) (addrbyte=%d) FINAL\n", address, blocks, pages, bytes, addrbyte); + } + } + break; + + case FLASH_R_CTRL: + DEV9_LOG("*FLASH CTRL %dbit write 0x%08lX\n", size * 8, value); + ctrl = (ctrl & FLASH_PP_READY) | (value & ~FLASH_PP_READY); + break; + + case FLASH_R_ID: + DEV9_LOG("*FLASH ID %dbit write 0x%08lX DENIED :P\n", size * 8, value); + break; + + default: + DEV9_LOG("*FLASH Unkwnown %dbit write at address 0x%08lX= 0x%08lX IGNORED\n", size * 8, addr, value); + break; + } +} + +static unsigned char xor_table[256] = { + 0x00, 0x87, 0x96, 0x11, 0xA5, 0x22, 0x33, 0xB4, 0xB4, 0x33, 0x22, 0xA5, 0x11, 0x96, 0x87, 0x00, + 0xC3, 0x44, 0x55, 0xD2, 0x66, 0xE1, 0xF0, 0x77, 0x77, 0xF0, 0xE1, 0x66, 0xD2, 0x55, 0x44, 0xC3, + 0xD2, 0x55, 0x44, 0xC3, 0x77, 0xF0, 0xE1, 0x66, 0x66, 0xE1, 0xF0, 0x77, 0xC3, 0x44, 0x55, 0xD2, + 0x11, 0x96, 0x87, 0x00, 0xB4, 0x33, 0x22, 0xA5, 0xA5, 0x22, 0x33, 0xB4, 0x00, 0x87, 0x96, 0x11, + 0xE1, 0x66, 0x77, 0xF0, 0x44, 0xC3, 0xD2, 0x55, 0x55, 0xD2, 0xC3, 0x44, 0xF0, 0x77, 0x66, 0xE1, + 0x22, 0xA5, 0xB4, 0x33, 0x87, 0x00, 0x11, 0x96, 0x96, 0x11, 0x00, 0x87, 0x33, 0xB4, 0xA5, 0x22, + 0x33, 0xB4, 0xA5, 0x22, 0x96, 0x11, 0x00, 0x87, 0x87, 0x00, 0x11, 0x96, 0x22, 0xA5, 0xB4, 0x33, + 0xF0, 0x77, 0x66, 0xE1, 0x55, 0xD2, 0xC3, 0x44, 0x44, 0xC3, 0xD2, 0x55, 0xE1, 0x66, 0x77, 0xF0, + 0xF0, 0x77, 0x66, 0xE1, 0x55, 0xD2, 0xC3, 0x44, 0x44, 0xC3, 0xD2, 0x55, 0xE1, 0x66, 0x77, 0xF0, + 0x33, 0xB4, 0xA5, 0x22, 0x96, 0x11, 0x00, 0x87, 0x87, 0x00, 0x11, 0x96, 0x22, 0xA5, 0xB4, 0x33, + 0x22, 0xA5, 0xB4, 0x33, 0x87, 0x00, 0x11, 0x96, 0x96, 0x11, 0x00, 0x87, 0x33, 0xB4, 0xA5, 0x22, + 0xE1, 0x66, 0x77, 0xF0, 0x44, 0xC3, 0xD2, 0x55, 0x55, 0xD2, 0xC3, 0x44, 0xF0, 0x77, 0x66, 0xE1, + 0x11, 0x96, 0x87, 0x00, 0xB4, 0x33, 0x22, 0xA5, 0xA5, 0x22, 0x33, 0xB4, 0x00, 0x87, 0x96, 0x11, + 0xD2, 0x55, 0x44, 0xC3, 0x77, 0xF0, 0xE1, 0x66, 0x66, 0xE1, 0xF0, 0x77, 0xC3, 0x44, 0x55, 0xD2, + 0xC3, 0x44, 0x55, 0xD2, 0x66, 0xE1, 0xF0, 0x77, 0x77, 0xF0, 0xE1, 0x66, 0xD2, 0x55, 0x44, 0xC3, + 0x00, 0x87, 0x96, 0x11, 0xA5, 0x22, 0x33, 0xB4, 0xB4, 0x33, 0x22, 0xA5, 0x11, 0x96, 0x87, 0x00}; + +static void xfromman_call20_calculateXors(unsigned char buffer[128], unsigned char blah[4]) +{ + unsigned char a = 0, b = 0, c = 0, i; + + for (i = 0; i < 128; i++) + { a ^= xor_table[buffer[i]]; - if (xor_table[buffer[i]] & 0x80){ + if (xor_table[buffer[i]] & 0x80) + { b ^= ~i; - c ^= i; + c ^= i; } } - blah[0]=(~a) & 0x77; - blah[1]=(~b) & 0x7F; - blah[2]=(~c) & 0x7F; + blah[0] = (~a) & 0x77; + blah[1] = (~b) & 0x7F; + blah[2] = (~c) & 0x7F; } diff --git a/pcsx2/DEV9/net.h b/pcsx2/DEV9/net.h index 6fd46dfcf2..95eac8b1b3 100644 --- a/pcsx2/DEV9/net.h +++ b/pcsx2/DEV9/net.h @@ -1,5 +1,5 @@ /* PCSX2 - PS2 Emulator for PCs - * Copyright (C) 2002-2014 David Quintana [gigaherz] + * Copyright (C) 2002-2010 PCSX2 Dev Team * * PCSX2 is free software: you can redistribute it and/or modify it under the terms * of the GNU Lesser General Public License as published by the Free Software Found- @@ -15,15 +15,19 @@ #pragma once #include -#include //uh isnt memcpy @ stdlib ? +#include //uh isnt memcpy @ stdlib ? struct NetPacket { - NetPacket() {size=0;} - NetPacket(void* ptr,int sz) {size=sz;memcpy(buffer,ptr,sz);} + NetPacket() { size = 0; } + NetPacket(void* ptr, int sz) + { + size = sz; + memcpy(buffer, ptr, sz); + } int size; - char buffer[2048-sizeof(int)];//1536 is realy needed, just pad up to 2048 bytes :) + char buffer[2048 - sizeof(int)]; //1536 is realy needed, just pad up to 2048 bytes :) }; /* extern mtfifo rx_fifo; @@ -33,13 +37,13 @@ extern mtfifo tx_fifo; class NetAdapter { public: - virtual bool blocks()=0; + virtual bool blocks() = 0; virtual bool isInitialised() = 0; - virtual bool recv(NetPacket* pkt)=0; //gets a packet - virtual bool send(NetPacket* pkt)=0; //sends the packet and deletes it when done - virtual ~NetAdapter(){} + virtual bool recv(NetPacket* pkt) = 0; //gets a packet + virtual bool send(NetPacket* pkt) = 0; //sends the packet and deletes it when done + virtual ~NetAdapter() {} }; void tx_put(NetPacket* ptr); void InitNet(NetAdapter* adapter); -void TermNet(); \ No newline at end of file +void TermNet(); diff --git a/pcsx2/DEV9/pcap_io.cpp b/pcsx2/DEV9/pcap_io.cpp index feddf83da2..6c81dded39 100644 --- a/pcsx2/DEV9/pcap_io.cpp +++ b/pcsx2/DEV9/pcap_io.cpp @@ -1,5 +1,5 @@ /* PCSX2 - PS2 Emulator for PCs - * Copyright (C) 2002-2014 David Quintana [gigaherz] + * Copyright (C) 2002-2010 PCSX2 Dev Team * * PCSX2 is free software: you can redistribute it and/or modify it under the terms * of the GNU Lesser General Public License as published by the Free Software Found- @@ -30,20 +30,20 @@ #include "DEV9.h" #include "net.h" #ifndef PCAP_NETMASK_UNKNOWN -#define PCAP_NETMASK_UNKNOWN 0xffffffff +#define PCAP_NETMASK_UNKNOWN 0xffffffff #endif #ifdef _WIN32 #define mac_address char* #else -pcap_t *adhandle; +pcap_t* adhandle; pcap_dumper_t* dump_pcap; char errbuf[PCAP_ERRBUF_SIZE]; mac_address virtual_mac = {0x00, 0x04, 0x1F, 0x82, 0x30, 0x31}; // first three recognized by Xlink as Sony PS2 mac_address broadcast_mac = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; mac_address host_mac = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; #endif -int pcap_io_running=0; +int pcap_io_running = 0; extern u8 eeprom[]; char namebuff[256]; @@ -51,7 +51,7 @@ char namebuff[256]; // Fetches the MAC address and prints it -int GetMACAddress(char *adapter, mac_address* addr) +int GetMACAddress(char* adapter, mac_address* addr) { int retval = 0; #ifdef _WIN32 @@ -65,9 +65,8 @@ int GetMACAddress(char *adapter, mac_address* addr) GAA_FLAG_INCLUDE_PREFIX, NULL, AdapterInfo, - &dwBufLen - ); - if(dwStatus != ERROR_SUCCESS) + &dwBufLen); + if (dwStatus != ERROR_SUCCESS) return 0; pAdapterInfo = AdapterInfo; @@ -85,16 +84,16 @@ int GetMACAddress(char *adapter, mac_address* addr) wchar_t wadapter[128]; std::mbstowcs(wadapter, adapter_desc, 128); - do { - if ( 0 == wcscmp(pAdapterInfo->Description, wadapter ) ) + do + { + if (0 == wcscmp(pAdapterInfo->Description, wadapter)) { - memcpy(addr,pAdapterInfo->PhysicalAddress,6); + memcpy(addr, pAdapterInfo->PhysicalAddress, 6); return 1; } pAdapterInfo = pAdapterInfo->Next; - } - while(pAdapterInfo); + } while (pAdapterInfo); #elif defined(__linux__) struct ifreq ifr; int fd = socket(AF_INET, SOCK_DGRAM, 0); @@ -102,7 +101,7 @@ int GetMACAddress(char *adapter, mac_address* addr) if (0 == ioctl(fd, SIOCGIFHWADDR, &ifr)) { retval = 1; - memcpy(addr,ifr.ifr_hwaddr.sa_data,6); + memcpy(addr, ifr.ifr_hwaddr.sa_data, 6); } else { @@ -113,22 +112,22 @@ int GetMACAddress(char *adapter, mac_address* addr) return retval; } -int pcap_io_init(char *adapter) +int pcap_io_init(char* adapter) { - #ifndef _WIN32 +#ifndef _WIN32 struct bpf_program fp; char filter[1024] = "ether broadcast or ether dst "; int dlt; - char *dlt_name; - emu_printf("Opening adapter '%s'...",adapter); + char* dlt_name; + emu_printf("Opening adapter '%s'...", adapter); u16 checksum; - GetMACAddress(adapter,&host_mac); - + GetMACAddress(adapter, &host_mac); + //Lets take the hosts last 2 bytes to make it unique on Xlink virtual_mac.bytes[4] = host_mac.bytes[4]; virtual_mac.bytes[5] = host_mac.bytes[5]; - for(int ii=0; ii<6; ii++) + for (int ii = 0; ii < 6; ii++) eeprom[ii] = virtual_mac.bytes[ii]; //The checksum seems to be all the values of the mac added up in 16bit chunks @@ -137,208 +136,218 @@ int pcap_io_init(char *adapter) dev9.eeprom[3] = checksum; /* Open the adapter */ - if ((adhandle= pcap_open_live(adapter, // name of the device - 65536, // portion of the packet to capture. + if ((adhandle = pcap_open_live(adapter, // name of the device + 65536, // portion of the packet to capture. // 65536 grants that the whole packet will be captured on all the MACs. - 1, // promiscuous for Xlink usage - 1, // read timeout - errbuf // error buffer - )) == NULL) + 1, // promiscuous for Xlink usage + 1, // read timeout + errbuf // error buffer + )) == NULL) { fprintf(stderr, "%s", errbuf); - fprintf(stderr,"\nUnable to open the adapter. %s is not supported by pcap\n", adapter); + fprintf(stderr, "\nUnable to open the adapter. %s is not supported by pcap\n", adapter); return -1; } char virtual_mac_str[18]; - sprintf(virtual_mac_str, "%.2x:%.2x:%.2x:%.2x:%.2x:%.2x" , virtual_mac.bytes[0], virtual_mac.bytes[1], virtual_mac.bytes[2], virtual_mac.bytes[3], virtual_mac.bytes[4], virtual_mac.bytes[5]); - strcat(filter,virtual_mac_str); -// fprintf(stderr, "Trying pcap filter: %s\n", filter); + sprintf(virtual_mac_str, "%.2x:%.2x:%.2x:%.2x:%.2x:%.2x", virtual_mac.bytes[0], virtual_mac.bytes[1], virtual_mac.bytes[2], virtual_mac.bytes[3], virtual_mac.bytes[4], virtual_mac.bytes[5]); + strcat(filter, virtual_mac_str); + // fprintf(stderr, "Trying pcap filter: %s\n", filter); - if(pcap_compile(adhandle,&fp,filter,1,PCAP_NETMASK_UNKNOWN) == -1) + if (pcap_compile(adhandle, &fp, filter, 1, PCAP_NETMASK_UNKNOWN) == -1) { - fprintf(stderr,"Error calling pcap_compile: %s\n", pcap_geterr(adhandle)); + fprintf(stderr, "Error calling pcap_compile: %s\n", pcap_geterr(adhandle)); return -1; } - if(pcap_setfilter(adhandle,&fp) == -1) + if (pcap_setfilter(adhandle, &fp) == -1) { - fprintf(stderr,"Error setting filter: %s\n", pcap_geterr(adhandle)); + fprintf(stderr, "Error setting filter: %s\n", pcap_geterr(adhandle)); return -1; } - + dlt = pcap_datalink(adhandle); dlt_name = (char*)pcap_datalink_val_to_name(dlt); - fprintf(stderr,"Device uses DLT %d: %s\n",dlt,dlt_name); - switch(dlt) + fprintf(stderr, "Device uses DLT %d: %s\n", dlt, dlt_name); + switch (dlt) { - case DLT_EN10MB : - //case DLT_IEEE802_11: - break; - default: - SysMessage("ERROR: Unsupported DataLink Type (%d): %s",dlt,dlt_name); - pcap_close(adhandle); - return -1; + case DLT_EN10MB: + //case DLT_IEEE802_11: + break; + default: + SysMessage("ERROR: Unsupported DataLink Type (%d): %s", dlt, dlt_name); + pcap_close(adhandle); + return -1; } const std::string plfile(s_strLogPath + "/pkt_log.pcap"); dump_pcap = pcap_dump_open(adhandle, plfile.c_str()); - pcap_io_running=1; + pcap_io_running = 1; emu_printf("Ok.\n"); - #endif +#endif return 0; } #ifdef _WIN32 -int gettimeofday (struct timeval *tv, void* tz) +int gettimeofday(struct timeval* tv, void* tz) { - unsigned __int64 ns100; /*time since 1 Jan 1601 in 100ns units */ + unsigned __int64 ns100; /*time since 1 Jan 1601 in 100ns units */ - GetSystemTimeAsFileTime((LPFILETIME)&ns100); - tv->tv_usec = (long) ((ns100 / 10L) % 1000000L); - tv->tv_sec = (long) ((ns100 - 116444736000000000L) / 10000000L); - return (0); -} + GetSystemTimeAsFileTime((LPFILETIME)&ns100); + tv->tv_usec = (long)((ns100 / 10L) % 1000000L); + tv->tv_sec = (long)((ns100 - 116444736000000000L) / 10000000L); + return (0); +} #endif int pcap_io_send(void* packet, int plen) { - #ifndef _WIN32 - if(pcap_io_running<=0) +#ifndef _WIN32 + if (pcap_io_running <= 0) return -1; - if(dump_pcap) + if (dump_pcap) { static struct pcap_pkthdr ph; - gettimeofday(&ph.ts,NULL); - ph.caplen=plen; - ph.len=plen; - pcap_dump((u_char*)dump_pcap,&ph,(u_char*)packet); + gettimeofday(&ph.ts, NULL); + ph.caplen = plen; + ph.len = plen; + pcap_dump((u_char*)dump_pcap, &ph, (u_char*)packet); } return pcap_sendpacket(adhandle, (u_char*)packet, plen); - #endif +#endif return 0; } int pcap_io_recv(void* packet, int max_len) { - #ifndef _WIN32 - static struct pcap_pkthdr *header; - static const u_char *pkt_data1; +#ifndef _WIN32 + static struct pcap_pkthdr* header; + static const u_char* pkt_data1; - if(pcap_io_running<=0) + if (pcap_io_running <= 0) return -1; - if((pcap_next_ex(adhandle, &header, &pkt_data1)) > 0) + if ((pcap_next_ex(adhandle, &header, &pkt_data1)) > 0) { - memcpy(packet,pkt_data1,header->len); + memcpy(packet, pkt_data1, header->len); - if(dump_pcap) - pcap_dump((u_char*)dump_pcap,header,(u_char*)packet); + if (dump_pcap) + pcap_dump((u_char*)dump_pcap, header, (u_char*)packet); return header->len; } - #endif +#endif return -1; } void pcap_io_close() { - #ifndef _WIN32 - if(dump_pcap) +#ifndef _WIN32 + if (dump_pcap) pcap_dump_close(dump_pcap); if (adhandle) - pcap_close(adhandle); - pcap_io_running=0; - #endif + pcap_close(adhandle); + pcap_io_running = 0; +#endif } int pcap_io_get_dev_num() -{ - int i=0; - #ifndef _WIN32 - pcap_if_t *alldevs; - pcap_if_t *d; - - if(pcap_findalldevs(&alldevs, errbuf) == -1) +{ + int i = 0; +#ifndef _WIN32 + pcap_if_t* alldevs; + pcap_if_t* d; + + if (pcap_findalldevs(&alldevs, errbuf) == -1) { return 0; } - - d=alldevs; - while(d!=NULL) {d=d->next; i++;} + + d = alldevs; + while (d != NULL) + { + d = d->next; + i++; + } pcap_freealldevs(alldevs); - #endif +#endif return i; } char* pcap_io_get_dev_name(int num) { - #ifndef _WIN32 - pcap_if_t *alldevs; - pcap_if_t *d; - int i=0; +#ifndef _WIN32 + pcap_if_t* alldevs; + pcap_if_t* d; + int i = 0; - if(pcap_findalldevs(&alldevs, errbuf) == -1) + if (pcap_findalldevs(&alldevs, errbuf) == -1) { return NULL; } - - d=alldevs; - while(d!=NULL) { - if(num==i) + + d = alldevs; + while (d != NULL) + { + if (num == i) { - strcpy(namebuff,d->name); + strcpy(namebuff, d->name); pcap_freealldevs(alldevs); return namebuff; } - d=d->next; i++; + d = d->next; + i++; } pcap_freealldevs(alldevs); - #endif +#endif return NULL; } char* pcap_io_get_dev_desc(int num) { - #ifndef _WIN32 - pcap_if_t *alldevs; - pcap_if_t *d; - int i=0; +#ifndef _WIN32 + pcap_if_t* alldevs; + pcap_if_t* d; + int i = 0; - if(pcap_findalldevs(&alldevs, errbuf) == -1) + if (pcap_findalldevs(&alldevs, errbuf) == -1) { return NULL; } - - d=alldevs; - while(d!=NULL) { - if(num==i) + + d = alldevs; + while (d != NULL) + { + if (num == i) { - strcpy(namebuff,d->description); + strcpy(namebuff, d->description); pcap_freealldevs(alldevs); return namebuff; } - d=d->next; i++; + d = d->next; + i++; } pcap_freealldevs(alldevs); - #endif +#endif return NULL; } PCAPAdapter::PCAPAdapter() { - if (config.ethEnable == 0) return; - if (pcap_io_init(config.Eth) == -1) { + if (config.ethEnable == 0) + return; + if (pcap_io_init(config.Eth) == -1) + { SysMessage("Can't open Device '%s'\n", config.Eth); } } @@ -353,21 +362,21 @@ bool PCAPAdapter::isInitialised() //gets a packet.rv :true success bool PCAPAdapter::recv(NetPacket* pkt) { - int size=pcap_io_recv(pkt->buffer,sizeof(pkt->buffer)); - if(size<=0) + int size = pcap_io_recv(pkt->buffer, sizeof(pkt->buffer)); + if (size <= 0) { return false; } else { - pkt->size=size; + pkt->size = size; return true; } } //sends the packet .rv :true success bool PCAPAdapter::send(NetPacket* pkt) { - if(pcap_io_send(pkt->buffer,pkt->size)) + if (pcap_io_send(pkt->buffer, pkt->size)) { return false; } diff --git a/pcsx2/DEV9/pcap_io.h b/pcsx2/DEV9/pcap_io.h index 95344b70b8..cb9d418306 100644 --- a/pcsx2/DEV9/pcap_io.h +++ b/pcsx2/DEV9/pcap_io.h @@ -1,5 +1,5 @@ /* PCSX2 - PS2 Emulator for PCs - * Copyright (C) 2002-2014 David Quintana [gigaherz] + * Copyright (C) 2002-2010 PCSX2 Dev Team * * PCSX2 is free software: you can redistribute it and/or modify it under the terms * of the GNU Lesser General Public License as published by the Free Software Found- @@ -45,86 +45,91 @@ typedef struct _ethernet_header typedef struct _arp_packet { - u_short hw_type; - u_short protocol; - u_char h_addr_len; - u_char p_addr_len; - u_short operation; + u_short hw_type; + u_short protocol; + u_char h_addr_len; + u_char p_addr_len; + u_short operation; mac_address h_src; - ip_address p_src; + ip_address p_src; mac_address h_dst; - ip_address p_dst; + ip_address p_dst; } arp_packet; -typedef struct _ip_header { - u_char ver_hlen; /* version << 4 | header length >> 2 */ - u_char type; /* type of service */ - u_short len; /* total length */ - u_short id; /* identification */ - u_short offset; /* fragment offset field */ - u_char ttl; /* time to live */ - u_char proto; /* protocol */ - u_short hdr_csum; /* checksum */ - ip_address src; /* source and dest address */ - ip_address dst; +typedef struct _ip_header +{ + u_char ver_hlen; /* version << 4 | header length >> 2 */ + u_char type; /* type of service */ + u_short len; /* total length */ + u_short id; /* identification */ + u_short offset; /* fragment offset field */ + u_char ttl; /* time to live */ + u_char proto; /* protocol */ + u_short hdr_csum; /* checksum */ + ip_address src; /* source and dest address */ + ip_address dst; } ip_header; /* Internet Control Message Protocol Constants and Packet Format */ /* ic_type field */ -#define ICT_ECHORP 0 /* Echo reply */ -#define ICT_DESTUR 3 /* Destination unreachable */ -#define ICT_SRCQ 4 /* Source quench */ -#define ICT_REDIRECT 5 /* Redirect message type */ -#define ICT_ECHORQ 8 /* Echo request */ -#define ICT_TIMEX 11 /* Time exceeded */ -#define ICT_PARAMP 12 /* Parameter Problem */ -#define ICT_TIMERQ 13 /* Timestamp request */ -#define ICT_TIMERP 14 /* Timestamp reply */ -#define ICT_INFORQ 15 /* Information request */ -#define ICT_INFORP 16 /* Information reply */ -#define ICT_MASKRQ 17 /* Mask request */ -#define ICT_MASKRP 18 /* Mask reply */ +#define ICT_ECHORP 0 /* Echo reply */ +#define ICT_DESTUR 3 /* Destination unreachable */ +#define ICT_SRCQ 4 /* Source quench */ +#define ICT_REDIRECT 5 /* Redirect message type */ +#define ICT_ECHORQ 8 /* Echo request */ +#define ICT_TIMEX 11 /* Time exceeded */ +#define ICT_PARAMP 12 /* Parameter Problem */ +#define ICT_TIMERQ 13 /* Timestamp request */ +#define ICT_TIMERP 14 /* Timestamp reply */ +#define ICT_INFORQ 15 /* Information request */ +#define ICT_INFORP 16 /* Information reply */ +#define ICT_MASKRQ 17 /* Mask request */ +#define ICT_MASKRP 18 /* Mask reply */ /* ic_code field */ -#define ICC_NETUR 0 /* dest unreachable, net unreachable */ -#define ICC_HOSTUR 1 /* dest unreachable, host unreachable */ -#define ICC_PROTOUR 2 /* dest unreachable, proto unreachable */ -#define ICC_PORTUR 3 /* dest unreachable, port unreachable */ -#define ICC_FNADF 4 /* dest unr, frag needed & don't frag */ -#define ICC_SRCRT 5 /* dest unreachable, src route failed */ +#define ICC_NETUR 0 /* dest unreachable, net unreachable */ +#define ICC_HOSTUR 1 /* dest unreachable, host unreachable */ +#define ICC_PROTOUR 2 /* dest unreachable, proto unreachable */ +#define ICC_PORTUR 3 /* dest unreachable, port unreachable */ +#define ICC_FNADF 4 /* dest unr, frag needed & don't frag */ +#define ICC_SRCRT 5 /* dest unreachable, src route failed */ -#define ICC_NETRD 0 /* redirect: net */ -#define ICC_HOSTRD 1 /* redirect: host */ -#define IC_TOSNRD 2 /* redirect: type of service, net */ -#define IC_TOSHRD 3 /* redirect: type of service, host */ +#define ICC_NETRD 0 /* redirect: net */ +#define ICC_HOSTRD 1 /* redirect: host */ +#define IC_TOSNRD 2 /* redirect: type of service, net */ +#define IC_TOSHRD 3 /* redirect: type of service, host */ -#define ICC_TIMEX 0 /* time exceeded, ttl */ -#define ICC_FTIMEX 1 /* time exceeded, frag */ +#define ICC_TIMEX 0 /* time exceeded, ttl */ +#define ICC_FTIMEX 1 /* time exceeded, frag */ -#define IC_HLEN 8 /* octets */ -#define IC_PADLEN 3 /* pad length (octets) */ +#define IC_HLEN 8 /* octets */ +#define IC_PADLEN 3 /* pad length (octets) */ -#define IC_RDTTL 300 /* ttl for redirect routes */ +#define IC_RDTTL 300 /* ttl for redirect routes */ /* ICMP packet format (following the IP header) */ -typedef struct _icmp_header { /* ICMP packet */ - char type; /* type of message (ICT_* above)*/ - char code; /* code (ICC_* above) */ - short csum; /* checksum of ICMP header+data */ +typedef struct _icmp_header +{ /* ICMP packet */ + char type; /* type of message (ICT_* above)*/ + char code; /* code (ICC_* above) */ + short csum; /* checksum of ICMP header+data */ - union { - struct { - int ic1_id:16; /* echo type, a message id */ - int ic1_seq:16;/* echo type, a seq. number */ + union + { + struct + { + int ic1_id : 16; /* echo type, a message id */ + int ic1_seq : 16; /* echo type, a seq. number */ } ic1; - ip_address ic2_gw; /* for redirect, gateway */ - struct { - char ic3_ptr;/* pointer, for ICT_PARAMP */ - char ic3_pad[IC_PADLEN]; + ip_address ic2_gw; /* for redirect, gateway */ + struct + { + char ic3_ptr; /* pointer, for ICT_PARAMP */ + char ic3_pad[IC_PADLEN]; } ic3; - int ic4_mbz; /* must be zero */ + int ic4_mbz; /* must be zero */ } icu; } icmp_header; @@ -148,8 +153,8 @@ typedef struct _full_arp_packet extern mac_address virtual_mac; extern mac_address broadcast_mac; -#define mac_compare(a,b) (memcmp(&(a),&(b),6)) -#define ip_compare(a,b) (memcmp(&(a),&(b),4)) +#define mac_compare(a, b) (memcmp(&(a), &(b), 6)) +#define ip_compare(a, b) (memcmp(&(a), &(b), 4)) #endif /* diff --git a/pcsx2/DEV9/smap.cpp b/pcsx2/DEV9/smap.cpp index 43c68b2d0f..041ccd5ace 100644 --- a/pcsx2/DEV9/smap.cpp +++ b/pcsx2/DEV9/smap.cpp @@ -1,5 +1,5 @@ /* PCSX2 - PS2 Emulator for PCs - * Copyright (C) 2002-2014 David Quintana [gigaherz] + * Copyright (C) 2002-2010 PCSX2 Dev Team * * PCSX2 is free software: you can redistribute it and/or modify it under the terms * of the GNU Lesser General Public License as published by the Free Software Found- @@ -31,7 +31,7 @@ #include "net.h" #include "pcap_io.h" -bool has_link=true; +bool has_link = true; volatile bool fireIntR = false; std::mutex frame_counter_mutex; std::mutex reset_mutex; @@ -65,21 +65,21 @@ void test() bool rx_fifo_can_rx() { //check if RX is on & stuff like that here - + //Check if there is space on RXBD - if (dev9Ru8(SMAP_R_RXFIFO_FRAME_CNT)==64) + if (dev9Ru8(SMAP_R_RXFIFO_FRAME_CNT) == 64) return false; - + //Check if there is space on fifo int rd_ptr = dev9Ru32(SMAP_R_RXFIFO_RD_PTR); int space = sizeof(dev9.rxfifo) - - ((dev9.rxfifo_wr_ptr-rd_ptr)&16383); + ((dev9.rxfifo_wr_ptr - rd_ptr) & 16383); - if(space==0) + if (space == 0) space = sizeof(dev9.rxfifo); - if (space<1514) + if (space < 1514) return false; //we can recv a packet ! @@ -88,33 +88,33 @@ bool rx_fifo_can_rx() void rx_process(NetPacket* pk) { - smap_bd_t *pbd= ((smap_bd_t *)&dev9.dev9R[SMAP_BD_RX_BASE & 0xffff])+dev9.rxbdi; + smap_bd_t* pbd = ((smap_bd_t*)&dev9.dev9R[SMAP_BD_RX_BASE & 0xffff]) + dev9.rxbdi; - int bytes=(pk->size+3)&(~3); + int bytes = (pk->size + 3) & (~3); - if (!(pbd->ctrl_stat & SMAP_BD_RX_EMPTY)) + if (!(pbd->ctrl_stat & SMAP_BD_RX_EMPTY)) { emu_printf("ERROR : Discarding %d bytes (RX%d not ready)\n", bytes, dev9.rxbdi); return; } - int pstart=(dev9.rxfifo_wr_ptr)&16383; - int i=0; - while(ibuffer[i++]); - dev9.rxfifo_wr_ptr&=16383; + dev9.rxfifo_wr_ptr &= 16383; } //increase RXBD std::unique_lock reset_lock(reset_mutex); dev9.rxbdi++; - dev9.rxbdi&=(SMAP_BD_SIZE/8)-1; + dev9.rxbdi &= (SMAP_BD_SIZE / 8) - 1; //Fill the BD with info ! pbd->length = pk->size; pbd->pointer = 0x4000 + pstart; - pbd->ctrl_stat&= ~SMAP_BD_RX_EMPTY; + pbd->ctrl_stat &= ~SMAP_BD_RX_EMPTY; //increase frame count std::unique_lock counter_lock(frame_counter_mutex); @@ -124,49 +124,49 @@ void rx_process(NetPacket* pk) //spams// emu_printf("Got packet, %d bytes (%d fifo)\n", pk->size,bytes); fireIntR = true; //_DEV9irq(SMAP_INTR_RXEND,0);//now ? or when the fifo is full ? i guess now atm - //note that this _is_ wrong since the IOP interrupt system is not thread safe.. but nothing i can do about that + //note that this _is_ wrong since the IOP interrupt system is not thread safe.. but nothing i can do about that } u32 wswap(u32 d) { - return (d>>16)|(d<<16); + return (d >> 16) | (d << 16); } void tx_process() { //we loop based on count ? or just *use* it ? - u32 cnt=dev9Ru8(SMAP_R_TXFIFO_FRAME_CNT); + u32 cnt = dev9Ru8(SMAP_R_TXFIFO_FRAME_CNT); //spams// printf("tx_process : %u cnt frames !\n",cnt); NetPacket pk; - u32 fc=0; - for (fc=0;fcctrl_stat&SMAP_BD_TX_READY)) + if (!(pbd->ctrl_stat & SMAP_BD_TX_READY)) { emu_printf("ERROR : !pbd->ctrl_stat&SMAP_BD_TX_READY\n"); break; } - if (pbd->length&3) + if (pbd->length & 3) { //spams// emu_printf("WARN : pbd->length not aligned %u\n",pbd->length); } - if(pbd->length>1514) + if (pbd->length > 1514) { emu_printf("ERROR : Trying to send packet too big.\n"); } else { - u32 base=(pbd->pointer-0x1000)&16383; + u32 base = (pbd->pointer - 0x1000) & 16383; DEV9_LOG("Sending Packet from base %x, size %d\n", base, pbd->length); //spams// emu_printf("Sending Packet from base %x, size %u\n", base, pbd->length); - - pk.size=pbd->length; - - if (!(pbd->pointer>=0x1000)) + + pk.size = pbd->length; + + if (!(pbd->pointer >= 0x1000)) { emu_printf("ERROR: odd , !pbd->pointer>0x1000 | 0x%X %u\n", pbd->pointer, pbd->length); } @@ -205,26 +205,26 @@ void tx_process() } */ - if(base+pbd->length > 16384) + if (base + pbd->length > 16384) { - u32 was=16384-base; - memcpy(pk.buffer,dev9.txfifo+base,was); - memcpy(pk.buffer+was,dev9.txfifo,pbd->length-was); - printf("Warped read, was=%u, sz=%u, sz-was=%u\n", was, pbd->length, pbd->length-was); + u32 was = 16384 - base; + memcpy(pk.buffer, dev9.txfifo + base, was); + memcpy(pk.buffer + was, dev9.txfifo, pbd->length - was); + printf("Warped read, was=%u, sz=%u, sz-was=%u\n", was, pbd->length, pbd->length - was); } else { - memcpy(pk.buffer,dev9.txfifo+base,pbd->length); + memcpy(pk.buffer, dev9.txfifo + base, pbd->length); } tx_put(&pk); } - pbd->ctrl_stat&= ~SMAP_BD_TX_READY; + pbd->ctrl_stat &= ~SMAP_BD_TX_READY; //increase TXBD dev9.txbdi++; - dev9.txbdi&=(SMAP_BD_SIZE/8)-1; + dev9.txbdi &= (SMAP_BD_SIZE / 8) - 1; //decrease frame count -- this is not thread safe dev9Ru8(SMAP_R_TXFIFO_FRAME_CNT)--; @@ -232,112 +232,112 @@ void tx_process() //spams// emu_printf("processed %u frames, %u count, cnt = %u\n",fc,dev9Ru8(SMAP_R_TXFIFO_FRAME_CNT),cnt); //if some error/early exit signal TXDNV - if (fc!=cnt || cnt==0) + if (fc != cnt || cnt == 0) { printf("WARN : (fc!=cnt || cnt==0) but packet send request was made oO..\n"); - _DEV9irq(SMAP_INTR_TXDNV,0); + _DEV9irq(SMAP_INTR_TXDNV, 0); } //if we actualy send something send TXEND - if(fc!=0) - _DEV9irq(SMAP_INTR_TXEND,100);//now ? or when the fifo is empty ? i guess now atm + if (fc != 0) + _DEV9irq(SMAP_INTR_TXEND, 100); //now ? or when the fifo is empty ? i guess now atm } void emac3_write(u32 addr) { - u32 value=wswap(dev9Ru32(addr)); - switch(addr) + u32 value = wswap(dev9Ru32(addr)); + switch (addr) { - case SMAP_R_EMAC3_MODE0_L: - DEV9_LOG("SMAP: SMAP_R_EMAC3_MODE0 write %x\n", value); - value = (value & (~SMAP_E3_SOFT_RESET)) | SMAP_E3_TXMAC_IDLE | SMAP_E3_RXMAC_IDLE; - dev9Ru16(SMAP_R_EMAC3_STA_CTRL_H)|= SMAP_E3_PHY_OP_COMP; - break; - case SMAP_R_EMAC3_TxMODE0_L: - DEV9_LOG("SMAP: SMAP_R_EMAC3_TxMODE0_L write %x\n", value); - //spams// emu_printf("SMAP: SMAP_R_EMAC3_TxMODE0_L write %x\n", value); - //Process TX here ? - if (!(value & SMAP_E3_TX_GNP_0)) - emu_printf("SMAP_R_EMAC3_TxMODE0_L: SMAP_E3_TX_GNP_0 not set\n"); + case SMAP_R_EMAC3_MODE0_L: + DEV9_LOG("SMAP: SMAP_R_EMAC3_MODE0 write %x\n", value); + value = (value & (~SMAP_E3_SOFT_RESET)) | SMAP_E3_TXMAC_IDLE | SMAP_E3_RXMAC_IDLE; + dev9Ru16(SMAP_R_EMAC3_STA_CTRL_H) |= SMAP_E3_PHY_OP_COMP; + break; + case SMAP_R_EMAC3_TxMODE0_L: + DEV9_LOG("SMAP: SMAP_R_EMAC3_TxMODE0_L write %x\n", value); + //spams// emu_printf("SMAP: SMAP_R_EMAC3_TxMODE0_L write %x\n", value); + //Process TX here ? + if (!(value & SMAP_E3_TX_GNP_0)) + emu_printf("SMAP_R_EMAC3_TxMODE0_L: SMAP_E3_TX_GNP_0 not set\n"); - tx_process(); - value = value& ~SMAP_E3_TX_GNP_0; - if (value) - emu_printf("SMAP_R_EMAC3_TxMODE0_L: extra bits set !\n"); - break; - case SMAP_R_EMAC3_TxMODE1_L: - emu_printf("SMAP_R_EMAC3_TxMODE1_L 32bit write %x\n", value); - if (value == 0x380f0000) - { - emu_printf("Adapter Detection Hack - Resetting RX/TX\n"); - _DEV9irq(SMAP_INTR_RXEND | SMAP_INTR_TXEND | SMAP_INTR_TXDNV, 5); - } - break; - case SMAP_R_EMAC3_STA_CTRL_L: - DEV9_LOG("SMAP: SMAP_R_EMAC3_STA_CTRL write %x\n", value); - { - if (value & (SMAP_E3_PHY_READ)) + tx_process(); + value = value & ~SMAP_E3_TX_GNP_0; + if (value) + emu_printf("SMAP_R_EMAC3_TxMODE0_L: extra bits set !\n"); + break; + case SMAP_R_EMAC3_TxMODE1_L: + emu_printf("SMAP_R_EMAC3_TxMODE1_L 32bit write %x\n", value); + if (value == 0x380f0000) { - value|= SMAP_E3_PHY_OP_COMP; - int reg = value & (SMAP_E3_PHY_REG_ADDR_MSK); - u16 val = dev9.phyregs[reg]; - switch (reg) - { - case SMAP_DsPHYTER_BMSR: - if (has_link) - val|= SMAP_PHY_BMSR_LINK | SMAP_PHY_BMSR_ANCP; - break; - case SMAP_DsPHYTER_PHYSTS: - if (has_link) - val|= SMAP_PHY_STS_LINK |SMAP_PHY_STS_100M | SMAP_PHY_STS_FDX | SMAP_PHY_STS_ANCP; - break; - } - DEV9_LOG("phy_read %d: %x\n", reg, val); - value=(value&0xFFFF)|(val<<16); - } - if (value & (SMAP_E3_PHY_WRITE)) - { - value|= SMAP_E3_PHY_OP_COMP; - int reg = value & (SMAP_E3_PHY_REG_ADDR_MSK); - u16 val = value>>16; - switch (reg) - { - case SMAP_DsPHYTER_BMCR: - val&= ~SMAP_PHY_BMCR_RST; - val|= 0x1; - break; - } - DEV9_LOG("phy_write %d: %x\n", reg, val); - dev9.phyregs[reg] = val; + emu_printf("Adapter Detection Hack - Resetting RX/TX\n"); + _DEV9irq(SMAP_INTR_RXEND | SMAP_INTR_TXEND | SMAP_INTR_TXDNV, 5); } - } - break; - default: - DEV9_LOG("SMAP: emac3 write %x=%x\n",addr, value); + break; + case SMAP_R_EMAC3_STA_CTRL_L: + DEV9_LOG("SMAP: SMAP_R_EMAC3_STA_CTRL write %x\n", value); + { + if (value & (SMAP_E3_PHY_READ)) + { + value |= SMAP_E3_PHY_OP_COMP; + int reg = value & (SMAP_E3_PHY_REG_ADDR_MSK); + u16 val = dev9.phyregs[reg]; + switch (reg) + { + case SMAP_DsPHYTER_BMSR: + if (has_link) + val |= SMAP_PHY_BMSR_LINK | SMAP_PHY_BMSR_ANCP; + break; + case SMAP_DsPHYTER_PHYSTS: + if (has_link) + val |= SMAP_PHY_STS_LINK | SMAP_PHY_STS_100M | SMAP_PHY_STS_FDX | SMAP_PHY_STS_ANCP; + break; + } + DEV9_LOG("phy_read %d: %x\n", reg, val); + value = (value & 0xFFFF) | (val << 16); + } + if (value & (SMAP_E3_PHY_WRITE)) + { + value |= SMAP_E3_PHY_OP_COMP; + int reg = value & (SMAP_E3_PHY_REG_ADDR_MSK); + u16 val = value >> 16; + switch (reg) + { + case SMAP_DsPHYTER_BMCR: + val &= ~SMAP_PHY_BMCR_RST; + val |= 0x1; + break; + } + DEV9_LOG("phy_write %d: %x\n", reg, val); + dev9.phyregs[reg] = val; + } + } + break; + default: + DEV9_LOG("SMAP: emac3 write %x=%x\n", addr, value); } - dev9Ru32(addr)=wswap(value); + dev9Ru32(addr) = wswap(value); } EXPORT_C_(u8) smap_read8(u32 addr) { - switch(addr) + switch (addr) { - case SMAP_R_TXFIFO_FRAME_CNT: - printf("SMAP_R_TXFIFO_FRAME_CNT read 8\n"); - break; - case SMAP_R_RXFIFO_FRAME_CNT: - printf("SMAP_R_RXFIFO_FRAME_CNT read 8\n"); - break; + case SMAP_R_TXFIFO_FRAME_CNT: + printf("SMAP_R_TXFIFO_FRAME_CNT read 8\n"); + break; + case SMAP_R_RXFIFO_FRAME_CNT: + printf("SMAP_R_RXFIFO_FRAME_CNT read 8\n"); + break; - case SMAP_R_BD_MODE: - return dev9.bd_swap; + case SMAP_R_BD_MODE: + return dev9.bd_swap; - default: - DEV9_LOG("SMAP : Unknown 8 bit read @ %X,v=%X\n",addr,dev9Ru8(addr)); - return dev9Ru8(addr); + default: + DEV9_LOG("SMAP : Unknown 8 bit read @ %X,v=%X\n", addr, dev9Ru8(addr)); + return dev9Ru8(addr); } - DEV9_LOG("SMAP : error , 8 bit read @ %X,v=%X\n",addr,dev9Ru8(addr)); + DEV9_LOG("SMAP : error , 8 bit read @ %X,v=%X\n", addr, dev9Ru8(addr)); return dev9Ru8(addr); } EXPORT_C_(u16) @@ -415,7 +415,7 @@ smap_read16(u32 addr) */ } #ifdef DEV9_LOG_ENABLE - switch(addr) + switch (addr) { case SMAP_R_TXFIFO_FRAME_CNT: printf("SMAP_R_TXFIFO_FRAME_CNT read 16\n"); @@ -487,7 +487,7 @@ smap_read16(u32 addr) DEV9_LOG("SMAP_R_EMAC3_STA_CTRL_H 16bit read %x\n", dev9Ru16(addr)); return dev9Ru16(addr); default: - DEV9_LOG("SMAP : Unknown 16 bit read @ %X,v=%X\n",addr,dev9Ru16(addr)); + DEV9_LOG("SMAP : Unknown 16 bit read @ %X,v=%X\n", addr, dev9Ru16(addr)); return dev9Ru16(addr); } #endif @@ -497,41 +497,41 @@ smap_read16(u32 addr) EXPORT_C_(u32) smap_read32(u32 addr) { - if (addr>=SMAP_EMAC3_REGBASE && addr= SMAP_EMAC3_REGBASE && addr < SMAP_EMAC3_REGEND) { - u32 hi=smap_read16(addr); - u32 lo=smap_read16(addr+2)<<16; - return hi|lo; + u32 hi = smap_read16(addr); + u32 lo = smap_read16(addr + 2) << 16; + return hi | lo; } - switch(addr) + switch (addr) { - case SMAP_R_TXFIFO_FRAME_CNT: - printf("SMAP_R_TXFIFO_FRAME_CNT read 32\n"); - return dev9Ru32(addr); - case SMAP_R_RXFIFO_FRAME_CNT: - printf("SMAP_R_RXFIFO_FRAME_CNT read 32\n"); - return dev9Ru32(addr); - case SMAP_R_EMAC3_STA_CTRL_L: - DEV9_LOG("SMAP_R_EMAC3_STA_CTRL_L 32bit read value %x\n", dev9Ru32(addr)); - return dev9Ru32(addr); + case SMAP_R_TXFIFO_FRAME_CNT: + printf("SMAP_R_TXFIFO_FRAME_CNT read 32\n"); + return dev9Ru32(addr); + case SMAP_R_RXFIFO_FRAME_CNT: + printf("SMAP_R_RXFIFO_FRAME_CNT read 32\n"); + return dev9Ru32(addr); + case SMAP_R_EMAC3_STA_CTRL_L: + DEV9_LOG("SMAP_R_EMAC3_STA_CTRL_L 32bit read value %x\n", dev9Ru32(addr)); + return dev9Ru32(addr); - case SMAP_R_RXFIFO_DATA: + case SMAP_R_RXFIFO_DATA: { - int rd_ptr = dev9Ru32(SMAP_R_RXFIFO_RD_PTR)&16383; + int rd_ptr = dev9Ru32(SMAP_R_RXFIFO_RD_PTR) & 16383; int rv = *((u32*)(dev9.rxfifo + rd_ptr)); - dev9Ru32(SMAP_R_RXFIFO_RD_PTR) = ((rd_ptr+4)&16383); + dev9Ru32(SMAP_R_RXFIFO_RD_PTR) = ((rd_ptr + 4) & 16383); - if(dev9.bd_swap) - rv=(rv<<24)|(rv>>24)|((rv>>8)&0xFF00)|((rv<<8)&0xFF0000); + if (dev9.bd_swap) + rv = (rv << 24) | (rv >> 24) | ((rv >> 8) & 0xFF00) | ((rv << 8) & 0xFF0000); DEV9_LOG("SMAP_R_RXFIFO_DATA 32bit read %x\n", rv); return rv; } - default: - DEV9_LOG("SMAP : Unknown 32 bit read @ %X,v=%X\n",addr,dev9Ru32(addr)); - return dev9Ru32(addr); + default: + DEV9_LOG("SMAP : Unknown 32 bit read @ %X,v=%X\n", addr, dev9Ru32(addr)); + return dev9Ru32(addr); } } EXPORT_C_(void) @@ -539,83 +539,84 @@ smap_write8(u32 addr, u8 value) { std::unique_lock reset_lock(reset_mutex, std::defer_lock); std::unique_lock counter_lock(frame_counter_mutex, std::defer_lock); - switch(addr) + switch (addr) { - case SMAP_R_TXFIFO_FRAME_INC: - DEV9_LOG("SMAP_R_TXFIFO_FRAME_INC 8bit write %x\n", value); - { - dev9Ru8(SMAP_R_TXFIFO_FRAME_CNT)++; - } - return; + case SMAP_R_TXFIFO_FRAME_INC: + DEV9_LOG("SMAP_R_TXFIFO_FRAME_INC 8bit write %x\n", value); + { + dev9Ru8(SMAP_R_TXFIFO_FRAME_CNT)++; + } + return; - case SMAP_R_RXFIFO_FRAME_DEC: - DEV9_LOG("SMAP_R_RXFIFO_FRAME_DEC 8bit write %x\n", value); - counter_lock.lock(); - dev9Ru8(addr) = value; - { - dev9Ru8(SMAP_R_RXFIFO_FRAME_CNT)--; - } - counter_lock.unlock(); - return; - - case SMAP_R_TXFIFO_CTRL: - DEV9_LOG("SMAP_R_TXFIFO_CTRL 8bit write %x\n", value); - if(value&SMAP_TXFIFO_RESET) - { - dev9.txbdi=0; - dev9.txfifo_rd_ptr=0; - dev9Ru8(SMAP_R_TXFIFO_FRAME_CNT)=0; //this actualy needs to be atomic (lock mov ...) - dev9Ru32(SMAP_R_TXFIFO_WR_PTR)=0; - dev9Ru32(SMAP_R_TXFIFO_SIZE)=16384; - } - value&= ~SMAP_TXFIFO_RESET; - dev9Ru8(addr) = value; - return; - - case SMAP_R_RXFIFO_CTRL: - DEV9_LOG("SMAP_R_RXFIFO_CTRL 8bit write %x\n", value); - if(value&SMAP_RXFIFO_RESET) - { - reset_lock.lock(); //lock reset mutex 1st + case SMAP_R_RXFIFO_FRAME_DEC: + DEV9_LOG("SMAP_R_RXFIFO_FRAME_DEC 8bit write %x\n", value); counter_lock.lock(); - dev9.rxbdi=0; - dev9.rxfifo_wr_ptr=0; - dev9Ru8(SMAP_R_RXFIFO_FRAME_CNT)=0; - dev9Ru32(SMAP_R_RXFIFO_RD_PTR)=0; - dev9Ru32(SMAP_R_RXFIFO_SIZE)=16384; - reset_lock.unlock(); + dev9Ru8(addr) = value; + { + dev9Ru8(SMAP_R_RXFIFO_FRAME_CNT)--; + } counter_lock.unlock(); - } - value&= ~SMAP_RXFIFO_RESET; - dev9Ru8(addr) = value; - return; + return; - case SMAP_R_BD_MODE: - if(value&SMAP_BD_SWAP) - { - DEV9_LOG("SMAP_R_BD_MODE: byteswapped.\n"); - emu_printf("BD Byteswapping enabled.\n"); - dev9.bd_swap=1; - } - else - { - DEV9_LOG("SMAP_R_BD_MODE: NOT byteswapped.\n"); - emu_printf("BD Byteswapping disabled.\n"); - dev9.bd_swap=0; - } - return; - default : - DEV9_LOG("SMAP : Unknown 8 bit write @ %X,v=%X\n",addr,value); - dev9Ru8(addr) = value; - return; + case SMAP_R_TXFIFO_CTRL: + DEV9_LOG("SMAP_R_TXFIFO_CTRL 8bit write %x\n", value); + if (value & SMAP_TXFIFO_RESET) + { + dev9.txbdi = 0; + dev9.txfifo_rd_ptr = 0; + dev9Ru8(SMAP_R_TXFIFO_FRAME_CNT) = 0; //this actualy needs to be atomic (lock mov ...) + dev9Ru32(SMAP_R_TXFIFO_WR_PTR) = 0; + dev9Ru32(SMAP_R_TXFIFO_SIZE) = 16384; + } + value &= ~SMAP_TXFIFO_RESET; + dev9Ru8(addr) = value; + return; + + case SMAP_R_RXFIFO_CTRL: + DEV9_LOG("SMAP_R_RXFIFO_CTRL 8bit write %x\n", value); + if (value & SMAP_RXFIFO_RESET) + { + reset_lock.lock(); //lock reset mutex 1st + counter_lock.lock(); + dev9.rxbdi = 0; + dev9.rxfifo_wr_ptr = 0; + dev9Ru8(SMAP_R_RXFIFO_FRAME_CNT) = 0; + dev9Ru32(SMAP_R_RXFIFO_RD_PTR) = 0; + dev9Ru32(SMAP_R_RXFIFO_SIZE) = 16384; + reset_lock.unlock(); + counter_lock.unlock(); + } + value &= ~SMAP_RXFIFO_RESET; + dev9Ru8(addr) = value; + return; + + case SMAP_R_BD_MODE: + if (value & SMAP_BD_SWAP) + { + DEV9_LOG("SMAP_R_BD_MODE: byteswapped.\n"); + emu_printf("BD Byteswapping enabled.\n"); + dev9.bd_swap = 1; + } + else + { + DEV9_LOG("SMAP_R_BD_MODE: NOT byteswapped.\n"); + emu_printf("BD Byteswapping disabled.\n"); + dev9.bd_swap = 0; + } + return; + default: + DEV9_LOG("SMAP : Unknown 8 bit write @ %X,v=%X\n", addr, value); + dev9Ru8(addr) = value; + return; } } EXPORT_C_(void) smap_write16(u32 addr, u16 value) { - if (addr >= SMAP_BD_TX_BASE && addr < (SMAP_BD_TX_BASE + SMAP_BD_SIZE)) { - if(dev9.bd_swap) - value = (value>>8)|(value<<8); + if (addr >= SMAP_BD_TX_BASE && addr < (SMAP_BD_TX_BASE + SMAP_BD_SIZE)) + { + if (dev9.bd_swap) + value = (value >> 8) | (value << 8); dev9Ru16(addr) = value; /* switch (addr & 0x7) @@ -641,13 +642,13 @@ smap_write16(u32 addr, u16 value) */ return; } - else if (addr >= SMAP_BD_RX_BASE && addr < (SMAP_BD_RX_BASE + SMAP_BD_SIZE)) + else if (addr >= SMAP_BD_RX_BASE && addr < (SMAP_BD_RX_BASE + SMAP_BD_SIZE)) { //int rx_index=(addr - SMAP_BD_RX_BASE)>>3; - if(dev9.bd_swap) - value = (value>>8)|(value<<8); + if (dev9.bd_swap) + value = (value >> 8) | (value << 8); dev9Ru16(addr) = value; -/* + /* switch (addr & 0x7) { case 0: // ctrl_stat @@ -675,88 +676,88 @@ smap_write16(u32 addr, u16 value) return; } - switch(addr) + switch (addr) { - case SMAP_R_INTR_CLR: - DEV9_LOG("SMAP: SMAP_R_INTR_CLR 16bit write %x\n", value); - dev9.irqcause&= ~value; - return; + case SMAP_R_INTR_CLR: + DEV9_LOG("SMAP: SMAP_R_INTR_CLR 16bit write %x\n", value); + dev9.irqcause &= ~value; + return; - case SMAP_R_TXFIFO_WR_PTR: - DEV9_LOG("SMAP: SMAP_R_TXFIFO_WR_PTR 16bit write %x\n", value); - dev9Ru16(addr) = value; - return; -#define EMAC3_L_WRITE(name) \ - case name: \ + case SMAP_R_TXFIFO_WR_PTR: + DEV9_LOG("SMAP: SMAP_R_TXFIFO_WR_PTR 16bit write %x\n", value); + dev9Ru16(addr) = value; + return; +#define EMAC3_L_WRITE(name) \ + case name: \ DEV9_LOG("SMAP: " #name " 16 bit write %x\n", value); \ - dev9Ru16(addr) = value; \ + dev9Ru16(addr) = value; \ return; - //handle L writes - EMAC3_L_WRITE(SMAP_R_EMAC3_MODE0_L ) - EMAC3_L_WRITE( SMAP_R_EMAC3_MODE1_L ) - EMAC3_L_WRITE( SMAP_R_EMAC3_TxMODE0_L ) - EMAC3_L_WRITE( SMAP_R_EMAC3_TxMODE1_L ) - EMAC3_L_WRITE( SMAP_R_EMAC3_RxMODE_L ) - EMAC3_L_WRITE( SMAP_R_EMAC3_INTR_STAT_L ) - EMAC3_L_WRITE( SMAP_R_EMAC3_INTR_ENABLE_L ) - EMAC3_L_WRITE( SMAP_R_EMAC3_ADDR_HI_L ) - EMAC3_L_WRITE( SMAP_R_EMAC3_ADDR_LO_L ) - EMAC3_L_WRITE( SMAP_R_EMAC3_VLAN_TPID ) - EMAC3_L_WRITE( SMAP_R_EMAC3_PAUSE_TIMER_L ) - EMAC3_L_WRITE( SMAP_R_EMAC3_INDIVID_HASH1 ) - EMAC3_L_WRITE( SMAP_R_EMAC3_INDIVID_HASH2 ) - EMAC3_L_WRITE( SMAP_R_EMAC3_INDIVID_HASH3 ) - EMAC3_L_WRITE( SMAP_R_EMAC3_INDIVID_HASH4 ) - EMAC3_L_WRITE( SMAP_R_EMAC3_GROUP_HASH1 ) - EMAC3_L_WRITE( SMAP_R_EMAC3_GROUP_HASH2 ) - EMAC3_L_WRITE( SMAP_R_EMAC3_GROUP_HASH3 ) - EMAC3_L_WRITE( SMAP_R_EMAC3_GROUP_HASH4 ) + //handle L writes + EMAC3_L_WRITE(SMAP_R_EMAC3_MODE0_L) + EMAC3_L_WRITE(SMAP_R_EMAC3_MODE1_L) + EMAC3_L_WRITE(SMAP_R_EMAC3_TxMODE0_L) + EMAC3_L_WRITE(SMAP_R_EMAC3_TxMODE1_L) + EMAC3_L_WRITE(SMAP_R_EMAC3_RxMODE_L) + EMAC3_L_WRITE(SMAP_R_EMAC3_INTR_STAT_L) + EMAC3_L_WRITE(SMAP_R_EMAC3_INTR_ENABLE_L) + EMAC3_L_WRITE(SMAP_R_EMAC3_ADDR_HI_L) + EMAC3_L_WRITE(SMAP_R_EMAC3_ADDR_LO_L) + EMAC3_L_WRITE(SMAP_R_EMAC3_VLAN_TPID) + EMAC3_L_WRITE(SMAP_R_EMAC3_PAUSE_TIMER_L) + EMAC3_L_WRITE(SMAP_R_EMAC3_INDIVID_HASH1) + EMAC3_L_WRITE(SMAP_R_EMAC3_INDIVID_HASH2) + EMAC3_L_WRITE(SMAP_R_EMAC3_INDIVID_HASH3) + EMAC3_L_WRITE(SMAP_R_EMAC3_INDIVID_HASH4) + EMAC3_L_WRITE(SMAP_R_EMAC3_GROUP_HASH1) + EMAC3_L_WRITE(SMAP_R_EMAC3_GROUP_HASH2) + EMAC3_L_WRITE(SMAP_R_EMAC3_GROUP_HASH3) + EMAC3_L_WRITE(SMAP_R_EMAC3_GROUP_HASH4) - EMAC3_L_WRITE( SMAP_R_EMAC3_LAST_SA_HI ) - EMAC3_L_WRITE( SMAP_R_EMAC3_LAST_SA_LO ) - EMAC3_L_WRITE( SMAP_R_EMAC3_INTER_FRAME_GAP_L ) - EMAC3_L_WRITE( SMAP_R_EMAC3_STA_CTRL_L ) - EMAC3_L_WRITE( SMAP_R_EMAC3_TX_THRESHOLD_L ) - EMAC3_L_WRITE( SMAP_R_EMAC3_RX_WATERMARK_L ) - EMAC3_L_WRITE( SMAP_R_EMAC3_TX_OCTETS ) - EMAC3_L_WRITE( SMAP_R_EMAC3_RX_OCTETS ) + EMAC3_L_WRITE(SMAP_R_EMAC3_LAST_SA_HI) + EMAC3_L_WRITE(SMAP_R_EMAC3_LAST_SA_LO) + EMAC3_L_WRITE(SMAP_R_EMAC3_INTER_FRAME_GAP_L) + EMAC3_L_WRITE(SMAP_R_EMAC3_STA_CTRL_L) + EMAC3_L_WRITE(SMAP_R_EMAC3_TX_THRESHOLD_L) + EMAC3_L_WRITE(SMAP_R_EMAC3_RX_WATERMARK_L) + EMAC3_L_WRITE(SMAP_R_EMAC3_TX_OCTETS) + EMAC3_L_WRITE(SMAP_R_EMAC3_RX_OCTETS) -#define EMAC3_H_WRITE(name) \ - case name: \ +#define EMAC3_H_WRITE(name) \ + case name: \ DEV9_LOG("SMAP: " #name " 16 bit write %x\n", value); \ - dev9Ru16(addr) = value; \ - emac3_write(addr-2); \ + dev9Ru16(addr) = value; \ + emac3_write(addr - 2); \ return; - //handle H writes - EMAC3_H_WRITE(SMAP_R_EMAC3_MODE0_H ) - EMAC3_H_WRITE( SMAP_R_EMAC3_MODE1_H ) - EMAC3_H_WRITE( SMAP_R_EMAC3_TxMODE0_H ) - EMAC3_H_WRITE( SMAP_R_EMAC3_TxMODE1_H ) - EMAC3_H_WRITE( SMAP_R_EMAC3_RxMODE_H ) - EMAC3_H_WRITE( SMAP_R_EMAC3_INTR_STAT_H ) - EMAC3_H_WRITE( SMAP_R_EMAC3_INTR_ENABLE_H ) - EMAC3_H_WRITE( SMAP_R_EMAC3_ADDR_HI_H ) - EMAC3_H_WRITE( SMAP_R_EMAC3_ADDR_LO_H ) - EMAC3_H_WRITE( SMAP_R_EMAC3_VLAN_TPID+2 ) - EMAC3_H_WRITE( SMAP_R_EMAC3_PAUSE_TIMER_H ) - EMAC3_H_WRITE( SMAP_R_EMAC3_INDIVID_HASH1+2 ) - EMAC3_H_WRITE( SMAP_R_EMAC3_INDIVID_HASH2+2 ) - EMAC3_H_WRITE( SMAP_R_EMAC3_INDIVID_HASH3+2 ) - EMAC3_H_WRITE( SMAP_R_EMAC3_INDIVID_HASH4+2 ) - EMAC3_H_WRITE( SMAP_R_EMAC3_GROUP_HASH1+2 ) - EMAC3_H_WRITE( SMAP_R_EMAC3_GROUP_HASH2+2 ) - EMAC3_H_WRITE( SMAP_R_EMAC3_GROUP_HASH3+2 ) - EMAC3_H_WRITE( SMAP_R_EMAC3_GROUP_HASH4+2 ) + //handle H writes + EMAC3_H_WRITE(SMAP_R_EMAC3_MODE0_H) + EMAC3_H_WRITE(SMAP_R_EMAC3_MODE1_H) + EMAC3_H_WRITE(SMAP_R_EMAC3_TxMODE0_H) + EMAC3_H_WRITE(SMAP_R_EMAC3_TxMODE1_H) + EMAC3_H_WRITE(SMAP_R_EMAC3_RxMODE_H) + EMAC3_H_WRITE(SMAP_R_EMAC3_INTR_STAT_H) + EMAC3_H_WRITE(SMAP_R_EMAC3_INTR_ENABLE_H) + EMAC3_H_WRITE(SMAP_R_EMAC3_ADDR_HI_H) + EMAC3_H_WRITE(SMAP_R_EMAC3_ADDR_LO_H) + EMAC3_H_WRITE(SMAP_R_EMAC3_VLAN_TPID + 2) + EMAC3_H_WRITE(SMAP_R_EMAC3_PAUSE_TIMER_H) + EMAC3_H_WRITE(SMAP_R_EMAC3_INDIVID_HASH1 + 2) + EMAC3_H_WRITE(SMAP_R_EMAC3_INDIVID_HASH2 + 2) + EMAC3_H_WRITE(SMAP_R_EMAC3_INDIVID_HASH3 + 2) + EMAC3_H_WRITE(SMAP_R_EMAC3_INDIVID_HASH4 + 2) + EMAC3_H_WRITE(SMAP_R_EMAC3_GROUP_HASH1 + 2) + EMAC3_H_WRITE(SMAP_R_EMAC3_GROUP_HASH2 + 2) + EMAC3_H_WRITE(SMAP_R_EMAC3_GROUP_HASH3 + 2) + EMAC3_H_WRITE(SMAP_R_EMAC3_GROUP_HASH4 + 2) - EMAC3_H_WRITE( SMAP_R_EMAC3_LAST_SA_HI+2 ) - EMAC3_H_WRITE( SMAP_R_EMAC3_LAST_SA_LO+2 ) - EMAC3_H_WRITE( SMAP_R_EMAC3_INTER_FRAME_GAP_H ) - EMAC3_H_WRITE( SMAP_R_EMAC3_STA_CTRL_H ) - EMAC3_H_WRITE( SMAP_R_EMAC3_TX_THRESHOLD_H ) - EMAC3_H_WRITE( SMAP_R_EMAC3_RX_WATERMARK_H ) - EMAC3_H_WRITE( SMAP_R_EMAC3_TX_OCTETS+2 ) - EMAC3_H_WRITE( SMAP_R_EMAC3_RX_OCTETS+2 ) -/* + EMAC3_H_WRITE(SMAP_R_EMAC3_LAST_SA_HI + 2) + EMAC3_H_WRITE(SMAP_R_EMAC3_LAST_SA_LO + 2) + EMAC3_H_WRITE(SMAP_R_EMAC3_INTER_FRAME_GAP_H) + EMAC3_H_WRITE(SMAP_R_EMAC3_STA_CTRL_H) + EMAC3_H_WRITE(SMAP_R_EMAC3_TX_THRESHOLD_H) + EMAC3_H_WRITE(SMAP_R_EMAC3_RX_WATERMARK_H) + EMAC3_H_WRITE(SMAP_R_EMAC3_TX_OCTETS + 2) + EMAC3_H_WRITE(SMAP_R_EMAC3_RX_OCTETS + 2) + /* case SMAP_R_EMAC3_MODE0_L: DEV9_LOG("SMAP: SMAP_R_EMAC3_MODE0 write %x\n", value); dev9Ru16(addr) = value; @@ -785,52 +786,52 @@ smap_write16(u32 addr, u16 value) return; */ - default : - DEV9_LOG("SMAP : Unknown 16 bit write @ %X,v=%X\n",addr,value); - dev9Ru16(addr) = value; - return; + default: + DEV9_LOG("SMAP : Unknown 16 bit write @ %X,v=%X\n", addr, value); + dev9Ru16(addr) = value; + return; } } EXPORT_C_(void) smap_write32(u32 addr, u32 value) { - if (addr>=SMAP_EMAC3_REGBASE && addr= SMAP_EMAC3_REGBASE && addr < SMAP_EMAC3_REGEND) { - smap_write16(addr,value&0xFFFF); - smap_write16(addr+2,value>>16); + smap_write16(addr, value & 0xFFFF); + smap_write16(addr + 2, value >> 16); return; } - switch(addr) + switch (addr) { - case SMAP_R_TXFIFO_DATA: - if(dev9.bd_swap) - value=(value<<24)|(value>>24)|((value>>8)&0xFF00)|((value<<8)&0xFF0000); + case SMAP_R_TXFIFO_DATA: + if (dev9.bd_swap) + value = (value << 24) | (value >> 24) | ((value >> 8) & 0xFF00) | ((value << 8) & 0xFF0000); - DEV9_LOG("SMAP_R_TXFIFO_DATA 32bit write %x\n", value); - *((u32*)(dev9.txfifo+dev9Ru32(SMAP_R_TXFIFO_WR_PTR)))=value; - dev9Ru32(SMAP_R_TXFIFO_WR_PTR) = (dev9Ru32(SMAP_R_TXFIFO_WR_PTR)+4)&16383; - return; - default : - DEV9_LOG("SMAP : Unknown 32 bit write @ %X,v=%X\n",addr,value); - dev9Ru32(addr) = value; - return; + DEV9_LOG("SMAP_R_TXFIFO_DATA 32bit write %x\n", value); + *((u32*)(dev9.txfifo + dev9Ru32(SMAP_R_TXFIFO_WR_PTR))) = value; + dev9Ru32(SMAP_R_TXFIFO_WR_PTR) = (dev9Ru32(SMAP_R_TXFIFO_WR_PTR) + 4) & 16383; + return; + default: + DEV9_LOG("SMAP : Unknown 32 bit write @ %X,v=%X\n", addr, value); + dev9Ru32(addr) = value; + return; } } EXPORT_C_(void) -smap_readDMA8Mem(u32 *pMem, int size) +smap_readDMA8Mem(u32* pMem, int size) { - if(dev9Ru16(SMAP_R_RXFIFO_CTRL)&SMAP_RXFIFO_DMAEN) + if (dev9Ru16(SMAP_R_RXFIFO_CTRL) & SMAP_RXFIFO_DMAEN) { - dev9Ru32(SMAP_R_RXFIFO_RD_PTR)&=16383; - size>>=1; + dev9Ru32(SMAP_R_RXFIFO_RD_PTR) &= 16383; + size >>= 1; DEV9_LOG(" * * SMAP DMA READ START: rd_ptr=%d, wr_ptr=%d\n", dev9Ru32(SMAP_R_RXFIFO_RD_PTR), dev9.rxfifo_wr_ptr); - while(size>0) + while (size > 0) { - *pMem = *((u32*)(dev9.rxfifo+dev9Ru32(SMAP_R_RXFIFO_RD_PTR))); + *pMem = *((u32*)(dev9.rxfifo + dev9Ru32(SMAP_R_RXFIFO_RD_PTR))); pMem++; - dev9Ru32(SMAP_R_RXFIFO_RD_PTR) = (dev9Ru32(SMAP_R_RXFIFO_RD_PTR)+4)&16383; - - size-=4; + dev9Ru32(SMAP_R_RXFIFO_RD_PTR) = (dev9Ru32(SMAP_R_RXFIFO_RD_PTR) + 4) & 16383; + + size -= 4; } DEV9_LOG(" * * SMAP DMA READ END: rd_ptr=%d, wr_ptr=%d\n", dev9Ru32(SMAP_R_RXFIFO_RD_PTR), dev9.rxfifo_wr_ptr); @@ -840,25 +841,24 @@ smap_readDMA8Mem(u32 *pMem, int size) EXPORT_C_(void) smap_writeDMA8Mem(u32* pMem, int size) { - if(dev9Ru16(SMAP_R_TXFIFO_CTRL)&SMAP_TXFIFO_DMAEN) + if (dev9Ru16(SMAP_R_TXFIFO_CTRL) & SMAP_TXFIFO_DMAEN) { - dev9Ru32(SMAP_R_TXFIFO_WR_PTR)&=16383; - size>>=1; + dev9Ru32(SMAP_R_TXFIFO_WR_PTR) &= 16383; + size >>= 1; DEV9_LOG(" * * SMAP DMA WRITE START: wr_ptr=%d, rd_ptr=%d\n", dev9Ru32(SMAP_R_TXFIFO_WR_PTR), dev9.txfifo_rd_ptr); - while(size>0) + while (size > 0) { - int value=*pMem; + int value = *pMem; // value=(value<<24)|(value>>24)|((value>>8)&0xFF00)|((value<<8)&0xFF0000); pMem++; - *((u32*)(dev9.txfifo+dev9Ru32(SMAP_R_TXFIFO_WR_PTR)))=value; - dev9Ru32(SMAP_R_TXFIFO_WR_PTR) = (dev9Ru32(SMAP_R_TXFIFO_WR_PTR)+4)&16383; - size-=4; + *((u32*)(dev9.txfifo + dev9Ru32(SMAP_R_TXFIFO_WR_PTR))) = value; + dev9Ru32(SMAP_R_TXFIFO_WR_PTR) = (dev9Ru32(SMAP_R_TXFIFO_WR_PTR) + 4) & 16383; + size -= 4; } DEV9_LOG(" * * SMAP DMA WRITE END: wr_ptr=%d, rd_ptr=%d\n", dev9Ru32(SMAP_R_TXFIFO_WR_PTR), dev9.txfifo_rd_ptr); dev9Ru16(SMAP_R_TXFIFO_CTRL) &= ~SMAP_TXFIFO_DMAEN; - } } EXPORT_C_(void) diff --git a/pcsx2/DEV9/smap.h b/pcsx2/DEV9/smap.h index d3759b7091..c0cd60903b 100644 --- a/pcsx2/DEV9/smap.h +++ b/pcsx2/DEV9/smap.h @@ -1,5 +1,5 @@ /* PCSX2 - PS2 Emulator for PCs - * Copyright (C) 2002-2014 David Quintana [gigaherz] + * Copyright (C) 2002-2010 PCSX2 Dev Team * * PCSX2 is free software: you can redistribute it and/or modify it under the terms * of the GNU Lesser General Public License as published by the Free Software Found- @@ -31,8 +31,8 @@ EXPORT_C_(void) smap_write32(u32 addr, u32 value); EXPORT_C_(void) -smap_readDMA8Mem(u32 *pMem, int size); +smap_readDMA8Mem(u32* pMem, int size); EXPORT_C_(void) -smap_writeDMA8Mem(u32 *pMem, int size); +smap_writeDMA8Mem(u32* pMem, int size); EXPORT_C_(void) smap_async(u32 cycles);