Some code cleanups for the new vtlb optimization (no intentional functional changes -- just deleted unused code and converted all of vtlb to the new emitter syntax. Let's hope I didn't typo anything!)

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1138 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
Jake.Stine 2009-05-06 12:37:37 +00:00
parent 1cf028ccf5
commit 2bf04882e3
7 changed files with 91 additions and 151 deletions

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@ -18,6 +18,8 @@
#pragma once #pragma once
#include "MemoryTypes.h"
extern u8 *psxM; extern u8 *psxM;
extern u8 *psxP; extern u8 *psxP;
extern u8 *psxH; extern u8 *psxH;

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@ -23,24 +23,9 @@
#endif #endif
//#define ENABLECACHE //#define ENABLECACHE
#include "MemoryTypes.h"
#include "vtlb.h" #include "vtlb.h"
namespace Ps2MemSize
{
static const uint Base = 0x02000000; // 32 MB main memory!
static const uint Rom = 0x00400000; // 4 MB main rom
static const uint Rom1 = 0x00040000; // DVD player
static const uint Rom2 = 0x00080000; // Chinese rom extension (?)
static const uint ERom = 0x001C0000; // DVD player extensions (?)
static const uint Hardware = 0x00010000;
static const uint Scratch = 0x00004000;
static const uint IopRam = 0x00200000; // 2MB main ram on the IOP.
static const uint IopHardware = 0x00010000;
static const uint GSregs = 0x00002000; // 8k for the GS registers and stuff.
}
extern u8 *psM; //32mb Main Ram extern u8 *psM; //32mb Main Ram
extern u8 *psR; //4mb rom area extern u8 *psR; //4mb rom area
extern u8 *psR1; //256kb rom1 area (actually 196kb, but can't mask this) extern u8 *psR1; //256kb rom1 area (actually 196kb, but can't mask this)
@ -56,7 +41,6 @@ extern u8 *psS; //0.015 mb, scratch pad
#define PS2MEM_EROM psER #define PS2MEM_EROM psER
#define PS2MEM_SCRATCH psS #define PS2MEM_SCRATCH psS
extern u8 g_RealGSMem[Ps2MemSize::GSregs];
#define PS2MEM_GS g_RealGSMem #define PS2MEM_GS g_RealGSMem
#define PS2GS_BASE(mem) (g_RealGSMem+(mem&0x13ff)) #define PS2GS_BASE(mem) (g_RealGSMem+(mem&0x13ff))
@ -174,34 +158,5 @@ extern void mmap_ClearCpuBlock( uint offset );
#define memWrite64 vtlb_memWrite64 #define memWrite64 vtlb_memWrite64
#define memWrite128 vtlb_memWrite128 #define memWrite128 vtlb_memWrite128
#define _eeReadConstMem8 0&&
#define _eeReadConstMem16 0&&
#define _eeReadConstMem32 0&&
#define _eeReadConstMem128 0&&
#define _eeWriteConstMem8 0&&
#define _eeWriteConstMem16 0&&
#define _eeWriteConstMem32 0&&
#define _eeWriteConstMem64 0&&
#define _eeWriteConstMem128 0&&
#define _eeMoveMMREGtoR 0&&
// extra ops
// These allow the old unused const versions of various HW accesses to continue to compile.
// (code left in for reference purposes, but is not needed by Vtlb)
#define _eeWriteConstMem16OP 0&&
#define _eeWriteConstMem32OP 0&&
#define recMemConstRead8 0&&
#define recMemConstRead16 0&&
#define recMemConstRead32 0&&
#define recMemConstRead64 0&&
#define recMemConstRead128 0&&
#define recMemConstWrite8 0&&
#define recMemConstWrite16 0&&
#define recMemConstWrite32 0&&
#define recMemConstWrite64 0&&
#define recMemConstWrite128 0&&
extern void loadBiosRom( const char *ext, u8 *dest, long maxSize ); extern void loadBiosRom( const char *ext, u8 *dest, long maxSize );
extern u16 ba0R16(u32 mem); extern u16 ba0R16(u32 mem);

24
pcsx2/MemoryTypes.h Normal file
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@ -0,0 +1,24 @@
#pragma once
namespace Ps2MemSize
{
static const uint Base = 0x02000000; // 32 MB main memory!
static const uint Rom = 0x00400000; // 4 MB main rom
static const uint Rom1 = 0x00040000; // DVD player
static const uint Rom2 = 0x00080000; // Chinese rom extension (?)
static const uint ERom = 0x001C0000; // DVD player extensions (?)
static const uint Hardware = 0x00010000;
static const uint Scratch = 0x00004000;
static const uint IopRam = 0x00200000; // 2MB main ram on the IOP.
static const uint IopHardware = 0x00010000;
static const uint GSregs = 0x00002000; // 8k for the GS registers and stuff.
}
typedef u8 mem8_t;
typedef u16 mem16_t;
typedef u32 mem32_t;
typedef u64 mem64_t;
typedef u64 mem128_t;

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@ -1,11 +1,5 @@
#ifndef _VTLB_H_
#define _VTLB_H_
typedef u8 mem8_t; #pragma once
typedef u16 mem16_t;
typedef u32 mem32_t;
typedef u64 mem64_t;
typedef u64 mem128_t;
// Specialized function pointers for each read type // Specialized function pointers for each read type
typedef mem8_t __fastcall vtlbMemR8FP(u32 addr); typedef mem8_t __fastcall vtlbMemR8FP(u32 addr);
@ -95,5 +89,3 @@ namespace vtlb_private
PCSX2_ALIGNED_EXTERN( 64, MapData vtlbdata ); PCSX2_ALIGNED_EXTERN( 64, MapData vtlbdata );
} }
#endif

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@ -2088,6 +2088,10 @@
RelativePath="..\..\Memory.h" RelativePath="..\..\Memory.h"
> >
</File> </File>
<File
RelativePath="..\..\MemoryTypes.h"
>
</File>
<File <File
RelativePath="..\..\x86\ix86-32\recVTLB.cpp" RelativePath="..\..\x86\ix86-32\recVTLB.cpp"
> >

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@ -344,8 +344,7 @@ int _flushUnusedConstReg()
// recAllocStackMem -- an optimization trick to write data to a location so that // recAllocStackMem -- an optimization trick to write data to a location so that
// recompiled code can reference it later on during execution. // recompiled code can reference it later on during execution.
// //
// Intended use is for setting up 128 bit SSE immediates, and for compiling a // Intended use is for setting up 64/128 bit SSE immediates, primarily.
// struct-worth of const data for calling a function/handler (vtlb).
// //
u32* recAllocStackMem(int size, int align) u32* recAllocStackMem(int size, int align)
{ {

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@ -155,86 +155,61 @@ void iMOV64_Smart( const ModSibBase& destRm, const ModSibBase& srcRm )
cont: cont:
........ ........
*/ */
/*template< u32 ReadOrWrite, u32 bitType >
static __naked void _indirectMagicNaked()
{
enum
{
OffsetRWFT = (128*4*2*bitType) + (128*4*ReadOrWrite)
};
__asm
{
movzx eax, al
push ebx // return address - the indirect handler will return to this.
sub ecx, 0x80000000
sub ecx, eax
// jump to the indirect handler, which is a __fastcall C++ function.
// [edx is address, ecx is data, and the stack si the return address]
jmp [eax*4 + vtlbdata.RWFT + OffsetRWFT]
}
}*/
namespace vtlb_private namespace vtlb_private
{ {
// ------------------------------------------------------------------------
// Prepares eax, ecx, and, ebx for Direct or Indirect operations.
// Returns the writeback pointer for ebx (return address from indirect handling)
//
static uptr* DynGen_PrepRegs()
{
xMOV( eax, ecx );
xSHR( eax, VTLB_PAGE_BITS );
xMOV( eax, ptr[(eax*4) + vtlbdata.vmap] );
xMOV( ebx, 0xcdcdcdcd );
uptr* writeback = ((uptr*)xGetPtr()) - 1;
xADD( ecx, eax );
return writeback;
}
// ------------------------------------------------------------------------
static void DynGen_DirectRead( u32 bits, bool sign ) static void DynGen_DirectRead( u32 bits, bool sign )
{ {
switch( bits ) switch( bits )
{ {
case 8: case 8:
if( sign ) if( sign )
MOVSX32Rm8toR(EAX,ECX); xMOVSX( eax, ptr8[ecx] );
else else
MOVZX32Rm8toR(EAX,ECX); xMOVZX( eax, ptr8[ecx] );
break; break;
case 16: case 16:
if( sign ) if( sign )
MOVSX32Rm16toR(EAX,ECX); xMOVSX( eax, ptr16[ecx] );
else else
MOVZX32Rm16toR(EAX,ECX); xMOVZX( eax, ptr16[ecx] );
break; break;
case 32: case 32:
MOV32RmtoR(EAX,ECX); xMOV( eax, ptr[ecx] );
break; break;
case 64: case 64:
iMOV64_Smart(ptr[edx],ptr[ecx]); iMOV64_Smart( ptr[edx], ptr[ecx] );
break; break;
case 128: case 128:
iMOV128_SSE(ptr[edx],ptr[ecx]); iMOV128_SSE( ptr[edx], ptr[ecx] );
break; break;
jNO_DEFAULT jNO_DEFAULT
} }
} }
// ------------------------------------------------------------------------
static void DynGen_IndirectRead( u32 bits )
{
int szidx;
switch( bits )
{
case 8: szidx=0; break;
case 16: szidx=1; break;
case 32: szidx=2; break;
case 64: szidx=3; break;
case 128: szidx=4; break;
jNO_DEFAULT
}
MOVZX32R8toR(EAX,EAX);
SUB32ItoR(ECX,0x80000000);
SUB32RtoR(ECX,EAX);
xCALL( ptr32[(eax*4) + vtlbdata.RWFT[szidx][0]] );
}
// ------------------------------------------------------------------------ // ------------------------------------------------------------------------
static void DynGen_DirectWrite( u32 bits ) static void DynGen_DirectWrite( u32 bits )
{ {
@ -242,21 +217,23 @@ namespace vtlb_private
{ {
//8 , 16, 32 : data on EDX //8 , 16, 32 : data on EDX
case 8: case 8:
MOV8RtoRm(ECX,EDX); xMOV( ptr[ecx], dl );
break; break;
case 16: case 16:
MOV16RtoRm(ECX,EDX); xMOV( ptr[ecx], dx );
break; break;
case 32: case 32:
MOV32RtoRm(ECX,EDX); xMOV( ptr[ecx], edx );
break; break;
case 64: case 64:
iMOV64_Smart(ptr[ecx],ptr[edx]); iMOV64_Smart( ptr[ecx], ptr[edx] );
break; break;
case 128: case 128:
iMOV128_SSE(ptr[ecx],ptr[edx]); iMOV128_SSE( ptr[ecx], ptr[edx] );
break; break;
} }
} }
@ -329,7 +306,7 @@ void vtlb_dynarec_init()
xSUB( ecx, eax ); xSUB( ecx, eax );
// jump to the indirect handler, which is a __fastcall C++ function. // jump to the indirect handler, which is a __fastcall C++ function.
// [edx is address, ecx is data] // [ecx is address, edx is data]
xCALL( ptr32[(eax*4) + vtlbdata.RWFT[bits][mode]] ); xCALL( ptr32[(eax*4) + vtlbdata.RWFT[bits][mode]] );
xJMP( ebx ); xJMP( ebx );
} }
@ -344,12 +321,7 @@ void vtlb_DynGenRead64(u32 bits)
{ {
jASSUME( bits == 64 || bits == 128 ); jASSUME( bits == 64 || bits == 128 );
xMOV( eax, ecx ); uptr* writeback = DynGen_PrepRegs();
xSHR( eax, VTLB_PAGE_BITS );
xMOV( eax, ptr[(eax*4) + vtlbdata.vmap] );
xMOV( ebx, 0xcdcdcdcd );
uptr* writeback = ((uptr*)xGetPtr()) - 1;
xADD( ecx, eax );
DynGen_IndirectDispatch( 0, bits ); DynGen_IndirectDispatch( 0, bits );
DynGen_DirectRead( bits, false ); DynGen_DirectRead( bits, false );
@ -365,33 +337,28 @@ void vtlb_DynGenRead32(u32 bits, bool sign)
{ {
jASSUME( bits <= 32 ); jASSUME( bits <= 32 );
xMOV( eax, ecx ); uptr* writeback = DynGen_PrepRegs();
xSHR( eax, VTLB_PAGE_BITS );
xMOV( eax, ptr[(eax*4) + vtlbdata.vmap] );
xMOV( ebx, 0xcdcdcdcd );
uptr* writeback = ((uptr*)xGetPtr()) - 1;
xADD( ecx, eax );
DynGen_IndirectDispatch( 0, bits ); DynGen_IndirectDispatch( 0, bits );
DynGen_DirectRead( bits, sign ); DynGen_DirectRead( bits, sign );
*writeback = (uptr)xGetPtr(); *writeback = (uptr)xGetPtr();
// perform sign extension on the result: // perform sign extension on the result:
if( bits==8 ) if( bits == 8 )
{ {
if( sign ) if( sign )
MOVSX32R8toR(EAX,EAX); xMOVSX( eax, al );
else else
MOVZX32R8toR(EAX,EAX); xMOVZX( eax, al );
} }
else if( bits==16 ) else if( bits == 16 )
{ {
if( sign ) if( sign )
MOVSX32R16toR(EAX,EAX); xMOVSX( eax, ax );
else else
MOVZX32R16toR(EAX,EAX); xMOVZX( eax, ax );
} }
} }
@ -407,11 +374,11 @@ void vtlb_DynGenRead64_Const( u32 bits, u32 addr_const )
switch( bits ) switch( bits )
{ {
case 64: case 64:
iMOV64_Smart(ptr[edx],ptr[ppf]); iMOV64_Smart( ptr[edx], ptr[ppf] );
break; break;
case 128: case 128:
iMOV128_SSE(ptr[edx],ptr[ppf]); iMOV128_SSE( ptr[edx], ptr[ppf] );
break; break;
jNO_DEFAULT jNO_DEFAULT
@ -430,8 +397,8 @@ void vtlb_DynGenRead64_Const( u32 bits, u32 addr_const )
case 128: szidx=4; break; case 128: szidx=4; break;
} }
MOV32ItoR( ECX, paddr ); xMOV( ecx, paddr );
CALLFunc( (int)vtlbdata.RWFT[szidx][0][handler] ); xCALL( vtlbdata.RWFT[szidx][0][handler] );
} }
} }
@ -466,7 +433,7 @@ void vtlb_DynGenRead32_Const( u32 bits, bool sign, u32 addr_const )
break; break;
case 32: case 32:
MOV32MtoR(EAX,ppf); xMOV( eax, ptr[ppf] );
break; break;
} }
} }
@ -487,12 +454,12 @@ void vtlb_DynGenRead32_Const( u32 bits, bool sign, u32 addr_const )
// Shortcut for the INTC_STAT register, which many games like to spin on heavily. // Shortcut for the INTC_STAT register, which many games like to spin on heavily.
if( (bits == 32) && !Config.Hacks.INTCSTATSlow && (paddr == INTC_STAT) ) if( (bits == 32) && !Config.Hacks.INTCSTATSlow && (paddr == INTC_STAT) )
{ {
MOV32MtoR( EAX, (uptr)&psHu32( INTC_STAT ) ); xMOV( eax, &psHu32( INTC_STAT ) );
} }
else else
{ {
MOV32ItoR( ECX, paddr ); xMOV( ecx, paddr );
CALLFunc( (int)vtlbdata.RWFT[szidx][0][handler] ); xCALL( vtlbdata.RWFT[szidx][0][handler] );
// perform sign extension on the result: // perform sign extension on the result:
@ -519,12 +486,7 @@ void vtlb_DynGenRead32_Const( u32 bits, bool sign, u32 addr_const )
void vtlb_DynGenWrite(u32 sz) void vtlb_DynGenWrite(u32 sz)
{ {
xMOV( eax, ecx ); uptr* writeback = DynGen_PrepRegs();
xSHR( eax, VTLB_PAGE_BITS );
xMOV( eax, ptr[(eax*4) + vtlbdata.vmap] );
xMOV( ebx, 0xcdcdcdcd );
uptr* writeback = ((uptr*)xGetPtr()) - 1;
xADD( ecx, eax );
DynGen_IndirectDispatch( 1, sz ); DynGen_IndirectDispatch( 1, sz );
DynGen_DirectWrite( sz ); DynGen_DirectWrite( sz );
@ -547,13 +509,15 @@ void vtlb_DynGenWrite_Const( u32 bits, u32 addr_const )
{ {
//8 , 16, 32 : data on EDX //8 , 16, 32 : data on EDX
case 8: case 8:
MOV8RtoM(ppf,EDX); xMOV( ptr[ppf], dl );
break; break;
case 16: case 16:
MOV16RtoM(ppf,EDX); xMOV( ptr[ppf], dx );
break; break;
case 32: case 32:
MOV32RtoM(ppf,EDX); xMOV( ptr[ppf], edx );
break; break;
case 64: case 64:
@ -582,8 +546,8 @@ void vtlb_DynGenWrite_Const( u32 bits, u32 addr_const )
case 128: szidx=4; break; case 128: szidx=4; break;
} }
MOV32ItoR( ECX, paddr ); xMOV( ecx, paddr );
CALLFunc( (int)vtlbdata.RWFT[szidx][1][handler] ); xCALL( vtlbdata.RWFT[szidx][1][handler] );
} }
} }