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Counters fix from tmkk -- a rarely used gate mode of the EE counters was being handled incorrectly. 

Added FreezeMMXRegs to SPU2async in IopDma, which is callable directly from the recompilers.

SPU2-X: Fixed another reverb bug, this one put too much reverb on voices and sndfx.

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@530 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
Jake.Stine 2009-02-18 18:05:58 +00:00
parent dc306bf64c
commit 2a389da932
6 changed files with 30 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

26
pcsx2/Counters.cpp
View File

@ -409,7 +409,7 @@ static __forceinline void VSyncStart(u32 sCycle)
hwIntcIrq(2); hwIntcIrq(2);
psxVBlankStart(); psxVBlankStart();
if (gates) rcntStartGate(0x8, sCycle); // Counters Start Gate code if (gates) rcntStartGate(true, sCycle); // Counters Start Gate code
if (Config.Patch) applypatch(1); // Apply patches (ToDo: clean up patch code) if (Config.Patch) applypatch(1); // Apply patches (ToDo: clean up patch code)
// INTC - VB Blank Start Hack -- // INTC - VB Blank Start Hack --
@ -452,7 +452,7 @@ static __forceinline void VSyncEnd(u32 sCycle)
hwIntcIrq(3); // HW Irq hwIntcIrq(3); // HW Irq
psxVBlankEnd(); // psxCounters vBlank End psxVBlankEnd(); // psxCounters vBlank End
if (gates) rcntEndGate(0x8, sCycle); // Counters End Gate Code if (gates) rcntEndGate(true, sCycle); // Counters End Gate Code
frameLimit(); // limit FPS frameLimit(); // limit FPS
// This doesn't seem to be needed here. Games only seem to break with regard to the // This doesn't seem to be needed here. Games only seem to break with regard to the
@ -472,7 +472,7 @@ __forceinline void rcntUpdate_hScanline()
//iopBranchAction = 1; //iopBranchAction = 1;
if (counters[4].modeval & MODE_HBLANK) { //HBLANK Start if (counters[4].modeval & MODE_HBLANK) { //HBLANK Start
rcntStartGate(0, counters[4].sCycle); rcntStartGate(false, counters[4].sCycle);
psxCheckStartGate16(0); psxCheckStartGate16(0);
// Setup the hRender's start and end cycle information: // Setup the hRender's start and end cycle information:
@ -483,7 +483,7 @@ __forceinline void rcntUpdate_hScanline()
else { //HBLANK END / HRENDER Begin else { //HBLANK END / HRENDER Begin
if (CSRw & 0x4) GSCSRr |= 4; // signal if (CSRw & 0x4) GSCSRr |= 4; // signal
if (!(GSIMR&0x400)) gsIrq(); if (!(GSIMR&0x400)) gsIrq();
if (gates) rcntEndGate(0, counters[4].sCycle); if (gates) rcntEndGate(false, counters[4].sCycle);
if (psxhblankgate) psxCheckEndGate16(0); if (psxhblankgate) psxCheckEndGate16(0);
// set up the hblank's start and end cycle information: // set up the hblank's start and end cycle information:
@ -637,14 +637,14 @@ static void _rcntSetGate( int index )
} }
// mode - 0 means hblank source, 8 means vblank source. // mode - 0 means hblank source, 8 means vblank source.
void __fastcall rcntStartGate(uint mode, u32 sCycle) void __fastcall rcntStartGate(bool isVblank, u32 sCycle)
{ {
int i; int i;
for (i=0; i <=3; i++) { for (i=0; i <=3; i++) {
//if ((mode == 0) && ((counters[i].mode & 0x83) == 0x83)) //if ((mode == 0) && ((counters[i].mode & 0x83) == 0x83))
if ((mode == 0) && counters[i].mode.IsCounting && (counters[i].mode.ClockSource == 3) ) if (!isVblank && counters[i].mode.IsCounting && (counters[i].mode.ClockSource == 3) )
{ {
// Update counters using the hblank as the clock. This keeps the hblank source // Update counters using the hblank as the clock. This keeps the hblank source
// nicely in sync with the counters and serves as an optimization also, since these // nicely in sync with the counters and serves as an optimization also, since these
@ -659,7 +659,7 @@ void __fastcall rcntStartGate(uint mode, u32 sCycle)
} }
if (!(gates & (1<<i))) continue; if (!(gates & (1<<i))) continue;
if (counters[i].mode.GateSource != mode) continue; if ((!!counters[i].mode.GateSource) != isVblank) continue;
switch (counters[i].mode.GateMode) { switch (counters[i].mode.GateMode) {
case 0x0: //Count When Signal is low (off) case 0x0: //Count When Signal is low (off)
@ -670,7 +670,7 @@ void __fastcall rcntStartGate(uint mode, u32 sCycle)
counters[i].mode.IsCounting = 1; counters[i].mode.IsCounting = 1;
counters[i].sCycleT = sCycle; counters[i].sCycleT = sCycle;
EECNT_LOG("EE Counter[%d] %s StartGate Type0, count = %x\n", EECNT_LOG("EE Counter[%d] %s StartGate Type0, count = %x\n",
mode ? "vblank" : "hblank", i, counters[i].count ); isVblank ? "vblank" : "hblank", i, counters[i].count );
break; break;
case 0x2: // reset and start counting on vsync end case 0x2: // reset and start counting on vsync end
@ -684,7 +684,7 @@ void __fastcall rcntStartGate(uint mode, u32 sCycle)
counters[i].target &= 0xffff; counters[i].target &= 0xffff;
counters[i].sCycleT = sCycle; counters[i].sCycleT = sCycle;
EECNT_LOG("EE Counter[%d] %s StartGate Type%d, count = %x\n", EECNT_LOG("EE Counter[%d] %s StartGate Type%d, count = %x\n",
mode ? "vblank" : "hblank", i, counters[i].mode.GateMode, counters[i].count ); isVblank ? "vblank" : "hblank", i, counters[i].mode.GateMode, counters[i].count );
break; break;
} }
} }
@ -698,13 +698,13 @@ void __fastcall rcntStartGate(uint mode, u32 sCycle)
} }
// mode - 0 means hblank signal, 8 means vblank signal. // mode - 0 means hblank signal, 8 means vblank signal.
void __fastcall rcntEndGate(uint mode, u32 sCycle) void __fastcall rcntEndGate(bool isVblank , u32 sCycle)
{ {
int i; int i;
for(i=0; i <=3; i++) { //Gates for counters for(i=0; i <=3; i++) { //Gates for counters
if (!(gates & (1<<i))) continue; if (!(gates & (1<<i))) continue;
if (counters[i].mode.GateSource != mode) continue; if ((!!counters[i].mode.GateSource) != isVblank) continue;
switch (counters[i].mode.GateMode) { switch (counters[i].mode.GateMode) {
case 0x0: //Count When Signal is low (off) case 0x0: //Count When Signal is low (off)
@ -717,7 +717,7 @@ void __fastcall rcntEndGate(uint mode, u32 sCycle)
counters[i].mode.IsCounting = 0; counters[i].mode.IsCounting = 0;
counters[i].sCycleT = sCycle; counters[i].sCycleT = sCycle;
EECNT_LOG("EE Counter[%d] %s EndGate Type0, count = %x\n", EECNT_LOG("EE Counter[%d] %s EndGate Type0, count = %x\n",
mode ? "vblank" : "hblank", i, counters[i].count ); isVblank ? "vblank" : "hblank", i, counters[i].count );
break; break;
case 0x1: // Reset and start counting on Vsync start case 0x1: // Reset and start counting on Vsync start
@ -731,7 +731,7 @@ void __fastcall rcntEndGate(uint mode, u32 sCycle)
counters[i].target &= 0xffff; counters[i].target &= 0xffff;
counters[i].sCycleT = sCycle; counters[i].sCycleT = sCycle;
EECNT_LOG("EE Counter[%d] %s EndGate Type%d, count = %x\n", EECNT_LOG("EE Counter[%d] %s EndGate Type%d, count = %x\n",
mode ? "vblank" : "hblank", i, counters[i].mode.GateMode, counters[i].count ); isVblank ? "vblank" : "hblank", i, counters[i].mode.GateMode, counters[i].count );
break; break;
} }
} }

4
pcsx2/Counters.h
View File

@ -133,8 +133,8 @@ extern bool rcntUpdate_vSync();
extern bool rcntUpdate(); extern bool rcntUpdate();
extern void rcntInit(); extern void rcntInit();
extern void __fastcall rcntStartGate(unsigned int mode, u32 sCycle); extern void __fastcall rcntStartGate(bool mode, u32 sCycle);
extern void __fastcall rcntEndGate(unsigned int mode, u32 sCycle); extern void __fastcall rcntEndGate(bool mode, u32 sCycle);
extern void __fastcall rcntWcount(int index, u32 value); extern void __fastcall rcntWcount(int index, u32 value);
extern void __fastcall rcntWmode(int index, u32 value); extern void __fastcall rcntWmode(int index, u32 value);
extern void __fastcall rcntWtarget(int index, u32 value); extern void __fastcall rcntWtarget(int index, u32 value);

2
pcsx2/IopDma.cpp
View File

@ -42,7 +42,9 @@ static void __fastcall psxDmaGeneric(u32 madr, u32 bcr, u32 chcr, u32 spuCore, _
if(SPU2async) if(SPU2async)
{ {
FreezeMMXRegs( 1 );
SPU2async(psxRegs.cycle - psxCounters[6].sCycleT); SPU2async(psxRegs.cycle - psxCounters[6].sCycleT);
FreezeMMXRegs( 0 );
//Console::Status("cycles sent to SPU2 %x\n", psxRegs.cycle - psxCounters[6].sCycleT); //Console::Status("cycles sent to SPU2 %x\n", psxRegs.cycle - psxCounters[6].sCycleT);
psxCounters[6].sCycleT = psxRegs.cycle; psxCounters[6].sCycleT = psxRegs.cycle;

10
plugins/spu2-x/src/DllInterface.cpp
View File

@ -349,9 +349,9 @@ EXPORT_C_(void) SPU2async(u32 cycles)
EXPORT_C_(void) SPU2irqCallback(void (*SPU2callback)(),void (*DMA4callback)(),void (*DMA7callback)()) EXPORT_C_(void) SPU2irqCallback(void (*SPU2callback)(),void (*DMA4callback)(),void (*DMA7callback)())
{ {
_irqcallback=SPU2callback; _irqcallback = SPU2callback;
dma4callback=DMA4callback; dma4callback = DMA4callback;
dma7callback=DMA7callback; dma7callback = DMA7callback;
} }
EXPORT_C_(u16) SPU2read(u32 rmem) EXPORT_C_(u16) SPU2read(u32 rmem)
@ -359,8 +359,6 @@ EXPORT_C_(u16) SPU2read(u32 rmem)
// if(!replay_mode) // if(!replay_mode)
// s2r_readreg(Cycles,rmem); // s2r_readreg(Cycles,rmem);
if(hasPtr) TimeUpdate(*cPtr);
u16 ret=0xDEAD; u32 core=0, mem=rmem&0xFFFF, omem=mem; u16 ret=0xDEAD; u32 core=0, mem=rmem&0xFFFF, omem=mem;
if (mem & 0x400) { omem^=0x400; core=1; } if (mem & 0x400) { omem^=0x400; core=1; }
@ -419,8 +417,6 @@ EXPORT_C_(void) SPU2write(u32 rmem, u16 value)
} }
else else
{ {
if(hasPtr) TimeUpdate(*cPtr);
if (rmem>>16 == 0x1f80) if (rmem>>16 == 0x1f80)
SPU_ps1_write(rmem,value); SPU_ps1_write(rmem,value);
else else

18
plugins/spu2-x/src/Spu2.cpp
View File

@ -697,28 +697,24 @@ u16 SPU_ps1_read(u32 mem)
} }
// Ah the joys of endian-specific code! :D // Ah the joys of endian-specific code! :D
static __forceinline u32 SetHiWord( u32& src, u16 value ) static __forceinline void SetHiWord( u32& src, u16 value )
{ {
((u16*)&src)[1] = value; ((u16*)&src)[1] = value;
return src;
} }
static __forceinline u32 SetLoWord( u32& src, u16 value ) static __forceinline void SetLoWord( u32& src, u16 value )
{ {
((u16*)&src)[0] = value; ((u16*)&src)[0] = value;
return src;
} }
static __forceinline s32 SetHiWord( s32& src, u16 value ) static __forceinline void SetHiWord( s32& src, u16 value )
{ {
((u16*)&src)[1] = value; ((u16*)&src)[1] = value;
return src;
} }
static __forceinline s32 SetLoWord( s32& src, u16 value ) static __forceinline void SetLoWord( s32& src, u16 value )
{ {
((u16*)&src)[0] = value; ((u16*)&src)[0] = value;
return src;
} }
static __forceinline u16 GetHiWord( u32& src ) static __forceinline u16 GetHiWord( u32& src )
@ -941,7 +937,11 @@ __forceinline void SPU2_FastWrite( u32 rmem, u16 value )
{ \ { \
const uint start_bit = hiword ? 16 : 0; \ const uint start_bit = hiword ? 16 : 0; \
const uint end_bit = hiword ? 24 : 16; \ const uint end_bit = hiword ? 24 : 16; \
const u32 result = hiword ? SetHiWord( thiscore.Regs.reg_out, value ) : SetLoWord( thiscore.Regs.reg_out, value ); \ const u32 result = thiscore.Regs.reg_out; \
if( hiword ) \
SetHiWord( thiscore.Regs.reg_out, value ); \
else \
SetLoWord( thiscore.Regs.reg_out, value ); \
if( result == thiscore.Regs.reg_out ) return; \ if( result == thiscore.Regs.reg_out ) return; \
\ \
thiscore.Regs.reg_out = result; \ thiscore.Regs.reg_out = result; \

2
plugins/spu2-x/src/Win32/Config.cpp
View File

@ -159,7 +159,7 @@ BOOL CALLBACK ConfigProc(HWND hWnd,UINT uMsg,WPARAM wParam,LPARAM lParam)
SendDialogMsg( hWnd, IDC_INTERPOLATE, CB_RESETCONTENT,0,0 ); SendDialogMsg( hWnd, IDC_INTERPOLATE, CB_RESETCONTENT,0,0 );
SendDialogMsg( hWnd, IDC_INTERPOLATE, CB_ADDSTRING,0,(LPARAM) _T("0 - Nearest (none/fast)") ); SendDialogMsg( hWnd, IDC_INTERPOLATE, CB_ADDSTRING,0,(LPARAM) _T("0 - Nearest (none/fast)") );
SendDialogMsg( hWnd, IDC_INTERPOLATE, CB_ADDSTRING,0,(LPARAM) _T("1 - Linear (recommended)") ); SendDialogMsg( hWnd, IDC_INTERPOLATE, CB_ADDSTRING,0,(LPARAM) _T("1 - Linear (recommended)") );
SendDialogMsg( hWnd, IDC_INTERPOLATE, CB_ADDSTRING,0,(LPARAM) _T("2 - Cubic (better/slower)") ); SendDialogMsg( hWnd, IDC_INTERPOLATE, CB_ADDSTRING,0,(LPARAM) _T("2 - Cubic (not good with effects)") );
SendDialogMsg( hWnd, IDC_INTERPOLATE, CB_SETCURSEL,Interpolation,0 ); SendDialogMsg( hWnd, IDC_INTERPOLATE, CB_SETCURSEL,Interpolation,0 );
SendDialogMsg( hWnd, IDC_OUTPUT, CB_RESETCONTENT,0,0 ); SendDialogMsg( hWnd, IDC_OUTPUT, CB_RESETCONTENT,0,0 );