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pcsx2: Remove unnecessary aMax/aMin macros

This commit is contained in:
Jonathan Li 2017-04-30 23:41:19 +01:00
parent 1d364f1991
commit 29eed182c2
6 changed files with 6 additions and 9 deletions
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2
pcsx2/Vif_Codes.cpp
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@ -143,7 +143,7 @@ template<int idx> __fi int _vifCode_Direct(int pass, const u8* data, bool isDire
pass2 { pass2 {
const char* name = isDirectHL ? "DirectHL" : "Direct"; const char* name = isDirectHL ? "DirectHL" : "Direct";
GIF_TRANSFER_TYPE tranType = isDirectHL ? GIF_TRANS_DIRECTHL : GIF_TRANS_DIRECT; GIF_TRANSFER_TYPE tranType = isDirectHL ? GIF_TRANS_DIRECTHL : GIF_TRANS_DIRECT;
uint size = aMin(vif1.vifpacketsize, vif1.tag.size) * 4; // Get size in bytes uint size = std::min(vif1.vifpacketsize, vif1.tag.size) * 4; // Get size in bytes
uint ret = gifUnit.TransferGSPacketData(tranType, (u8*)data, size); uint ret = gifUnit.TransferGSPacketData(tranType, (u8*)data, size);
vif1.tag.size -= ret/4; // Convert to u32's vif1.tag.size -= ret/4; // Convert to u32's

2
pcsx2/x86/microVU_Analyze.inl
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@ -454,7 +454,7 @@ static void analyzeBranchVI(mV, int xReg, bool& infoVar) {
__fi void analyzeBranchVI(mV, int xReg, bool& infoVar) { __fi void analyzeBranchVI(mV, int xReg, bool& infoVar) {
if (!xReg) return; if (!xReg) return;
int i; int i;
int iEnd = aMin(5, (mVUcount+1)); int iEnd = std::min(5, mVUcount + 1);
int bPC = iPC; int bPC = iPC;
incPC2(-2); incPC2(-2);
for (i = 0; i < iEnd; i++) { for (i = 0; i < iEnd; i++) {

3
pcsx2/x86/newVif.h
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@ -23,9 +23,6 @@
using namespace x86Emitter; using namespace x86Emitter;
#define aMax(x, y) std::max(x,y)
#define aMin(x, y) std::min(x,y)
// newVif_HashBucket.h uses this typedef, so it has to be declared first. // newVif_HashBucket.h uses this typedef, so it has to be declared first.
typedef u32 (__fastcall *nVifCall)(void*, const void*); typedef u32 (__fastcall *nVifCall)(void*, const void*);
typedef void (__fastcall *nVifrecCall)(uptr dest, uptr src); typedef void (__fastcall *nVifrecCall)(uptr dest, uptr src);

2
pcsx2/x86/newVif_Dynarec.cpp
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@ -95,7 +95,7 @@ __fi void VifUnpackSSE_Dynarec::SetMasks(int cS) const {
void VifUnpackSSE_Dynarec::doMaskWrite(const xRegisterSSE& regX) const { void VifUnpackSSE_Dynarec::doMaskWrite(const xRegisterSSE& regX) const {
pxAssertDev(regX.Id <= 1, "Reg Overflow! XMM2 thru XMM6 are reserved for masking."); pxAssertDev(regX.Id <= 1, "Reg Overflow! XMM2 thru XMM6 are reserved for masking.");
int cc = aMin(vCL, 3); int cc = std::min(vCL, 3);
u32 m0 = (vB.mask >> (cc * 8)) & 0xff; //The actual mask example 0xE4 (protect, col, row, clear) u32 m0 = (vB.mask >> (cc * 8)) & 0xff; //The actual mask example 0xE4 (protect, col, row, clear)
u32 m3 = ((m0 & 0xaa)>>1) & ~m0; //all the upper bits (cols shifted right) cancelling out any write protects 0x10 u32 m3 = ((m0 & 0xaa)>>1) & ~m0; //all the upper bits (cols shifted right) cancelling out any write protects 0x10
u32 m2 = (m0 & 0x55) & (~m0>>1); // all the lower bits (rows)cancelling out any write protects 0x04 u32 m2 = (m0 & 0x55) & (~m0>>1); // all the lower bits (rows)cancelling out any write protects 0x04

4
pcsx2/x86/newVif_Unpack.cpp
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@ -100,7 +100,7 @@ _vifT int nVifUnpack(const u8* data) {
VIFregisters& vifRegs = vifXRegs; VIFregisters& vifRegs = vifXRegs;
const uint wl = vifRegs.cycle.wl ? vifRegs.cycle.wl : 256; const uint wl = vifRegs.cycle.wl ? vifRegs.cycle.wl : 256;
const uint ret = aMin(vif.vifpacketsize, vif.tag.size); const uint ret = std::min(vif.vifpacketsize, vif.tag.size);
const bool isFill = (vifRegs.cycle.cl < wl); const bool isFill = (vifRegs.cycle.cl < wl);
s32 size = ret << 2; s32 size = ret << 2;
@ -252,7 +252,7 @@ __ri void __fastcall _nVifUnpackLoop(const u8* data) {
} }
else { else {
//DevCon.WriteLn("SSE Unpack!"); //DevCon.WriteLn("SSE Unpack!");
uint cl3 = aMin(vif.cl,3); uint cl3 = std::min(vif.cl, 3);
fnbase[cl3](dest, data); fnbase[cl3](dest, data);
} }

2
pcsx2/x86/newVif_UnpackSSE.cpp
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@ -387,7 +387,7 @@ VifUnpackSSE_Simple::VifUnpackSSE_Simple(bool usn_, bool domask_, int curCycle_)
void VifUnpackSSE_Simple::doMaskWrite(const xRegisterSSE& regX) const { void VifUnpackSSE_Simple::doMaskWrite(const xRegisterSSE& regX) const {
xMOVAPS(xmm7, ptr[dstIndirect]); xMOVAPS(xmm7, ptr[dstIndirect]);
int offX = aMin(curCycle, 3); int offX = std::min(curCycle, 3);
xPAND(regX, ptr32[nVifMask[0][offX]]); xPAND(regX, ptr32[nVifMask[0][offX]]);
xPAND(xmm7, ptr32[nVifMask[1][offX]]); xPAND(xmm7, ptr32[nVifMask[1][offX]]);
xPOR (regX, ptr32[nVifMask[2][offX]]); xPOR (regX, ptr32[nVifMask[2][offX]]);