diff --git a/pcsx2/x86/iFPU.cpp b/pcsx2/x86/iFPU.cpp
index 3b477df90a..afcba2ede2 100644
--- a/pcsx2/x86/iFPU.cpp
+++ b/pcsx2/x86/iFPU.cpp
@@ -510,7 +510,7 @@ u32 __fastcall FPU_MUL_HACK(u32 s, u32 t)
 
 void FPU_MUL(int regd, int regt, bool reverseOperands)
 {
-	u8 *noHack, *endMul;
+	u8 *noHack, *endMul = nullptr;
 
 	if (CHECK_FPUMULHACK)
 	{
diff --git a/pcsx2/x86/iFPUd.cpp b/pcsx2/x86/iFPUd.cpp
index f4944afda4..5caafc5a48 100644
--- a/pcsx2/x86/iFPUd.cpp
+++ b/pcsx2/x86/iFPUd.cpp
@@ -223,7 +223,7 @@ void ToPS2FPU_Full(int reg, bool flags, int absreg, bool acc, bool addsub)
 	u8 *end3 = JMP8(0);
 
 	x86SetJ8(to_underflow);
-	u8 *end4;
+	u8 *end4 = nullptr;
 	if (flags && FPU_FLAGS_UNDERFLOW) //set underflow flags if not zero
 	{
 		xXOR.PD(xRegisterSSE(absreg), xRegisterSSE(absreg));
@@ -397,7 +397,7 @@ void FPU_ADD_SUB(int tempd, int tempt) //tempd and tempt are overwritten, they a
 void FPU_MUL(int info, int regd, int sreg, int treg, bool acc)
 {
 	u8 *noHack;
-	u32 *endMul;
+	u32 *endMul = nullptr;
 
 	if (CHECK_FPUMULHACK)
 	{
diff --git a/pcsx2/x86/sVU_Lower.cpp b/pcsx2/x86/sVU_Lower.cpp
index ea0c7367f5..54c0ec3fb8 100644
--- a/pcsx2/x86/sVU_Lower.cpp
+++ b/pcsx2/x86/sVU_Lower.cpp
@@ -1000,7 +1000,7 @@ void recVUMI_SQI(VURegs *VU, int info)
 void recVUMI_ILW(VURegs *VU, int info)
 {
 	int itreg;
-	s16 imm, off;
+	s16 imm, off = 0;
 
 	if ( ( _It_ == 0 ) || ( _X_Y_Z_W == 0 ) ) return;
 	//Console.WriteLn("recVUMI_ILW");
@@ -1009,6 +1009,7 @@ void recVUMI_ILW(VURegs *VU, int info)
 	else if (_Y) off = 4;
 	else if (_Z) off = 8;
 	else if (_W) off = 12;
+	else pxAssertMsg(0, "off is 0 as default value, could be incorrect");
 
 	ADD_VI_NEEDED(_Is_);
 	itreg = ALLOCVI(_It_, MODE_WRITE);
@@ -1065,7 +1066,8 @@ void recVUMI_ISW( VURegs *VU, int info )
 //------------------------------------------------------------------
 void recVUMI_ILWR( VURegs *VU, int info )
 {
-	int off, itreg;
+	int off = 0;
+	int itreg = 0;
 
 	if ( ( _It_ == 0 ) || ( _X_Y_Z_W == 0 ) ) return;
 	//Console.WriteLn("recVUMI_ILWR");
@@ -1073,6 +1075,7 @@ void recVUMI_ILWR( VURegs *VU, int info )
 	else if (_Y) off = 4;
 	else if (_Z) off = 8;
 	else if (_W) off = 12;
+	else pxAssertMsg(0, "off is 0 as default value, could be incorrect");
 
 	ADD_VI_NEEDED(_Is_);
 	itreg = ALLOCVI(_It_, MODE_WRITE);
diff --git a/pcsx2/x86/sVU_zerorec.cpp b/pcsx2/x86/sVU_zerorec.cpp
index 5744e7aedb..dbfeeee2be 100644
--- a/pcsx2/x86/sVU_zerorec.cpp
+++ b/pcsx2/x86/sVU_zerorec.cpp
@@ -2611,7 +2611,7 @@ __declspec(naked) static void SuperVUEndProgram()
 // Flushes P/Q regs
 void SuperVUFlush(int p, int wait)
 {
-	u8* pjmp[3];
+	u8* pjmp[3] = { nullptr, nullptr, nullptr };
 	if (!(s_needFlush&(1 << p))) return;
 
 	int recwait = p ? s_recWriteP : s_recWriteQ;