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Merge branch 'xsacha-icore-cleanup' 

From PR #266

I drop sVU modification because sVU will be dropped (ifdef out) on the future
This commit is contained in:
Gregory Hainaut 2015-02-27 21:24:58 +01:00
parent f254d44030 4bb41bc267
commit 283f5236a5
13 changed files with 11 additions and 265 deletions
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1
common/build/x86emitter/x86emitter.vcxproj
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@ -97,7 +97,6 @@
</ClCompile>
</ItemDefinitionGroup>
<ItemGroup>
<ClCompile Include="..\..\src\x86emitter\3dnow.cpp" />
<ClCompile Include="..\..\src\x86emitter\cpudetect.cpp" />
<ClCompile Include="..\..\src\x86emitter\fpu.cpp" />
<ClCompile Include="..\..\src\x86emitter\groups.cpp" />

3
common/build/x86emitter/x86emitter.vcxproj.filters
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@ -27,9 +27,6 @@
</Filter>
</ItemGroup>
<ItemGroup>
<ClCompile Include="..\..\src\x86emitter\3dnow.cpp">
<Filter>Source Files</Filter>
</ClCompile>
<ClCompile Include="..\..\src\x86emitter\cpudetect.cpp">
<Filter>Source Files</Filter>
</ClCompile>

1
common/build/x86emitter/x86emitter_vs2012.vcxproj
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@ -101,7 +101,6 @@
</ClCompile>
</ItemDefinitionGroup>
<ItemGroup>
<ClCompile Include="..\..\src\x86emitter\3dnow.cpp" />
<ClCompile Include="..\..\src\x86emitter\cpudetect.cpp" />
<ClCompile Include="..\..\src\x86emitter\fpu.cpp" />
<ClCompile Include="..\..\src\x86emitter\groups.cpp" />

3
common/build/x86emitter/x86emitter_vs2012.vcxproj.filters
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@ -27,9 +27,6 @@
</Filter>
</ItemGroup>
<ItemGroup>
<ClCompile Include="..\..\src\x86emitter\3dnow.cpp">
<Filter>Source Files</Filter>
</ClCompile>
<ClCompile Include="..\..\src\x86emitter\cpudetect.cpp">
<Filter>Source Files</Filter>
</ClCompile>

1
common/build/x86emitter/x86emitter_vs2013.vcxproj
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@ -101,7 +101,6 @@
</ClCompile>
</ItemDefinitionGroup>
<ItemGroup>
<ClCompile Include="..\..\src\x86emitter\3dnow.cpp" />
<ClCompile Include="..\..\src\x86emitter\cpudetect.cpp" />
<ClCompile Include="..\..\src\x86emitter\fpu.cpp" />
<ClCompile Include="..\..\src\x86emitter\groups.cpp" />

3
common/build/x86emitter/x86emitter_vs2013.vcxproj.filters
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@ -27,9 +27,6 @@
</Filter>
</ItemGroup>
<ItemGroup>
<ClCompile Include="..\..\src\x86emitter\3dnow.cpp">
<Filter>Source Files</Filter>
</ClCompile>
<ClCompile Include="..\..\src\x86emitter\cpudetect.cpp">
<Filter>Source Files</Filter>
</ClCompile>

28
common/include/x86emitter/legacy_instructions.h
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@ -1361,31 +1361,3 @@ extern void SSE4_PMAXUD_M128_to_XMM(x86SSERegType to, uptr from);
extern void SSE4_PMINUD_M128_to_XMM(x86SSERegType to, uptr from);
extern void SSE4_PMULDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
extern void SSE4_PTEST_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
//*********************
// 3DNOW instructions *
//*********************
extern void FEMMS( void );
extern void PFCMPEQMtoR( x86IntRegType to, uptr from );
extern void PFCMPGTMtoR( x86IntRegType to, uptr from );
extern void PFCMPGEMtoR( x86IntRegType to, uptr from );
extern void PFADDMtoR( x86IntRegType to, uptr from );
extern void PFADDRtoR( x86IntRegType to, x86IntRegType from );
extern void PFSUBMtoR( x86IntRegType to, uptr from );
extern void PFSUBRtoR( x86IntRegType to, x86IntRegType from );
extern void PFMULMtoR( x86IntRegType to, uptr from );
extern void PFMULRtoR( x86IntRegType to, x86IntRegType from );
extern void PFRCPMtoR( x86IntRegType to, uptr from );
extern void PFRCPRtoR( x86IntRegType to, x86IntRegType from );
extern void PFRCPIT1RtoR( x86IntRegType to, x86IntRegType from );
extern void PFRCPIT2RtoR( x86IntRegType to, x86IntRegType from );
extern void PFRSQRTRtoR( x86IntRegType to, x86IntRegType from );
extern void PFRSQIT1RtoR( x86IntRegType to, x86IntRegType from );
extern void PF2IDMtoR( x86IntRegType to, uptr from );
extern void PI2FDMtoR( x86IntRegType to, uptr from );
extern void PI2FDRtoR( x86IntRegType to, x86IntRegType from );
extern void PFMAXMtoR( x86IntRegType to, uptr from );
extern void PFMAXRtoR( x86IntRegType to, x86IntRegType from );
extern void PFMINMtoR( x86IntRegType to, uptr from );
extern void PFMINRtoR( x86IntRegType to, x86IntRegType from );

199
common/src/x86emitter/3dnow.cpp
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@ -1,199 +0,0 @@
/* PCSX2 - PS2 Emulator for PCs
* Copyright (C) 2002-2010 PCSX2 Dev Team
*
* PCSX2 is free software: you can redistribute it and/or modify it under the terms
* of the GNU Lesser General Public License as published by the Free Software Found-
* ation, either version 3 of the License, or (at your option) any later version.
*
* PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along with PCSX2.
* If not, see <http://www.gnu.org/licenses/>.
*/
#include "PrecompiledHeader.h"
#include "legacy_internal.h"
//------------------------------------------------------------------
// 3DNOW instructions [Anyone caught dead using these will be re-killed]
//------------------------------------------------------------------
/* femms */
emitterT void FEMMS( void )
{
xWrite16( 0x0E0F );
}
emitterT void PFCMPEQMtoR( x86IntRegType to, uptr from )
{
xWrite16( 0x0F0F );
ModRM( 0, to, DISP32 );
xWrite32( from );
xWrite8( 0xB0 );
}
emitterT void PFCMPGTMtoR( x86IntRegType to, uptr from )
{
xWrite16( 0x0F0F );
ModRM( 0, to, DISP32 );
xWrite32( from );
xWrite8( 0xA0 );
}
emitterT void PFCMPGEMtoR( x86IntRegType to, uptr from )
{
xWrite16( 0x0F0F );
ModRM( 0, to, DISP32 );
xWrite32( from );
xWrite8( 0x90 );
}
emitterT void PFADDMtoR( x86IntRegType to, uptr from )
{
xWrite16( 0x0F0F );
ModRM( 0, to, DISP32 );
xWrite32( from );
xWrite8( 0x9E );
}
emitterT void PFADDRtoR( x86IntRegType to, x86IntRegType from )
{
xWrite16( 0x0F0F );
ModRM( 3, to, from );
xWrite8( 0x9E );
}
emitterT void PFSUBMtoR( x86IntRegType to, uptr from )
{
xWrite16( 0x0F0F );
ModRM( 0, to, DISP32 );
xWrite32( from );
xWrite8( 0x9A );
}
emitterT void PFSUBRtoR( x86IntRegType to, x86IntRegType from )
{
xWrite16( 0x0F0F );
ModRM( 3, to, from );
xWrite8( 0x9A );
}
emitterT void PFMULMtoR( x86IntRegType to, uptr from )
{
xWrite16( 0x0F0F );
ModRM( 0, to, DISP32 );
xWrite32( from );
xWrite8( 0xB4 );
}
emitterT void PFMULRtoR( x86IntRegType to, x86IntRegType from )
{
xWrite16( 0x0F0F );
ModRM( 3, to, from );
xWrite8( 0xB4 );
}
emitterT void PFRCPMtoR( x86IntRegType to, uptr from )
{
xWrite16( 0x0F0F );
ModRM( 0, to, DISP32 );
xWrite32( from );
xWrite8( 0x96 );
}
emitterT void PFRCPRtoR( x86IntRegType to, x86IntRegType from )
{
xWrite16( 0x0F0F );
ModRM( 3, to, from );
xWrite8( 0x96 );
}
emitterT void PFRCPIT1RtoR( x86IntRegType to, x86IntRegType from )
{
xWrite16( 0x0F0F );
ModRM( 3, to, from );
xWrite8( 0xA6 );
}
emitterT void PFRCPIT2RtoR( x86IntRegType to, x86IntRegType from )
{
xWrite16( 0x0F0F );
ModRM( 3, to, from );
xWrite8( 0xB6 );
}
emitterT void PFRSQRTRtoR( x86IntRegType to, x86IntRegType from )
{
xWrite16( 0x0F0F );
ModRM( 3, to, from );
xWrite8( 0x97 );
}
emitterT void PFRSQIT1RtoR( x86IntRegType to, x86IntRegType from )
{
xWrite16( 0x0F0F );
ModRM( 3, to, from );
xWrite8( 0xA7 );
}
emitterT void PF2IDMtoR( x86IntRegType to, uptr from )
{
xWrite16( 0x0F0F );
ModRM( 0, to, DISP32 );
xWrite32( from );
xWrite8( 0x1D );
}
emitterT void PF2IDRtoR( x86IntRegType to, x86IntRegType from )
{
xWrite16( 0x0F0F );
ModRM( 3, to, from );
xWrite8( 0x1D );
}
emitterT void PI2FDMtoR( x86IntRegType to, uptr from )
{
xWrite16( 0x0F0F );
ModRM( 0, to, DISP32 );
xWrite32( from );
xWrite8( 0x0D );
}
emitterT void PI2FDRtoR( x86IntRegType to, x86IntRegType from )
{
xWrite16( 0x0F0F );
ModRM( 3, to, from );
xWrite8( 0x0D );
}
emitterT void PFMAXMtoR( x86IntRegType to, uptr from )
{
xWrite16( 0x0F0F );
ModRM( 0, to, DISP32 );
xWrite32( from );
xWrite8( 0xA4 );
}
emitterT void PFMAXRtoR( x86IntRegType to, x86IntRegType from )
{
xWrite16( 0x0F0F );
ModRM( 3, to, from );
xWrite8( 0xA4 );
}
emitterT void PFMINMtoR( x86IntRegType to, uptr from )
{
xWrite16( 0x0F0F );
ModRM( 0, to, DISP32 );
xWrite32( from );
xWrite8( 0x94 );
}
emitterT void PFMINRtoR( x86IntRegType to, x86IntRegType from )
{
xWrite16( 0x0F0F );
ModRM( 3, to, from );
xWrite8( 0x94 );
}

1
common/src/x86emitter/CMakeLists.txt
View File

@ -93,7 +93,6 @@ endif(CMAKE_BUILD_TYPE STREQUAL Release)
# variable with all sources of this library
set(x86emitterSources
3dnow.cpp
cpudetect.cpp
fpu.cpp
groups.cpp

7
common/src/x86emitter/simd.cpp
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@ -829,13 +829,6 @@ __emitinline void xEXTRACTPS( const xIndirect32& dest, const xRegisterSSE& from,
// the FPU results will be invalid.
__fi void xEMMS() { xWrite16( 0x770F ); }
// [3DNow] Same as EMMS, but an AMD special version which may (or may not) leave MMX regs
// in an undefined state (which is fine, since presumably you're done using them anyway).
// This instruction is thus faster than EMMS on K8s, but all newer AMD cpus use the same
// logic for either EMMS or FEMMS.
// Conclusion: Obsolete. Just use EMMS instead.
__fi void xFEMMS() { xWrite16( 0x0E0F ); }
// Store Streaming SIMD Extension Control/Status to Mem32.
__emitinline void xSTMXCSR( const xIndirect32& dest )

20
pcsx2/x86/iCore.h
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@ -137,17 +137,17 @@ void _flushConstReg(int reg);
#define XMM_CONV_VU(VU) (VU==&VU1)
#define XMMTYPE_TEMP 0 // has to be 0
#define XMMTYPE_VFREG 1
#define XMMTYPE_ACC 2
#define XMMTYPE_FPREG 3
#define XMMTYPE_FPACC 4
#define XMMTYPE_GPRREG 5
#define XMMTYPE_TEMP 0 // has to be 0
#define XMMTYPE_VFREG 1
#define XMMTYPE_ACC 2
#define XMMTYPE_FPREG 3
#define XMMTYPE_FPACC 4
#define XMMTYPE_GPRREG 5
// lo and hi regs
#define XMMGPR_LO 33
#define XMMGPR_HI 32
#define XMMFPU_ACC 32
#define XMMGPR_LO 33
#define XMMGPR_HI 32
#define XMMFPU_ACC 32
struct _xmmregs {
u8 inuse;
@ -218,8 +218,6 @@ struct EEINST
// valid if info & EEINSTINFO_COP2
int cycle; // cycle of inst (at offset from block)
_VURegsNum vuregs;
u8 numpeeps; // number of peephole optimizations
};
extern EEINST* g_pCurInstInfo; // info for the cur instruction

6
pcsx2/x86/ix86-32/iCore-32.cpp
View File

@ -849,11 +849,7 @@ void SetFPUstate() {
_freeMMXreg(7);
if (x86FpuState == MMX_STATE) {
if (x86caps.has3DNOWInstructionExtensions)
FEMMS();
else
EMMS();
EMMS();
x86FpuState = FPU_STATE;
}
}

3
pcsx2/x86/ix86-32/iR5900-32.cpp
View File

@ -1072,8 +1072,7 @@ void iFlushCall(int flushtype)
_flushConstRegs();
if (x86FpuState==MMX_STATE) {
if (x86caps.has3DNOWInstructionExtensions) FEMMS();
else EMMS();
EMMS();
x86FpuState=FPU_STATE;
}
}