mirror of https://github.com/PCSX2/pcsx2.git
[zzogl] Square asm constraint. No change, just better bug-proof.
* add xmm register to the clobber list. * Add input contrainst (avoid to depend of the function attribute and easier to understand) git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3480 96395faa-99c1-11dd-bbfe-3dabce05a288
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@ -349,7 +349,7 @@ extern "C" void __fastcall WriteCLUT_T16_I4_CSM1_sse2(u32* vm, u32* clut)
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test ecx, 15
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jnz WriteUnaligned
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movdqa xmm7, s_clut16mask // saves upper 16 bits
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movdqa xmm7, s_clut16mask // saves upper 16 bytes
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// have to save interlaced with the old data
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movdqa xmm4, [ecx]
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@ -390,7 +390,7 @@ WriteUnaligned:
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// ecx is offset by 2
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sub ecx, 2
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movdqa xmm7, s_clut16mask2 // saves lower 16 bits
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movdqa xmm7, s_clut16mask2 // saves lower 16 bytes
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// have to save interlaced with the old data
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movdqa xmm4, [ecx]
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@ -542,7 +542,10 @@ End:
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"movdqa [edx+48], xmm3\n"
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"WriteCLUT_T16_I4_CSM1_End:\n"
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"\n"
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".att_syntax\n" : [s_clut16mask] "=m" (s_clut16mask), [s_clut16mask2] "=m" (s_clut16mask2)
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".att_syntax\n"
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: [s_clut16mask] "=m" (s_clut16mask), [s_clut16mask2] "=m" (s_clut16mask2)
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: "c" (vm), "d" (clut)
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: "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7"
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);
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#endif // _MSC_VER
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}
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@ -760,7 +763,10 @@ Z16Loop:
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"sub %2, 1\n"
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"jne Z16Loop\n"
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".att_syntax\n" : "=r"(src), "=r"(dst), "=r"(iters) : "0"(src), "1"(dst), "2"(iters)
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".att_syntax\n"
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: "=r"(src), "=r"(dst), "=r"(iters)
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: "0"(src), "1"(dst), "2"(iters)
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: "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7"
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);
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#endif // _MSC_VER
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}
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