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Changed the Magna Carta gamefix to something more plausible. 

Thanks to tmkk for spotting this :)

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@460 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
ramapcsx2 2009-02-09 18:04:31 +00:00
parent 632b73ccad
commit 25459ba1fc
1 changed files with 3 additions and 5 deletions
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8
pcsx2/x86/iVUzerorec.cpp
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@ -506,10 +506,7 @@ u32 SuperVUGetVIAddr(int reg, int read)
#ifdef SUPERVU_VIBRANCHDELAY #ifdef SUPERVU_VIBRANCHDELAY
if( (read != 0) && (s_pCurInst->regs[0].pipe == VUPIPE_BRANCH) && (s_pCurInst->vicached >= 0) && (s_pCurInst->vicached == reg) ) { if( (read != 0) && (s_pCurInst->regs[0].pipe == VUPIPE_BRANCH) && (s_pCurInst->vicached >= 0) && (s_pCurInst->vicached == reg) ) {
if (!CHECK_VUBRANCHHACK) {
return (uptr)&s_VIBranchDelay; // test for branch delays return (uptr)&s_VIBranchDelay; // test for branch delays
}
//else SysPrintf("VIBRANCHDELAY hack! Please report if this breaks anything (rama)\n");
} }
#endif #endif
@ -1168,7 +1165,8 @@ static VuBaseBlock* SuperVUBuildBlocks(VuBaseBlock* parent, u32 startpc, const V
//SysPrintf("branchdelay: %x: %x\n", s_pFnHeader->startpc, pc-8); //SysPrintf("branchdelay: %x: %x\n", s_pFnHeader->startpc, pc-8);
// share the same register // share the same register
pdelayinst->type |= INST_CACHE_VI; if (CHECK_VUBRANCHHACK) pinst->type |= INST_CACHE_VI;
else pdelayinst->type |= INST_CACHE_VI;
// find the correct register // find the correct register
u32 mask = pdelayinst->regs[0].VIwrite & pinst->regs[0].VIread; u32 mask = pdelayinst->regs[0].VIwrite & pinst->regs[0].VIread;
@ -3467,7 +3465,7 @@ void VuInstruction::Recompile(list<VuInstruction>::iterator& itinst, u32 vuxyz)
if( s_ScheduleXGKICK && s_XGKICKReg > 0 ) x86regs[s_XGKICKReg].needed = 1; if( s_ScheduleXGKICK && s_XGKICKReg > 0 ) x86regs[s_XGKICKReg].needed = 1;
#ifdef SUPERVU_VIBRANCHDELAY #ifdef SUPERVU_VIBRANCHDELAY
if ( (!CHECK_VUBRANCHHACK) && (type & INST_CACHE_VI) ) { if ( type & INST_CACHE_VI ) {
assert( vicached >= 0 ); assert( vicached >= 0 );
int cachedreg = _allocX86reg(-1, X86TYPE_VI|(s_vu?X86TYPE_VU1:0), vicached, MODE_READ); int cachedreg = _allocX86reg(-1, X86TYPE_VI|(s_vu?X86TYPE_VU1:0), vicached, MODE_READ);
MOV32RtoM((uptr)&s_VIBranchDelay, cachedreg); MOV32RtoM((uptr)&s_VIBranchDelay, cachedreg);