From 2468551994f29e12593512dac3204c081be188b6 Mon Sep 17 00:00:00 2001
From: "Jake.Stine" <Jake.Stine@96395faa-99c1-11dd-bbfe-3dabce05a288>
Date: Mon, 2 Nov 2009 16:26:35 +0000
Subject: [PATCH] More fixes to MXCSR code.  (Warning: prev revisions may have
 corrupted your ini files badly -- if you have startup/boot crashing problems,
 wipe it)

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2116 96395faa-99c1-11dd-bbfe-3dabce05a288
---
 common/src/x86emitter/cpudetect.cpp | 11 ++++++-----
 common/src/x86emitter/simd.cpp      |  2 +-
 pcsx2/x86/iFPU.cpp                  |  8 +++-----
 3 files changed, 10 insertions(+), 11 deletions(-)

diff --git a/common/src/x86emitter/cpudetect.cpp b/common/src/x86emitter/cpudetect.cpp
index 132e5b2d57..7853cfd293 100644
--- a/common/src/x86emitter/cpudetect.cpp
+++ b/common/src/x86emitter/cpudetect.cpp
@@ -358,8 +358,6 @@ void cpudetectInit()
 		bool ssse3_result = _test_instruction( funcSSSE3 );
 		bool sse41_result = _test_instruction( funcSSE41 );
 
-		HostSys::Munmap( recSSE, 0x1000 );
-
 		// Test for and log any irregularities here.
 		// We take the instruction test result over cpuid since (in theory) it should be a
 		// more reliable gauge of the cpu's actual ability.  But since a difference in bit
@@ -398,20 +396,23 @@ void cpudetectInit()
 		);
 	}
 	#endif
-	
+
 	////////////////////////////////////////////////////////////////////////////////////////////
 	// Establish MXCSR Mask...
 	
 	MXCSR_Mask.bitmask = 0xFFBF;
 	if( x86caps.hasFastStreamingSIMDExtensionsSaveRestore )
 	{
+		// the fxsave buffer should be 16-byte aligned.  I just save it to an unused portion of
+		// recSSE, since it has plenty of room to spare.
+
 		xSetPtr( recSSE );
-		xFXSAVE( recSSE + 1024 );	// just save it to an unused portion of recSSE
+		xFXSAVE( recSSE + 1024 );
 		xRET();
 
 		CallAddress( recSSE );
 
-		u32 result = ((u32*)&recSSE[1024])[28];
+		u32 result = (u32&)recSSE[1024+28];			// bytes 28->32 are the MXCSR_Mask.
 		if( result != 0 )
 			MXCSR_Mask.bitmask = result;
 	}
diff --git a/common/src/x86emitter/simd.cpp b/common/src/x86emitter/simd.cpp
index 6d41ddf4a3..e1874d0d90 100644
--- a/common/src/x86emitter/simd.cpp
+++ b/common/src/x86emitter/simd.cpp
@@ -526,7 +526,7 @@ __emitinline void xFXSAVE( const ModSibBase& dest )
 __emitinline void xFXRSTOR( const ModSibBase& src )
 {
 	SimdPrefix( 0, 0xae );
-	EmitSibMagic( 0, src );
+	EmitSibMagic( 1, src );
 }
 
 //////////////////////////////////////////////////////////////////////////////////////////
diff --git a/pcsx2/x86/iFPU.cpp b/pcsx2/x86/iFPU.cpp
index e4268244cb..8768c9cd2d 100644
--- a/pcsx2/x86/iFPU.cpp
+++ b/pcsx2/x86/iFPU.cpp
@@ -1106,7 +1106,7 @@ static __aligned16 SSE_MXCSR roundmode_nearest, roundmode_neg;
 
 void recDIV_S_xmm(int info)
 {
-	int roundmodeFlag = 0;
+	bool roundmodeFlag = false;
 	int t0reg = _allocTempXMMreg(XMMT_FPS, -1);
     //if (t0reg == -1) {Console.Error("FPU: DIV Allocation Error!");}
     //Console.WriteLn("DIV");
@@ -1128,7 +1128,7 @@ void recDIV_S_xmm(int info)
 			roundmode_nearest.SetRoundMode( SSEround_Nearest );
 			xLDMXCSR( roundmode_nearest );
 		}
-		roundmodeFlag = 1;
+		roundmodeFlag = true;
 	}
 
 	switch(info & (PROCESS_EE_S|PROCESS_EE_T) ) {
@@ -1175,9 +1175,7 @@ void recDIV_S_xmm(int info)
 			else recDIVhelper2(EEREC_D, t0reg);
 			break;
 	}
-	if (roundmodeFlag == 1) { // Set roundmode back if it was changed
-		xLDMXCSR (g_sseMXCSR);
-	}
+	if (roundmodeFlag) xLDMXCSR (g_sseMXCSR);
 	_freeXMMreg(t0reg);
 }