mirror of https://github.com/PCSX2/pcsx2.git
gsdx debug: create a nice dump function for kernel gs registers
Add missing register
This commit is contained in:
parent
ab228c8484
commit
22ebdcf1cf
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@ -1261,6 +1261,127 @@ struct GSPrivRegSet
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uint8 _pad17[0x1000];
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};
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void Dump(FILE* fp)
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{
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for(int i = 0; i < 2; i++)
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{
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if (!fp) return;
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if(i == 0 && !PMODE.EN1) continue;
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if(i == 1 && !PMODE.EN2) continue;
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fprintf(fp, "DISPFB[%d] BP=%05x BW=%d PSM=%d DBX=%d DBY=%d\n",
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i,
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DISP[i].DISPFB.Block(),
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DISP[i].DISPFB.FBW,
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DISP[i].DISPFB.PSM,
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DISP[i].DISPFB.DBX,
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DISP[i].DISPFB.DBY
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);
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fprintf(fp, "DISPLAY[%d] DX=%d DY=%d DW=%d DH=%d MAGH=%d MAGV=%d\n",
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i,
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DISP[i].DISPLAY.DX,
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DISP[i].DISPLAY.DY,
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DISP[i].DISPLAY.DW,
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DISP[i].DISPLAY.DH,
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DISP[i].DISPLAY.MAGH,
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DISP[i].DISPLAY.MAGV
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);
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}
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fprintf(fp, "PMODE EN1=%u EN2=%u CRTMD=%u MMOD=%u AMOD=%u SLBG=%u ALP=%u\n",
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PMODE.EN1,
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PMODE.EN2,
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PMODE.CRTMD,
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PMODE.MMOD,
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PMODE.AMOD,
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PMODE.SLBG,
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PMODE.ALP
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);
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fprintf(fp, "SMODE1 CLKSEL=%u CMOD=%u EX=%u GCONT=%u LC=%u NVCK=%u PCK2=%u PEHS=%u PEVS=%u PHS=%u PRST=%u PVS=%u RC=%u SINT=%u SLCK=%u SLCK2=%u SPML=%u T1248=%u VCKSEL=%u VHP=%u XPCK=%u\n",
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SMODE1.CLKSEL,
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SMODE1.CMOD,
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SMODE1.EX,
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SMODE1.GCONT,
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SMODE1.LC,
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SMODE1.NVCK,
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SMODE1.PCK2,
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SMODE1.PEHS,
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SMODE1.PEVS,
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SMODE1.PHS,
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SMODE1.PRST,
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SMODE1.PVS,
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SMODE1.RC,
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SMODE1.SINT,
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SMODE1.SLCK,
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SMODE1.SLCK2,
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SMODE1.SPML,
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SMODE1.T1248,
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SMODE1.VCKSEL,
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SMODE1.VHP,
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SMODE1.XPCK
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);
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fprintf(fp, "SMODE2 INT=%u FFMD=%u DPMS=%u\n",
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SMODE2.INT,
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SMODE2.FFMD,
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SMODE2.DPMS
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);
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fprintf(fp, "SRFSH %08x_%08x\n",
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SRFSH.u32[0],
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SRFSH.u32[1]
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);
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fprintf(fp, "SYNCH1 %08x_%08x\n",
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SYNCH1.u32[0],
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SYNCH1.u32[1]
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);
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fprintf(fp, "SYNCH2 %08x_%08x\n",
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SYNCH2.u32[0],
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SYNCH2.u32[1]
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);
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fprintf(fp, "SYNCV %08x_%08x\n",
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SYNCV.u32[0],
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SYNCV.u32[1]
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);
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fprintf(fp, "CSR %08x_%08x\n",
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CSR.u32[0],
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CSR.u32[1]
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);
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fprintf(fp, "BGCOLOR B=%u G=%u R=%u\n",
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BGCOLOR.B,
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BGCOLOR.G,
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BGCOLOR.R
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);
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fprintf(fp, "EXTBUF BP=0x%x BW=%u FBIN=%u WFFMD=%u EMODA=%u EMODC=%u WDX=%u WDY=%u\n",
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EXTBUF.EXBP, EXTBUF.EXBW, EXTBUF.FBIN, EXTBUF.WFFMD,
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EXTBUF.EMODA, EXTBUF.EMODC, EXTBUF.WDX, EXTBUF.WDY
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);
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fprintf(fp, "EXTDATA SX=%u SY=%u SMPH=%u SMPV=%u WW=%u WH=%u\n",
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EXTDATA.SX, EXTDATA.SY, EXTDATA.SMPH, EXTDATA.SMPV, EXTDATA.WW, EXTDATA.WH
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);
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fprintf(fp, "EXTWRITE EN=%u\n", EXTWRITE.WRITE);
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}
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void Dump(const std::string& filename)
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{
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FILE* fp = fopen(filename.c_str(), "wt");
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if (fp) {
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Dump(fp);
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fclose(fp);
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}
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}
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};
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#pragma pack(pop)
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@ -349,6 +349,11 @@ void GSRenderer::VSync(int field)
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Flush();
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if(s_n >= s_saven)
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{
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m_regs->Dump(root_sw + format("%05d_f%lld_gs_reg.txt", s_n, m_perfmon.GetFrame()));
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}
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if(!m_dev->IsLost(true))
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{
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if(!Merge(field ? 1 : 0))
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@ -119,95 +119,7 @@ void GSRendererSW::VSync(int field)
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dr.x, dr.y, dr.z, dr.w,
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fr.x, fr.y, fr.z, fr.w);
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for(int i = 0; i < 2; i++)
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{
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if(i == 0 && !m_regs->PMODE.EN1) continue;
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if(i == 1 && !m_regs->PMODE.EN2) continue;
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fprintf(s_fp, "DISPFB[%d] BP=%05x BW=%d PSM=%d DBX=%d DBY=%d\n",
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i,
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m_regs->DISP[i].DISPFB.Block(),
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m_regs->DISP[i].DISPFB.FBW,
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m_regs->DISP[i].DISPFB.PSM,
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m_regs->DISP[i].DISPFB.DBX,
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m_regs->DISP[i].DISPFB.DBY
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);
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fprintf(s_fp, "DISPLAY[%d] DX=%d DY=%d DW=%d DH=%d MAGH=%d MAGV=%d\n",
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i,
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m_regs->DISP[i].DISPLAY.DX,
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m_regs->DISP[i].DISPLAY.DY,
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m_regs->DISP[i].DISPLAY.DW,
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m_regs->DISP[i].DISPLAY.DH,
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m_regs->DISP[i].DISPLAY.MAGH,
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m_regs->DISP[i].DISPLAY.MAGV
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);
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}
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fprintf(s_fp, "PMODE EN1=%u EN2=%u CRTMD=%u MMOD=%u AMOD=%u SLBG=%u ALP=%u\n",
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m_regs->PMODE.EN1,
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m_regs->PMODE.EN2,
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m_regs->PMODE.CRTMD,
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m_regs->PMODE.MMOD,
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m_regs->PMODE.AMOD,
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m_regs->PMODE.SLBG,
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m_regs->PMODE.ALP
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);
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fprintf(s_fp, "SMODE1 CLKSEL=%u CMOD=%u EX=%u GCONT=%u LC=%u NVCK=%u PCK2=%u PEHS=%u PEVS=%u PHS=%u PRST=%u PVS=%u RC=%u SINT=%u SLCK=%u SLCK2=%u SPML=%u T1248=%u VCKSEL=%u VHP=%u XPCK=%u\n",
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m_regs->SMODE1.CLKSEL,
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m_regs->SMODE1.CMOD,
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m_regs->SMODE1.EX,
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m_regs->SMODE1.GCONT,
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m_regs->SMODE1.LC,
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m_regs->SMODE1.NVCK,
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m_regs->SMODE1.PCK2,
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m_regs->SMODE1.PEHS,
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m_regs->SMODE1.PEVS,
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m_regs->SMODE1.PHS,
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m_regs->SMODE1.PRST,
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m_regs->SMODE1.PVS,
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m_regs->SMODE1.RC,
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m_regs->SMODE1.SINT,
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m_regs->SMODE1.SLCK,
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m_regs->SMODE1.SLCK2,
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m_regs->SMODE1.SPML,
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m_regs->SMODE1.T1248,
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m_regs->SMODE1.VCKSEL,
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m_regs->SMODE1.VHP,
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m_regs->SMODE1.XPCK
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);
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fprintf(s_fp, "SMODE2 INT=%u FFMD=%u DPMS=%u\n",
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m_regs->SMODE2.INT,
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m_regs->SMODE2.FFMD,
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m_regs->SMODE2.DPMS
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);
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fprintf(s_fp, "SRFSH %08x_%08x\n",
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m_regs->SRFSH.u32[0],
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m_regs->SRFSH.u32[1]
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);
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fprintf(s_fp, "SYNCH1 %08x_%08x\n",
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m_regs->SYNCH1.u32[0],
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m_regs->SYNCH1.u32[1]
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);
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fprintf(s_fp, "SYNCH2 %08x_%08x\n",
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m_regs->SYNCH2.u32[0],
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m_regs->SYNCH2.u32[1]
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);
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fprintf(s_fp, "SYNCV %08x_%08x\n",
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m_regs->SYNCV.u32[0],
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m_regs->SYNCV.u32[1]
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);
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fprintf(s_fp, "CSR %08x_%08x\n",
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m_regs->CSR.u32[0],
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m_regs->CSR.u32[1]
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);
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m_regs->Dump(s_fp);
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fflush(s_fp);
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}
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