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GS/GIF: only raise interrupts on IMR writes on falling edges, i.e. if the interrupt was previously masked. Also remove a block about queued signals from IMR writes which makes no sense to me given that the CSR write to clear the previous SIGNAL should be setting CSR.SIGNAL already, which will trigger the interrupt by the standard mechanism. tl;dr: fixes realta nua and probably other stuff. 

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@5273 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
sudonim1@gmail.com 2012-06-06 22:04:39 +00:00
parent 1628ab154e
commit 22bdd1fbec
1 changed files with 3 additions and 14 deletions
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17
pcsx2/GS.cpp
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@ -121,23 +121,12 @@ static __fi void gsCSRwrite( const tGS_CSR& csr )
static __fi void IMRwrite(u32 value)
{
GSIMR = (value & 0x1f00)|0x6000;
if(CSRreg.GetInterruptMask() & (~(GSIMR >> 8) & 0x1f))
gsIrq();
GUNIT_LOG("IMRwrite()");
if (gifUnit.gsSIGNAL.queued && !(GSIMR & 0x100)) {
// Note: PS2 apps are expected to write a successive 1 and 0 to the IMR in order to
// trigger the gsInt and clear the second pending SIGNAL interrupt -- if they fail
// to do so, the GS will freeze again upon the very next SIGNAL).
//
// What's not known here is whether or not the SIGID register should be updated
// here or when the GS is resumed during CSR write (above).
CSRreg.SIGNAL = true;
if (CSRreg.GetInterruptMask() & (~value & GSIMR) >> 8)
gsIrq();
}
GSIMR = (value & 0x1f00)|0x6000;
}
__fi void gsWrite8(u32 mem, u8 value)