mirror of https://github.com/PCSX2/pcsx2.git
Merge pull request #221 from xsacha/vuops-2
Improve readability in the VUops.
This commit is contained in:
commit
2286ac1c49
218
pcsx2/VUops.cpp
218
pcsx2/VUops.cpp
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@ -117,7 +117,6 @@ void _vuFlushAll(VURegs* VU)
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if ((VU->cycle - VU->fdiv.sCycle) >= VU->fdiv.Cycle) {
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if ((VU->cycle - VU->fdiv.sCycle) >= VU->fdiv.Cycle) {
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VUM_LOG("flushing FDIV pipe");
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VUM_LOG("flushing FDIV pipe");
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nRepeat = 1;
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VU->fdiv.enable = 0;
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VU->fdiv.enable = 0;
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VU->VI[REG_Q].UL = VU->fdiv.reg.UL;
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VU->VI[REG_Q].UL = VU->fdiv.reg.UL;
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VU->VI[REG_STATUS_FLAG].UL = VU->fdiv.statusflag;
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VU->VI[REG_STATUS_FLAG].UL = VU->fdiv.statusflag;
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@ -131,7 +130,6 @@ void _vuFlushAll(VURegs* VU)
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if ((VU->cycle - VU->efu.sCycle) >= VU->efu.Cycle) {
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if ((VU->cycle - VU->efu.sCycle) >= VU->efu.Cycle) {
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// VUM_LOG("flushing EFU pipe");
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// VUM_LOG("flushing EFU pipe");
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nRepeat = 1;
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VU->efu.enable = 0;
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VU->efu.enable = 0;
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VU->VI[REG_P].UL = VU->efu.reg.UL;
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VU->VI[REG_P].UL = VU->efu.reg.UL;
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}
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}
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@ -160,14 +158,14 @@ static void __fastcall _vuFMACTestStall(VURegs * VU, int reg, int xyzw) {
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if (i == 8) return;
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if (i == 8) return;
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cycle = VU->fmac[i].Cycle - (VU->cycle - VU->fmac[i].sCycle) + 1; // add 1 delay! (fixes segaclassics bad geom)
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VU->fmac[i].enable = 0;
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VU->fmac[i].enable = 0;
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VU->VI[REG_MAC_FLAG].UL = VU->fmac[i].macflag;
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VU->VI[REG_MAC_FLAG].UL = VU->fmac[i].macflag;
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VU->VI[REG_STATUS_FLAG].UL = VU->fmac[i].statusflag;
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VU->VI[REG_STATUS_FLAG].UL = VU->fmac[i].statusflag;
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VU->VI[REG_CLIP_FLAG].UL = VU->fmac[i].clipflag;
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VU->VI[REG_CLIP_FLAG].UL = VU->fmac[i].clipflag;
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VUM_LOG("FMAC[%d] stall %d", i, cycle);
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u32 newCycle = VU->fmac[i].Cycle + VU->fmac[i].sCycle + 1; // HACK: add 1 delay (fixes segaclassics bad geom)
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VUM_LOG("FMAC[%d] stall %d", i, newCycle - VU->cycle);
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VU->cycle+= cycle;
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VU->cycle = newCycle;
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_vuTestPipes(VU);
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_vuTestPipes(VU);
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}
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}
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@ -216,27 +214,25 @@ static __ri void __fastcall _vuEFUAdd(VURegs * VU, int cycles) {
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static __ri void __fastcall _vuFlushFDIV(VURegs * VU) {
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static __ri void __fastcall _vuFlushFDIV(VURegs * VU) {
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int cycle;
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int cycle;
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if (VU->fdiv.enable == 0) return;
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if (VU->fdiv.enable == 0)
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return;
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cycle = VU->fdiv.Cycle - (VU->cycle - VU->fdiv.sCycle);
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u32 newCycle = VU->fdiv.Cycle + VU->fdiv.sCycle;
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VUM_LOG("waiting FDIV pipe %d", cycle);
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VUM_LOG("waiting FDIV pipe %d", newCycle - VU->cycle);
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VU->fdiv.enable = 0;
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VU->fdiv.enable = 0;
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VU->cycle+= cycle;
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VU->cycle = newCycle;
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VU->VI[REG_Q].UL = VU->fdiv.reg.UL;
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VU->VI[REG_Q].UL = VU->fdiv.reg.UL;
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VU->VI[REG_STATUS_FLAG].UL = VU->fdiv.statusflag;
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VU->VI[REG_STATUS_FLAG].UL = VU->fdiv.statusflag;
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}
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}
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static __ri void __fastcall _vuFlushEFU(VURegs * VU) {
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static __ri void __fastcall _vuFlushEFU(VURegs * VU) {
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int cycle;
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if (VU->efu.enable == 0)
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return;
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if (VU->efu.enable == 0) return;
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cycle = VU->efu.Cycle - (VU->cycle - VU->efu.sCycle);
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// VUM_LOG("waiting EFU pipe %d", cycle);
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VU->efu.enable = 0;
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VU->efu.enable = 0;
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VU->cycle+= cycle;
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VU->cycle = VU->efu.Cycle + VU->efu.sCycle;
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VU->VI[REG_P].UL = VU->efu.reg.UL;
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VU->VI[REG_P].UL = VU->efu.reg.UL;
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}
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}
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@ -1180,170 +1176,148 @@ static __fi void _vuMSUBAw(VURegs * VU) {
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VU_STAT_UPDATE(VU);
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VU_STAT_UPDATE(VU);
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}/*last updated 11/05/03 shadow*/
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}/*last updated 11/05/03 shadow*/
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u32 _MAX(u32 a, u32 b) {
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// The functions below are floating point semantics min/max on integer representations to get
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if (a & 0x80000000) { // -a
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// the effect of a floating point min/max without issues with denormal and special numbers.
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if (b & 0x80000000) { // -b
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return (a & 0x7fffffff) > (b & 0x7fffffff) ? b : a;
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} else { // +b
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return b;
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}
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} else { // +a
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if (b & 0x80000000) { // -b
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return a;
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} else { // +b
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return (a & 0x7fffffff) > (b & 0x7fffffff) ? a : b;
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}
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}
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return 0;
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// Finds the maximum integer value unless both values are negative, in which case it finds the minimum value.
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static __fi u32 fp_max(u32 a, u32 b) {
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return ((s32)a < 0 && (s32)b < 0) ? std::min<s32>(a, b) : std::max<s32>(a, b);
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}
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// Finds the minimum integer value unless both values are negative, in which case it finds the maximum value.
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static __fi u32 fp_min(u32 a, u32 b) {
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return ((s32)a < 0 && (s32)b < 0) ? std::max<s32>(a, b) : std::min<s32>(a, b);
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}
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}
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static __fi void _vuMAX(VURegs * VU) {
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static __fi void _vuMAX(VURegs * VU) {
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if (_Fd_ == 0) return;
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if (_Fd_ == 0)
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return;
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/* ft is bc */
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/* ft is bc */
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if (_X) VU->VF[_Fd_].i.x = _MAX(VU->VF[_Fs_].i.x, (s32)VU->VF[_Ft_].i.x);
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if (_X) VU->VF[_Fd_].i.x = fp_max(VU->VF[_Fs_].i.x, VU->VF[_Ft_].i.x);
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if (_Y) VU->VF[_Fd_].i.y = _MAX(VU->VF[_Fs_].i.y, (s32)VU->VF[_Ft_].i.y);
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if (_Y) VU->VF[_Fd_].i.y = fp_max(VU->VF[_Fs_].i.y, VU->VF[_Ft_].i.y);
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if (_Z) VU->VF[_Fd_].i.z = _MAX(VU->VF[_Fs_].i.z, (s32)VU->VF[_Ft_].i.z);
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if (_Z) VU->VF[_Fd_].i.z = fp_max(VU->VF[_Fs_].i.z, VU->VF[_Ft_].i.z);
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if (_W) VU->VF[_Fd_].i.w = _MAX(VU->VF[_Fs_].i.w, (s32)VU->VF[_Ft_].i.w);
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if (_W) VU->VF[_Fd_].i.w = fp_max(VU->VF[_Fs_].i.w, VU->VF[_Ft_].i.w);
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}//checked 13/05/03 shadow
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}//checked 13/05/03 shadow
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static __fi void _vuMAXi(VURegs * VU) {
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static __fi void _vuMAXi(VURegs * VU) {
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if (_Fd_ == 0) return;
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if (_Fd_ == 0)
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return;
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/* ft is bc */
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/* ft is bc */
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if (_X) VU->VF[_Fd_].i.x = _MAX(VU->VF[_Fs_].i.x, VU->VI[REG_I].UL);
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if (_X) VU->VF[_Fd_].i.x = fp_max(VU->VF[_Fs_].i.x, VU->VI[REG_I].UL);
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if (_Y) VU->VF[_Fd_].i.y = _MAX(VU->VF[_Fs_].i.y, VU->VI[REG_I].UL);
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if (_Y) VU->VF[_Fd_].i.y = fp_max(VU->VF[_Fs_].i.y, VU->VI[REG_I].UL);
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if (_Z) VU->VF[_Fd_].i.z = _MAX(VU->VF[_Fs_].i.z, VU->VI[REG_I].UL);
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if (_Z) VU->VF[_Fd_].i.z = fp_max(VU->VF[_Fs_].i.z, VU->VI[REG_I].UL);
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if (_W) VU->VF[_Fd_].i.w = _MAX(VU->VF[_Fs_].i.w, VU->VI[REG_I].UL);
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if (_W) VU->VF[_Fd_].i.w = fp_max(VU->VF[_Fs_].i.w, VU->VI[REG_I].UL);
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}//checked 13/05/03 shadow
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}//checked 13/05/03 shadow
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static __fi void _vuMAXx(VURegs * VU) {
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static __fi void _vuMAXx(VURegs * VU) {
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s32 ftx;
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if (_Fd_ == 0)
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if (_Fd_ == 0) return;
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return;
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ftx=(s32)VU->VF[_Ft_].i.x;
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u32 ftx = VU->VF[_Ft_].i.x;
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if (_X) VU->VF[_Fd_].i.x = _MAX(VU->VF[_Fs_].i.x, ftx);
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if (_X) VU->VF[_Fd_].i.x = fp_max(VU->VF[_Fs_].i.x, ftx);
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if (_Y) VU->VF[_Fd_].i.y = _MAX(VU->VF[_Fs_].i.y, ftx);
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if (_Y) VU->VF[_Fd_].i.y = fp_max(VU->VF[_Fs_].i.y, ftx);
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if (_Z) VU->VF[_Fd_].i.z = _MAX(VU->VF[_Fs_].i.z, ftx);
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if (_Z) VU->VF[_Fd_].i.z = fp_max(VU->VF[_Fs_].i.z, ftx);
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if (_W) VU->VF[_Fd_].i.w = _MAX(VU->VF[_Fs_].i.w, ftx);
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if (_W) VU->VF[_Fd_].i.w = fp_max(VU->VF[_Fs_].i.w, ftx);
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}
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}
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//checked 13/05/03 shadow
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//checked 13/05/03 shadow
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static __fi void _vuMAXy(VURegs * VU) {
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static __fi void _vuMAXy(VURegs * VU) {
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s32 fty;
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if (_Fd_ == 0)
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if (_Fd_ == 0) return;
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return;
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fty=(s32)VU->VF[_Ft_].i.y;
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u32 fty = VU->VF[_Ft_].i.y;
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if (_X) VU->VF[_Fd_].i.x = _MAX(VU->VF[_Fs_].i.x, fty);
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if (_X) VU->VF[_Fd_].i.x = fp_max(VU->VF[_Fs_].i.x, fty);
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if (_Y) VU->VF[_Fd_].i.y = _MAX(VU->VF[_Fs_].i.y, fty);
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if (_Y) VU->VF[_Fd_].i.y = fp_max(VU->VF[_Fs_].i.y, fty);
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if (_Z) VU->VF[_Fd_].i.z = _MAX(VU->VF[_Fs_].i.z, fty);
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if (_Z) VU->VF[_Fd_].i.z = fp_max(VU->VF[_Fs_].i.z, fty);
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if (_W) VU->VF[_Fd_].i.w = _MAX(VU->VF[_Fs_].i.w, fty);
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if (_W) VU->VF[_Fd_].i.w = fp_max(VU->VF[_Fs_].i.w, fty);
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}//checked 13/05/03 shadow
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}//checked 13/05/03 shadow
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static __fi void _vuMAXz(VURegs * VU) {
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static __fi void _vuMAXz(VURegs * VU) {
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s32 ftz;
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if (_Fd_ == 0)
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if (_Fd_ == 0) return;
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return;
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ftz=(s32)VU->VF[_Ft_].i.z;
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u32 ftz = VU->VF[_Ft_].i.z;
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if (_X) VU->VF[_Fd_].i.x = _MAX(VU->VF[_Fs_].i.x, ftz);
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if (_X) VU->VF[_Fd_].i.x = fp_max(VU->VF[_Fs_].i.x, ftz);
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if (_Y) VU->VF[_Fd_].i.y = _MAX(VU->VF[_Fs_].i.y, ftz);
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if (_Y) VU->VF[_Fd_].i.y = fp_max(VU->VF[_Fs_].i.y, ftz);
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if (_Z) VU->VF[_Fd_].i.z = _MAX(VU->VF[_Fs_].i.z, ftz);
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if (_Z) VU->VF[_Fd_].i.z = fp_max(VU->VF[_Fs_].i.z, ftz);
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if (_W) VU->VF[_Fd_].i.w = _MAX(VU->VF[_Fs_].i.w, ftz);
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if (_W) VU->VF[_Fd_].i.w = fp_max(VU->VF[_Fs_].i.w, ftz);
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}
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}
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static __fi void _vuMAXw(VURegs * VU) {
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static __fi void _vuMAXw(VURegs * VU) {
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s32 ftw;
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if (_Fd_ == 0)
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if (_Fd_ == 0) return;
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return;
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ftw=(s32)VU->VF[_Ft_].i.w;
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u32 ftw = VU->VF[_Ft_].i.w;
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if (_X) VU->VF[_Fd_].i.x = _MAX(VU->VF[_Fs_].i.x, ftw);
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if (_X) VU->VF[_Fd_].i.x = fp_max(VU->VF[_Fs_].i.x, ftw);
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if (_Y) VU->VF[_Fd_].i.y = _MAX(VU->VF[_Fs_].i.y, ftw);
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if (_Y) VU->VF[_Fd_].i.y = fp_max(VU->VF[_Fs_].i.y, ftw);
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if (_Z) VU->VF[_Fd_].i.z = _MAX(VU->VF[_Fs_].i.z, ftw);
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if (_Z) VU->VF[_Fd_].i.z = fp_max(VU->VF[_Fs_].i.z, ftw);
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if (_W) VU->VF[_Fd_].i.w = _MAX(VU->VF[_Fs_].i.w, ftw);
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if (_W) VU->VF[_Fd_].i.w = fp_max(VU->VF[_Fs_].i.w, ftw);
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}
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u32 _MINI(u32 a, u32 b) {
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if (a & 0x80000000) { // -a
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if (b & 0x80000000) { // -b
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return (a & 0x7fffffff) < (b & 0x7fffffff) ? b : a;
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} else { // +b
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return a;
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}
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} else { // +a
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if (b & 0x80000000) { // -b
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return b;
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} else { // +b
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return (a & 0x7fffffff) < (b & 0x7fffffff) ? a : b;
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}
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}
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return 0;
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}
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}
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static __fi void _vuMINI(VURegs * VU) {
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static __fi void _vuMINI(VURegs * VU) {
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if (_Fd_ == 0) return;
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if (_Fd_ == 0)
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return;
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/* ft is bc */
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/* ft is bc */
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if (_X) VU->VF[_Fd_].i.x = _MINI(VU->VF[_Fs_].i.x, (s32)VU->VF[_Ft_].i.x);
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if (_X) VU->VF[_Fd_].i.x = fp_min(VU->VF[_Fs_].i.x, VU->VF[_Ft_].i.x);
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if (_Y) VU->VF[_Fd_].i.y = _MINI(VU->VF[_Fs_].i.y, (s32)VU->VF[_Ft_].i.y);
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if (_Y) VU->VF[_Fd_].i.y = fp_min(VU->VF[_Fs_].i.y, VU->VF[_Ft_].i.y);
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if (_Z) VU->VF[_Fd_].i.z = _MINI(VU->VF[_Fs_].i.z, (s32)VU->VF[_Ft_].i.z);
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if (_Z) VU->VF[_Fd_].i.z = fp_min(VU->VF[_Fs_].i.z, VU->VF[_Ft_].i.z);
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if (_W) VU->VF[_Fd_].i.w = _MINI(VU->VF[_Fs_].i.w, (s32)VU->VF[_Ft_].i.w);
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if (_W) VU->VF[_Fd_].i.w = fp_min(VU->VF[_Fs_].i.w, VU->VF[_Ft_].i.w);
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}//checked 13/05/03 shadow
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}//checked 13/05/03 shadow
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static __fi void _vuMINIi(VURegs * VU) {
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static __fi void _vuMINIi(VURegs * VU) {
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if (_Fd_ == 0) return;
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if (_Fd_ == 0)
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return;
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/* ft is bc */
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/* ft is bc */
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if (_X) VU->VF[_Fd_].i.x = _MINI(VU->VF[_Fs_].i.x, VU->VI[REG_I].UL);
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if (_X) VU->VF[_Fd_].i.x = fp_min(VU->VF[_Fs_].i.x, VU->VI[REG_I].UL);
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if (_Y) VU->VF[_Fd_].i.y = _MINI(VU->VF[_Fs_].i.y, VU->VI[REG_I].UL);
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if (_Y) VU->VF[_Fd_].i.y = fp_min(VU->VF[_Fs_].i.y, VU->VI[REG_I].UL);
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if (_Z) VU->VF[_Fd_].i.z = _MINI(VU->VF[_Fs_].i.z, VU->VI[REG_I].UL);
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if (_Z) VU->VF[_Fd_].i.z = fp_min(VU->VF[_Fs_].i.z, VU->VI[REG_I].UL);
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if (_W) VU->VF[_Fd_].i.w = _MINI(VU->VF[_Fs_].i.w, VU->VI[REG_I].UL);
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if (_W) VU->VF[_Fd_].i.w = fp_min(VU->VF[_Fs_].i.w, VU->VI[REG_I].UL);
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}//checked 13/05/03 shadow
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}//checked 13/05/03 shadow
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static __fi void _vuMINIx(VURegs * VU) {
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static __fi void _vuMINIx(VURegs * VU) {
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s32 ftx;
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if (_Fd_ == 0)
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if (_Fd_ == 0) return;
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return;
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|
||||||
ftx=(s32)VU->VF[_Ft_].i.x;
|
u32 ftx = VU->VF[_Ft_].i.x;
|
||||||
if (_X) VU->VF[_Fd_].i.x = _MINI(VU->VF[_Fs_].i.x, ftx);
|
if (_X) VU->VF[_Fd_].i.x = fp_min(VU->VF[_Fs_].i.x, ftx);
|
||||||
if (_Y) VU->VF[_Fd_].i.y = _MINI(VU->VF[_Fs_].i.y, ftx);
|
if (_Y) VU->VF[_Fd_].i.y = fp_min(VU->VF[_Fs_].i.y, ftx);
|
||||||
if (_Z) VU->VF[_Fd_].i.z = _MINI(VU->VF[_Fs_].i.z, ftx);
|
if (_Z) VU->VF[_Fd_].i.z = fp_min(VU->VF[_Fs_].i.z, ftx);
|
||||||
if (_W) VU->VF[_Fd_].i.w = _MINI(VU->VF[_Fs_].i.w, ftx);
|
if (_W) VU->VF[_Fd_].i.w = fp_min(VU->VF[_Fs_].i.w, ftx);
|
||||||
}
|
}
|
||||||
//checked 13/05/03 shadow
|
//checked 13/05/03 shadow
|
||||||
|
|
||||||
static __fi void _vuMINIy(VURegs * VU) {
|
static __fi void _vuMINIy(VURegs * VU) {
|
||||||
s32 fty;
|
|
||||||
if (_Fd_ == 0) return;
|
if (_Fd_ == 0) return;
|
||||||
|
|
||||||
fty=(s32)VU->VF[_Ft_].i.y;
|
u32 fty = VU->VF[_Ft_].i.y;
|
||||||
if (_X) VU->VF[_Fd_].i.x = _MINI(VU->VF[_Fs_].i.x, fty);
|
if (_X) VU->VF[_Fd_].i.x = fp_min(VU->VF[_Fs_].i.x, fty);
|
||||||
if (_Y) VU->VF[_Fd_].i.y = _MINI(VU->VF[_Fs_].i.y, fty);
|
if (_Y) VU->VF[_Fd_].i.y = fp_min(VU->VF[_Fs_].i.y, fty);
|
||||||
if (_Z) VU->VF[_Fd_].i.z = _MINI(VU->VF[_Fs_].i.z, fty);
|
if (_Z) VU->VF[_Fd_].i.z = fp_min(VU->VF[_Fs_].i.z, fty);
|
||||||
if (_W) VU->VF[_Fd_].i.w = _MINI(VU->VF[_Fs_].i.w, fty);
|
if (_W) VU->VF[_Fd_].i.w = fp_min(VU->VF[_Fs_].i.w, fty);
|
||||||
}//checked 13/05/03 shadow
|
}//checked 13/05/03 shadow
|
||||||
|
|
||||||
static __fi void _vuMINIz(VURegs * VU) {
|
static __fi void _vuMINIz(VURegs * VU) {
|
||||||
s32 ftz;
|
|
||||||
if (_Fd_ == 0) return;
|
if (_Fd_ == 0) return;
|
||||||
|
|
||||||
ftz=(s32)VU->VF[_Ft_].i.z;
|
u32 ftz = VU->VF[_Ft_].i.z;
|
||||||
if (_X) VU->VF[_Fd_].i.x = _MINI(VU->VF[_Fs_].i.x, ftz);
|
if (_X) VU->VF[_Fd_].i.x = fp_min(VU->VF[_Fs_].i.x, ftz);
|
||||||
if (_Y) VU->VF[_Fd_].i.y = _MINI(VU->VF[_Fs_].i.y, ftz);
|
if (_Y) VU->VF[_Fd_].i.y = fp_min(VU->VF[_Fs_].i.y, ftz);
|
||||||
if (_Z) VU->VF[_Fd_].i.z = _MINI(VU->VF[_Fs_].i.z, ftz);
|
if (_Z) VU->VF[_Fd_].i.z = fp_min(VU->VF[_Fs_].i.z, ftz);
|
||||||
if (_W) VU->VF[_Fd_].i.w = _MINI(VU->VF[_Fs_].i.w, ftz);
|
if (_W) VU->VF[_Fd_].i.w = fp_min(VU->VF[_Fs_].i.w, ftz);
|
||||||
}
|
}
|
||||||
|
|
||||||
static __fi void _vuMINIw(VURegs * VU) {
|
static __fi void _vuMINIw(VURegs * VU) {
|
||||||
s32 ftw;
|
|
||||||
if (_Fd_ == 0) return;
|
if (_Fd_ == 0) return;
|
||||||
|
|
||||||
ftw=(s32)VU->VF[_Ft_].i.w;
|
u32 ftw = VU->VF[_Ft_].i.w;
|
||||||
if (_X) VU->VF[_Fd_].i.x = _MINI(VU->VF[_Fs_].i.x, ftw);
|
if (_X) VU->VF[_Fd_].i.x = fp_min(VU->VF[_Fs_].i.x, ftw);
|
||||||
if (_Y) VU->VF[_Fd_].i.y = _MINI(VU->VF[_Fs_].i.y, ftw);
|
if (_Y) VU->VF[_Fd_].i.y = fp_min(VU->VF[_Fs_].i.y, ftw);
|
||||||
if (_Z) VU->VF[_Fd_].i.z = _MINI(VU->VF[_Fs_].i.z, ftw);
|
if (_Z) VU->VF[_Fd_].i.z = fp_min(VU->VF[_Fs_].i.z, ftw);
|
||||||
if (_W) VU->VF[_Fd_].i.w = _MINI(VU->VF[_Fs_].i.w, ftw);
|
if (_W) VU->VF[_Fd_].i.w = fp_min(VU->VF[_Fs_].i.w, ftw);
|
||||||
}
|
}
|
||||||
|
|
||||||
static __fi void _vuOPMULA(VURegs * VU) {
|
static __fi void _vuOPMULA(VURegs * VU) {
|
||||||
|
|
Loading…
Reference in New Issue