mirror of https://github.com/PCSX2/pcsx2.git
microVU: Cleanup of opcode lookup tables. (Removed the macros since multiple instances of the tables aren't needed anymore)
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1669 96395faa-99c1-11dd-bbfe-3dabce05a288
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@ -38,205 +38,183 @@ mVUop(mVUunknown);
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//------------------------------------------------------------------
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// Opcode Tables
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//------------------------------------------------------------------
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#define microVU_LOWER_OPCODE(x) void (*mVULOWER_OPCODE##x [128])(mP) = { \
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mVU_LQ , mVU_SQ , mVUunknown , mVUunknown, \
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mVU_ILW , mVU_ISW , mVUunknown , mVUunknown, \
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mVU_IADDIU , mVU_ISUBIU , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVU_FCEQ , mVU_FCSET , mVU_FCAND , mVU_FCOR, /* 0x10 */ \
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mVU_FSEQ , mVU_FSSET , mVU_FSAND , mVU_FSOR, \
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mVU_FMEQ , mVUunknown , mVU_FMAND , mVU_FMOR, \
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mVU_FCGET , mVUunknown , mVUunknown , mVUunknown, \
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mVU_B , mVU_BAL , mVUunknown , mVUunknown, /* 0x20 */ \
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mVU_JR , mVU_JALR , mVUunknown , mVUunknown, \
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mVU_IBEQ , mVU_IBNE , mVUunknown , mVUunknown, \
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mVU_IBLTZ , mVU_IBGTZ , mVU_IBLEZ , mVU_IBGEZ, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, /* 0x30 */ \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVULowerOP , mVUunknown , mVUunknown , mVUunknown, /* 0x40*/ \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, /* 0x50 */ \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, /* 0x60 */ \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, /* 0x70 */ \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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void (*mVULOWER_OPCODE [128])(mP) = {
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mVU_LQ , mVU_SQ , mVUunknown , mVUunknown,
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mVU_ILW , mVU_ISW , mVUunknown , mVUunknown,
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mVU_IADDIU , mVU_ISUBIU , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVU_FCEQ , mVU_FCSET , mVU_FCAND , mVU_FCOR,
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mVU_FSEQ , mVU_FSSET , mVU_FSAND , mVU_FSOR,
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mVU_FMEQ , mVUunknown , mVU_FMAND , mVU_FMOR,
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mVU_FCGET , mVUunknown , mVUunknown , mVUunknown,
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mVU_B , mVU_BAL , mVUunknown , mVUunknown,
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mVU_JR , mVU_JALR , mVUunknown , mVUunknown,
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mVU_IBEQ , mVU_IBNE , mVUunknown , mVUunknown,
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mVU_IBLTZ , mVU_IBGTZ , mVU_IBLEZ , mVU_IBGEZ,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVULowerOP , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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};
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#define microVU_LowerOP_T3_00_OPCODE(x) void (*mVULowerOP_T3_00_OPCODE##x [32])(mP) = { \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVU_MOVE , mVU_LQI , mVU_DIV , mVU_MTIR, \
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mVU_RNEXT , mVUunknown , mVUunknown , mVUunknown, /* 0x10 */ \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVU_MFP , mVU_XTOP , mVU_XGKICK, \
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mVU_ESADD , mVU_EATANxy , mVU_ESQRT , mVU_ESIN, \
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void (*mVULowerOP_T3_00_OPCODE [32])(mP) = {
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVU_MOVE , mVU_LQI , mVU_DIV , mVU_MTIR,
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mVU_RNEXT , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVU_MFP , mVU_XTOP , mVU_XGKICK,
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mVU_ESADD , mVU_EATANxy , mVU_ESQRT , mVU_ESIN,
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};
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#define microVU_LowerOP_T3_01_OPCODE(x) void (*mVULowerOP_T3_01_OPCODE##x [32])(mP) = { \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVU_MR32 , mVU_SQI , mVU_SQRT , mVU_MFIR, \
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mVU_RGET , mVUunknown , mVUunknown , mVUunknown, /* 0x10 */ \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVU_XITOP , mVUunknown, \
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mVU_ERSADD , mVU_EATANxz , mVU_ERSQRT , mVU_EATAN, \
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void (*mVULowerOP_T3_01_OPCODE [32])(mP) = {
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVU_MR32 , mVU_SQI , mVU_SQRT , mVU_MFIR,
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mVU_RGET , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVU_XITOP , mVUunknown,
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mVU_ERSADD , mVU_EATANxz , mVU_ERSQRT , mVU_EATAN,
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};
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#define microVU_LowerOP_T3_10_OPCODE(x) void (*mVULowerOP_T3_10_OPCODE##x [32])(mP) = { \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVU_LQD , mVU_RSQRT , mVU_ILWR, \
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mVU_RINIT , mVUunknown , mVUunknown , mVUunknown, /* 0x10 */ \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVU_ELENG , mVU_ESUM , mVU_ERCPR , mVU_EEXP, \
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void (*mVULowerOP_T3_10_OPCODE [32])(mP) = {
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVU_LQD , mVU_RSQRT , mVU_ILWR,
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mVU_RINIT , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVU_ELENG , mVU_ESUM , mVU_ERCPR , mVU_EEXP,
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};
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#define microVU_LowerOP_T3_11_OPCODE(x) void (*mVULowerOP_T3_11_OPCODE##x [32])(mP) = { \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVU_SQD , mVU_WAITQ , mVU_ISWR, \
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mVU_RXOR , mVUunknown , mVUunknown , mVUunknown, /* 0x10 */ \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVU_ERLENG , mVUunknown , mVU_WAITP , mVUunknown, \
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void (*mVULowerOP_T3_11_OPCODE [32])(mP) = {
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVU_SQD , mVU_WAITQ , mVU_ISWR,
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mVU_RXOR , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVU_ERLENG , mVUunknown , mVU_WAITP , mVUunknown,
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};
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#define microVU_LowerOP_OPCODE(x) void (*mVULowerOP_OPCODE##x [64])(mP) = { \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, /* 0x10 */ \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, /* 0x20 */ \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVU_IADD , mVU_ISUB , mVU_IADDI , mVUunknown, /* 0x30 */ \
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mVU_IAND , mVU_IOR , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVULowerOP_T3_00, mVULowerOP_T3_01, mVULowerOP_T3_10, mVULowerOP_T3_11, \
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void (*mVULowerOP_OPCODE [64])(mP) = {
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVU_IADD , mVU_ISUB , mVU_IADDI , mVUunknown,
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mVU_IAND , mVU_IOR , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVULowerOP_T3_00, mVULowerOP_T3_01, mVULowerOP_T3_10, mVULowerOP_T3_11,
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};
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#define microVU_UPPER_OPCODE(x) void (*mVU_UPPER_OPCODE##x [64])(mP) = { \
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mVU_ADDx , mVU_ADDy , mVU_ADDz , mVU_ADDw, \
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mVU_SUBx , mVU_SUBy , mVU_SUBz , mVU_SUBw, \
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mVU_MADDx , mVU_MADDy , mVU_MADDz , mVU_MADDw, \
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mVU_MSUBx , mVU_MSUBy , mVU_MSUBz , mVU_MSUBw, \
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mVU_MAXx , mVU_MAXy , mVU_MAXz , mVU_MAXw, /* 0x10 */ \
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mVU_MINIx , mVU_MINIy , mVU_MINIz , mVU_MINIw, \
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mVU_MULx , mVU_MULy , mVU_MULz , mVU_MULw, \
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mVU_MULq , mVU_MAXi , mVU_MULi , mVU_MINIi, \
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mVU_ADDq , mVU_MADDq , mVU_ADDi , mVU_MADDi, /* 0x20 */ \
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mVU_SUBq , mVU_MSUBq , mVU_SUBi , mVU_MSUBi, \
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mVU_ADD , mVU_MADD , mVU_MUL , mVU_MAX, \
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mVU_SUB , mVU_MSUB , mVU_OPMSUB , mVU_MINI, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, /* 0x30 */ \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVU_UPPER_FD_00, mVU_UPPER_FD_01, mVU_UPPER_FD_10, mVU_UPPER_FD_11, \
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void (*mVU_UPPER_OPCODE [64])(mP) = {
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mVU_ADDx , mVU_ADDy , mVU_ADDz , mVU_ADDw,
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mVU_SUBx , mVU_SUBy , mVU_SUBz , mVU_SUBw,
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mVU_MADDx , mVU_MADDy , mVU_MADDz , mVU_MADDw,
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mVU_MSUBx , mVU_MSUBy , mVU_MSUBz , mVU_MSUBw,
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mVU_MAXx , mVU_MAXy , mVU_MAXz , mVU_MAXw,
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mVU_MINIx , mVU_MINIy , mVU_MINIz , mVU_MINIw,
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mVU_MULx , mVU_MULy , mVU_MULz , mVU_MULw,
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mVU_MULq , mVU_MAXi , mVU_MULi , mVU_MINIi,
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mVU_ADDq , mVU_MADDq , mVU_ADDi , mVU_MADDi,
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mVU_SUBq , mVU_MSUBq , mVU_SUBi , mVU_MSUBi,
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mVU_ADD , mVU_MADD , mVU_MUL , mVU_MAX,
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mVU_SUB , mVU_MSUB , mVU_OPMSUB , mVU_MINI,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVU_UPPER_FD_00, mVU_UPPER_FD_01, mVU_UPPER_FD_10, mVU_UPPER_FD_11,
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};
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#define microVU_UPPER_FD_00_TABLE(x) void (*mVU_UPPER_FD_00_TABLE##x [32])(mP) = { \
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mVU_ADDAx , mVU_SUBAx , mVU_MADDAx , mVU_MSUBAx, \
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mVU_ITOF0 , mVU_FTOI0 , mVU_MULAx , mVU_MULAq, \
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mVU_ADDAq , mVU_SUBAq , mVU_ADDA , mVU_SUBA, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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void (*mVU_UPPER_FD_00_TABLE [32])(mP) = {
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mVU_ADDAx , mVU_SUBAx , mVU_MADDAx , mVU_MSUBAx,
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mVU_ITOF0 , mVU_FTOI0 , mVU_MULAx , mVU_MULAq,
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mVU_ADDAq , mVU_SUBAq , mVU_ADDA , mVU_SUBA,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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};
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#define microVU_UPPER_FD_01_TABLE(x) void (* mVU_UPPER_FD_01_TABLE##x [32])(mP) = { \
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mVU_ADDAy , mVU_SUBAy , mVU_MADDAy , mVU_MSUBAy, \
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mVU_ITOF4 , mVU_FTOI4 , mVU_MULAy , mVU_ABS, \
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mVU_MADDAq , mVU_MSUBAq , mVU_MADDA , mVU_MSUBA, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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void (* mVU_UPPER_FD_01_TABLE [32])(mP) = {
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mVU_ADDAy , mVU_SUBAy , mVU_MADDAy , mVU_MSUBAy,
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mVU_ITOF4 , mVU_FTOI4 , mVU_MULAy , mVU_ABS,
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mVU_MADDAq , mVU_MSUBAq , mVU_MADDA , mVU_MSUBA,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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};
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#define microVU_UPPER_FD_10_TABLE(x) void (* mVU_UPPER_FD_10_TABLE##x [32])(mP) = { \
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mVU_ADDAz , mVU_SUBAz , mVU_MADDAz , mVU_MSUBAz, \
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mVU_ITOF12 , mVU_FTOI12 , mVU_MULAz , mVU_MULAi, \
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mVU_ADDAi , mVU_SUBAi , mVU_MULA , mVU_OPMULA, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
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void (* mVU_UPPER_FD_10_TABLE [32])(mP) = {
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mVU_ADDAz , mVU_SUBAz , mVU_MADDAz , mVU_MSUBAz,
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mVU_ITOF12 , mVU_FTOI12 , mVU_MULAz , mVU_MULAi,
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mVU_ADDAi , mVU_SUBAi , mVU_MULA , mVU_OPMULA,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
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mVUunknown , mVUunknown , mVUunknown , mVUunknown,
|
||||
mVUunknown , mVUunknown , mVUunknown , mVUunknown,
|
||||
mVUunknown , mVUunknown , mVUunknown , mVUunknown,
|
||||
};
|
||||
|
||||
#define microVU_UPPER_FD_11_TABLE(x) void (* mVU_UPPER_FD_11_TABLE##x [32])(mP) = { \
|
||||
mVU_ADDAw , mVU_SUBAw , mVU_MADDAw , mVU_MSUBAw, \
|
||||
mVU_ITOF15 , mVU_FTOI15 , mVU_MULAw , mVU_CLIP, \
|
||||
mVU_MADDAi , mVU_MSUBAi , mVUunknown , mVU_NOP, \
|
||||
mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
|
||||
mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
|
||||
mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
|
||||
mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
|
||||
mVUunknown , mVUunknown , mVUunknown , mVUunknown, \
|
||||
void (* mVU_UPPER_FD_11_TABLE [32])(mP) = {
|
||||
mVU_ADDAw , mVU_SUBAw , mVU_MADDAw , mVU_MSUBAw,
|
||||
mVU_ITOF15 , mVU_FTOI15 , mVU_MULAw , mVU_CLIP,
|
||||
mVU_MADDAi , mVU_MSUBAi , mVUunknown , mVU_NOP,
|
||||
mVUunknown , mVUunknown , mVUunknown , mVUunknown,
|
||||
mVUunknown , mVUunknown , mVUunknown , mVUunknown,
|
||||
mVUunknown , mVUunknown , mVUunknown , mVUunknown,
|
||||
mVUunknown , mVUunknown , mVUunknown , mVUunknown,
|
||||
mVUunknown , mVUunknown , mVUunknown , mVUunknown,
|
||||
};
|
||||
|
||||
//------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------
|
||||
// Create Table Instances
|
||||
//------------------------------------------------------------------
|
||||
#define mVUcreateTable(x) \
|
||||
microVU_LOWER_OPCODE(x) \
|
||||
microVU_LowerOP_T3_00_OPCODE(x) \
|
||||
microVU_LowerOP_T3_01_OPCODE(x) \
|
||||
microVU_LowerOP_T3_10_OPCODE(x) \
|
||||
microVU_LowerOP_T3_11_OPCODE(x) \
|
||||
microVU_LowerOP_OPCODE(x) \
|
||||
microVU_UPPER_OPCODE(x) \
|
||||
microVU_UPPER_FD_00_TABLE(x) \
|
||||
microVU_UPPER_FD_01_TABLE(x) \
|
||||
microVU_UPPER_FD_10_TABLE(x) \
|
||||
microVU_UPPER_FD_11_TABLE(x)
|
||||
|
||||
mVUcreateTable(0)
|
||||
|
||||
//------------------------------------------------------------------
|
||||
// Table Functions
|
||||
//------------------------------------------------------------------
|
||||
#define doTableStuff(tableName, args) { \
|
||||
tableName##0[ args ](mX); \
|
||||
}
|
||||
|
||||
mVUop(mVU_UPPER_FD_00) { doTableStuff(mVU_UPPER_FD_00_TABLE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
mVUop(mVU_UPPER_FD_01) { doTableStuff(mVU_UPPER_FD_01_TABLE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
mVUop(mVU_UPPER_FD_10) { doTableStuff(mVU_UPPER_FD_10_TABLE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
mVUop(mVU_UPPER_FD_11) { doTableStuff(mVU_UPPER_FD_11_TABLE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
mVUop(mVULowerOP) { doTableStuff(mVULowerOP_OPCODE, (mVUgetCode & 0x3f)); }
|
||||
mVUop(mVULowerOP_T3_00) { doTableStuff(mVULowerOP_T3_00_OPCODE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
mVUop(mVULowerOP_T3_01) { doTableStuff(mVULowerOP_T3_01_OPCODE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
mVUop(mVULowerOP_T3_10) { doTableStuff(mVULowerOP_T3_10_OPCODE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
mVUop(mVULowerOP_T3_11) { doTableStuff(mVULowerOP_T3_11_OPCODE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
mVUop(mVUopU) { doTableStuff(mVU_UPPER_OPCODE, (mVUgetCode & 0x3f)); } // Gets Upper Opcode
|
||||
mVUop(mVUopL) { doTableStuff(mVULOWER_OPCODE, (mVUgetCode >> 25)); } // Gets Lower Opcode
|
||||
mVUop(mVU_UPPER_FD_00) { mVU_UPPER_FD_00_TABLE [((mVUgetCode >> 6) & 0x1f)](mX); }
|
||||
mVUop(mVU_UPPER_FD_01) { mVU_UPPER_FD_01_TABLE [((mVUgetCode >> 6) & 0x1f)](mX); }
|
||||
mVUop(mVU_UPPER_FD_10) { mVU_UPPER_FD_10_TABLE [((mVUgetCode >> 6) & 0x1f)](mX); }
|
||||
mVUop(mVU_UPPER_FD_11) { mVU_UPPER_FD_11_TABLE [((mVUgetCode >> 6) & 0x1f)](mX); }
|
||||
mVUop(mVULowerOP) { mVULowerOP_OPCODE [ (mVUgetCode & 0x3f) ](mX); }
|
||||
mVUop(mVULowerOP_T3_00) { mVULowerOP_T3_00_OPCODE [((mVUgetCode >> 6) & 0x1f)](mX); }
|
||||
mVUop(mVULowerOP_T3_01) { mVULowerOP_T3_01_OPCODE [((mVUgetCode >> 6) & 0x1f)](mX); }
|
||||
mVUop(mVULowerOP_T3_10) { mVULowerOP_T3_10_OPCODE [((mVUgetCode >> 6) & 0x1f)](mX); }
|
||||
mVUop(mVULowerOP_T3_11) { mVULowerOP_T3_11_OPCODE [((mVUgetCode >> 6) & 0x1f)](mX); }
|
||||
mVUop(mVUopU) { mVU_UPPER_OPCODE [(mVUgetCode & 0x3f)](mX); } // Gets Upper Opcode
|
||||
mVUop(mVUopL) { mVULOWER_OPCODE [(mVUgetCode >> 25)](mX); } // Gets Lower Opcode
|
||||
mVUop(mVUunknown) {
|
||||
pass2 { SysPrintf("microVU%d: Unknown Micro VU opcode called (%x) [%04x]\n", getIndex, mVUgetCode, xPC); }
|
||||
pass3 { mVUlog("Unknown", mVUgetCode); }
|
||||
|
|
Loading…
Reference in New Issue