mirror of https://github.com/PCSX2/pcsx2.git
MTVU: Move code out of header.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@5144 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
sudonim1@gmail.com
parent
0ecca4b7de
commit
20b0627e8e
324
pcsx2/MTVU.cpp
324
pcsx2/MTVU.cpp
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@ -17,21 +17,341 @@
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#include "Common.h"
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#include "MTVU.h"
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#include "newVif.h"
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#include "Gif_Unit.h"
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__aligned16 VU_Thread vu1Thread(CpuVU1, VU1);
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#define volatize(x) (*reinterpret_cast<volatile uint*>(&(x)))
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#define size_u32(x) (((u32)x+3u)>>2) // Rounds up a size in bytes for size in u32's
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#define MTVU_ALWAYS_KICK 0
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#define MTVU_SYNC_MODE 0
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enum MTVU_EVENT {
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MTVU_VU_EXECUTE, // Execute VU program
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MTVU_VU_WRITE_MICRO, // Write to VU micro-mem
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MTVU_VU_WRITE_DATA, // Write to VU data-mem
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MTVU_VIF_WRITE_COL, // Write to Vif col reg
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MTVU_VIF_WRITE_ROW, // Write to Vif row reg
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MTVU_VIF_UNPACK, // Execute Vif Unpack
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MTVU_NULL_PACKET, // Go back to beginning of buffer
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MTVU_RESET
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};
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// Calls the vif unpack functions from the MTVU thread
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void MTVU_Unpack(void* data, VIFregisters& vifRegs) {
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static void MTVU_Unpack(void* data, VIFregisters& vifRegs)
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{
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bool isFill = vifRegs.cycle.cl < vifRegs.cycle.wl;
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if (newVifDynaRec) dVifUnpack<1>((u8*)data, isFill);
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else _nVifUnpack(1, (u8*)data, vifRegs.mode, isFill);
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}
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// Called on Saving/Loading states...
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void SaveStateBase::mtvuFreeze() {
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void SaveStateBase::mtvuFreeze()
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{
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FreezeTag("MTVU");
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pxAssert(vu1Thread.IsDone());
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if (!IsSaving()) vu1Thread.Reset();
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Freeze(vu1Thread.vuCycles);
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Freeze(vu1Thread.vuCycleIdx);
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}
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VU_Thread::VU_Thread(BaseVUmicroCPU*& _vuCPU, VURegs& _vuRegs) :
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vuCPU(_vuCPU), vuRegs(_vuRegs)
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{
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m_name = L"MTVU";
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Reset();
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}
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VU_Thread::~VU_Thread() throw()
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{
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pxThread::Cancel();
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}
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void VU_Thread::Reset()
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{
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read_pos = 0;
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write_pos = 0;
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write_offset = 0;
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vuCycleIdx = 0;
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isBusy = false;
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memzero(vif);
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memzero(vifRegs);
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memzero(vuCycles);
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}
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void VU_Thread::ExecuteTaskInThread()
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{
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PCSX2_PAGEFAULT_PROTECT {
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ExecuteRingBuffer();
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} PCSX2_PAGEFAULT_EXCEPT;
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}
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void VU_Thread::ExecuteRingBuffer()
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{
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for(;;) {
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semaEvent.WaitWithoutYield();
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ScopedLockBool lock(mtxBusy, isBusy);
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while (read_pos != GetWritePos()) {
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u32 tag = Read();
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switch (tag) {
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case MTVU_VU_EXECUTE: {
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vuRegs.cycle = 0;
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s32 addr = Read();
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vifRegs.top = Read();
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vifRegs.itop = Read();
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if (addr != -1) vuRegs.VI[REG_TPC].UL = addr;
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vuCPU->Execute(vu1RunCycles);
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gifUnit.gifPath[GIF_PATH_1].FinishGSPacketMTVU();
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semaXGkick.Post(); // Tell MTGS a path1 packet is complete
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AtomicExchange(vuCycles[vuCycleIdx], vuRegs.cycle);
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vuCycleIdx = (vuCycleIdx + 1) & 3;
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break;
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}
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case MTVU_VU_WRITE_MICRO: {
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u32 vu_micro_addr = Read();
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u32 size = Read();
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vuCPU->Clear(vu_micro_addr, size);
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Read(&vuRegs.Micro[vu_micro_addr], size);
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break;
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}
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case MTVU_VU_WRITE_DATA: {
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u32 vu_data_addr = Read();
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u32 size = Read();
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Read(&vuRegs.Mem[vu_data_addr], size);
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break;
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}
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case MTVU_VIF_WRITE_COL:
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Read(&vif.MaskCol, sizeof(vif.MaskCol));
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break;
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case MTVU_VIF_WRITE_ROW:
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Read(&vif.MaskRow, sizeof(vif.MaskRow));
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break;
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case MTVU_VIF_UNPACK: {
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u32 vif_copy_size = (uptr)&vif.StructEnd - (uptr)&vif.tag;
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Read(&vif.tag, vif_copy_size);
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ReadRegs(&vifRegs);
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u32 size = Read();
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MTVU_Unpack(&buffer[read_pos], vifRegs);
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incReadPos(size_u32(size));
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break;
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}
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case MTVU_NULL_PACKET:
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AtomicExchange(read_pos, 0);
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break;
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jNO_DEFAULT;
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}
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}
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}
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}
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// Should only be called by ReserveSpace()
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__ri void VU_Thread::WaitOnSize(s32 size)
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{
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for(;;) {
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s32 readPos = GetReadPos();
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if (readPos <= write_pos) break; // MTVU is reading in back of write_pos
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if (readPos > write_pos + size) break; // Enough free front space
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if (1) { // Let MTVU run to free up buffer space
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KickStart();
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if (IsDevBuild) DevCon.WriteLn("WaitOnSize()");
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ScopedLock lock(mtxBusy);
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}
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}
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}
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// Makes sure theres enough room in the ring buffer
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// to write a continuous 'size * sizeof(u32)' bytes
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void VU_Thread::ReserveSpace(s32 size)
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{
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pxAssert(write_pos < buffer_size);
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pxAssert(size < buffer_size);
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pxAssert(size > 0);
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pxAssert(write_offset == 0);
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if (write_pos + size > buffer_size) {
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pxAssert(write_pos > 0);
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WaitOnSize(1); // Size of MTVU_NULL_PACKET
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Write(MTVU_NULL_PACKET);
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write_offset = 0;
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AtomicExchange(volatize(write_pos), 0);
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}
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WaitOnSize(size);
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}
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// Use this when reading read_pos from ee thread
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__fi volatile s32 VU_Thread::GetReadPos()
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{
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return AtomicRead(read_pos);
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}
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// Use this when reading write_pos from vu thread
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__fi volatile s32 VU_Thread::GetWritePos()
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{
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return AtomicRead(volatize(write_pos));
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}
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// Gets the effective write pointer after adding write_offset
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__fi u32* VU_Thread::GetWritePtr()
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{
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return &buffer[(write_pos + write_offset) & buffer_mask];
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}
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__fi void VU_Thread::incReadPos(s32 offset)
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{ // Offset in u32 sizes
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s32 temp = (read_pos + offset) & buffer_mask;
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AtomicExchange(read_pos, temp);
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}
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__fi void VU_Thread::incWritePos()
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{ // Adds write_offset
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s32 temp = (write_pos + write_offset) & buffer_mask;
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write_offset = 0;
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AtomicExchange(volatize(write_pos), temp);
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if (MTVU_ALWAYS_KICK) KickStart();
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if (MTVU_SYNC_MODE) WaitVU();
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}
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__fi u32 VU_Thread::Read()
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{
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u32 ret = buffer[read_pos];
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incReadPos(1);
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return ret;
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}
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__fi void VU_Thread::Read(void* dest, u32 size)
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{
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memcpy_fast(dest, &buffer[read_pos], size);
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incReadPos(size_u32(size));
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}
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__fi void VU_Thread::ReadRegs(VIFregisters* dest)
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{
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VIFregistersMTVU* src = (VIFregistersMTVU*)&buffer[read_pos];
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dest->cycle = src->cycle;
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dest->mode = src->mode;
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dest->num = src->num;
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dest->mask = src->mask;
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dest->itop = src->itop;
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dest->top = src->top;
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incReadPos(size_u32(sizeof(VIFregistersMTVU)));
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}
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__fi void VU_Thread::Write(u32 val)
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{
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GetWritePtr()[0] = val;
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write_offset += 1;
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}
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__fi void VU_Thread::Write(void* src, u32 size)
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{
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memcpy_fast(GetWritePtr(), src, size);
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write_offset += size_u32(size);
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}
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__fi void VU_Thread::WriteRegs(VIFregisters* src)
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{
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VIFregistersMTVU* dest = (VIFregistersMTVU*)GetWritePtr();
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dest->cycle = src->cycle;
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dest->mode = src->mode;
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dest->num = src->num;
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dest->mask = src->mask;
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dest->top = src->top;
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dest->itop = src->itop;
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write_offset += size_u32(sizeof(VIFregistersMTVU));
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}
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// Returns Average number of vu Cycles from last 4 runs
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// Used for vu cycle stealing hack
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u32 VU_Thread::Get_vuCycles()
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{
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return (AtomicRead(vuCycles[0]) + AtomicRead(vuCycles[1])
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+ AtomicRead(vuCycles[2]) + AtomicRead(vuCycles[3])) >> 2;
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}
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void VU_Thread::KickStart(bool forceKick)
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{
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if ((forceKick && !semaEvent.Count())
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|| (!isBusy && GetReadPos() != write_pos)) semaEvent.Post();
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}
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bool VU_Thread::IsDone()
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{
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return !isBusy && GetReadPos() == GetWritePos();
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}
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void VU_Thread::WaitVU()
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{
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MTVU_LOG("MTVU - WaitVU!");
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for(;;) {
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if (IsDone()) break;
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//DevCon.WriteLn("WaitVU()");
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pxAssert(THREAD_VU1);
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KickStart();
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ScopedLock lock(mtxBusy);
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}
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}
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void VU_Thread::ExecuteVU(u32 vu_addr, u32 vif_top, u32 vif_itop)
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{
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MTVU_LOG("MTVU - ExecuteVU!");
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ReserveSpace(4);
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Write(MTVU_VU_EXECUTE);
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Write(vu_addr);
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Write(vif_top);
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Write(vif_itop);
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incWritePos();
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gifUnit.TransferGSPacketData(GIF_TRANS_MTVU, NULL, 0);
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KickStart();
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u32 cycles = std::min(Get_vuCycles(), 3000u);
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cpuRegs.cycle += cycles * EmuConfig.Speedhacks.VUCycleSteal;
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}
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void VU_Thread::VifUnpack(vifStruct& _vif, VIFregisters& _vifRegs, u8* data, u32 size)
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{
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MTVU_LOG("MTVU - VifUnpack!");
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u32 vif_copy_size = (uptr)&_vif.StructEnd - (uptr)&_vif.tag;
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ReserveSpace(1 + size_u32(vif_copy_size) + size_u32(sizeof(VIFregistersMTVU)) + 1 + size_u32(size));
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Write(MTVU_VIF_UNPACK);
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Write(&_vif.tag, vif_copy_size);
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WriteRegs(&_vifRegs);
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Write(size);
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Write(data, size);
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incWritePos();
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KickStart();
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}
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void VU_Thread::WriteMicroMem(u32 vu_micro_addr, void* data, u32 size)
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{
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MTVU_LOG("MTVU - WriteMicroMem!");
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ReserveSpace(3 + size_u32(size));
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Write(MTVU_VU_WRITE_MICRO);
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Write(vu_micro_addr);
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Write(size);
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Write(data, size);
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incWritePos();
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}
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void VU_Thread::WriteDataMem(u32 vu_data_addr, void* data, u32 size)
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{
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MTVU_LOG("MTVU - WriteDataMem!");
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ReserveSpace(3 + size_u32(size));
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Write(MTVU_VU_WRITE_DATA);
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Write(vu_data_addr);
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Write(size);
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Write(data, size);
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incWritePos();
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}
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void VU_Thread::WriteCol(vifStruct& _vif)
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{
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MTVU_LOG("MTVU - WriteCol!");
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ReserveSpace(1 + size_u32(sizeof(_vif.MaskCol)));
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Write(MTVU_VIF_WRITE_COL);
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Write(&_vif.MaskCol, sizeof(_vif.MaskCol));
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incWritePos();
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}
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void VU_Thread::WriteRow(vifStruct& _vif)
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{
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MTVU_LOG("MTVU - WriteRow!");
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ReserveSpace(1 + size_u32(sizeof(_vif.MaskRow)));
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Write(MTVU_VIF_WRITE_ROW);
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Write(&_vif.MaskRow, sizeof(_vif.MaskRow));
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incWritePos();
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}
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321
pcsx2/MTVU.h
321
pcsx2/MTVU.h
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@ -4,32 +4,15 @@
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#include "Vif.h"
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#include "Vif_Dma.h"
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#include "VUmicro.h"
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#include "Gif_Unit.h"
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extern void MTVU_Unpack(void* data, VIFregisters& vifRegs);
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#define volatize(x) (*reinterpret_cast<volatile uint*>(&(x)))
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#define size_u32(x) (((u32)x+3u)>>2) // Rounds up a size in bytes for size in u32's
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#define MTVU_ALWAYS_KICK 0
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#define MTVU_SYNC_MODE 0
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#define MTVU_LOG(...) do{} while(0)
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//#define MTVU_LOG DevCon.WriteLn
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enum MTVU_EVENT {
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MTVU_VU_EXECUTE, // Execute VU program
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MTVU_VU_WRITE_MICRO, // Write to VU micro-mem
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MTVU_VU_WRITE_DATA, // Write to VU data-mem
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MTVU_VIF_WRITE_COL, // Write to Vif col reg
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MTVU_VIF_WRITE_ROW, // Write to Vif row reg
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MTVU_VIF_UNPACK, // Execute Vif Unpack
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MTVU_NULL_PACKET, // Go back to beginning of buffer
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MTVU_RESET
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};
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// Notes:
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// - This class should only be accessed from the EE thread...
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// - buffer_size must be power of 2
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// - ring-buffer has no complete pending packets when read_pos==write_pos
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struct VU_Thread : public pxThread {
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class VU_Thread : public pxThread {
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static const u32 buffer_size = (_1mb * 16) / sizeof(u32);
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static const u32 buffer_mask = buffer_size - 1;
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__aligned(4) u32 buffer[buffer_size];
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@ -39,287 +22,69 @@ struct VU_Thread : public pxThread {
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__aligned(4) s32 write_offset; // Only modified by EE thread
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__aligned(4) Mutex mtxBusy;
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__aligned(4) Semaphore semaEvent;
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__aligned(4) Semaphore semaXGkick;
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__aligned(4) BaseVUmicroCPU*& vuCPU;
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__aligned(4) VURegs& vuRegs;
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public:
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__aligned16 vifStruct vif;
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__aligned16 VIFregisters vifRegs;
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__aligned(4) Semaphore semaXGkick;
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__aligned(4) u32 vuCycles[4]; // Used for VU cycle stealing hack
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__aligned(4) u32 vuCycleIdx; // Used for VU cycle stealing hack
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VU_Thread(BaseVUmicroCPU*& _vuCPU, VURegs& _vuRegs) :
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vuCPU(_vuCPU), vuRegs(_vuRegs) {
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m_name = L"MTVU";
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Reset();
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}
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virtual ~VU_Thread() throw() {
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pxThread::Cancel();
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}
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void InitThread() {
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Start(); // Starts the pxThread
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}
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void Reset() {
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read_pos = 0;
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write_pos = 0;
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write_offset = 0;
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vuCycleIdx = 0;
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isBusy = false;
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memzero(vif);
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memzero(vifRegs);
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memzero(vuCycles);
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}
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protected:
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// Should only be called by ReserveSpace()
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__ri void WaitOnSize(s32 size) {
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for(;;) {
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s32 readPos = GetReadPos();
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if (readPos <= write_pos) break; // MTVU is reading in back of write_pos
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if (readPos > write_pos + size) break; // Enough free front space
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if (1) { // Let MTVU run to free up buffer space
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KickStart();
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if (IsDevBuild) DevCon.WriteLn("WaitOnSize()");
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ScopedLock lock(mtxBusy);
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}
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}
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}
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VU_Thread(BaseVUmicroCPU*& _vuCPU, VURegs& _vuRegs);
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virtual ~VU_Thread() throw();
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// Makes sure theres enough room in the ring buffer
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// to write a continuous 'size * sizeof(u32)' bytes
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void ReserveSpace(s32 size) {
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pxAssert(write_pos < buffer_size);
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pxAssert(size < buffer_size);
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pxAssert(size > 0);
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pxAssert(write_offset == 0);
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if (write_pos + size > buffer_size) {
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pxAssert(write_pos > 0);
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WaitOnSize(1); // Size of MTVU_NULL_PACKET
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Write(MTVU_NULL_PACKET);
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write_offset = 0;
|
||||
AtomicExchange(volatize(write_pos), 0);
|
||||
}
|
||||
WaitOnSize(size);
|
||||
}
|
||||
void Reset();
|
||||
|
||||
// Use this when reading read_pos from ee thread
|
||||
__fi volatile s32 GetReadPos() {
|
||||
return AtomicRead(read_pos);
|
||||
}
|
||||
// Use this when reading write_pos from vu thread
|
||||
__fi volatile s32 GetWritePos() {
|
||||
return AtomicRead(volatize(write_pos));
|
||||
}
|
||||
// Gets the effective write pointer after adding write_offset
|
||||
__fi u32* GetWritePtr() {
|
||||
return &buffer[(write_pos + write_offset) & buffer_mask];
|
||||
}
|
||||
|
||||
__fi void incReadPos(s32 offset) { // Offset in u32 sizes
|
||||
s32 temp = (read_pos + offset) & buffer_mask;
|
||||
AtomicExchange(read_pos, temp);
|
||||
}
|
||||
__fi void incWritePos() { // Adds write_offset
|
||||
s32 temp = (write_pos + write_offset) & buffer_mask;
|
||||
write_offset = 0;
|
||||
AtomicExchange(volatize(write_pos), temp);
|
||||
if (MTVU_ALWAYS_KICK) KickStart();
|
||||
if (MTVU_SYNC_MODE) WaitVU();
|
||||
}
|
||||
|
||||
__fi u32 Read() {
|
||||
u32 ret = buffer[read_pos];
|
||||
incReadPos(1);
|
||||
return ret;
|
||||
}
|
||||
__fi void Read(void* dest, u32 size) { // Size in bytes
|
||||
memcpy_fast(dest, &buffer[read_pos], size);
|
||||
incReadPos(size_u32(size));
|
||||
}
|
||||
__fi void ReadRegs(VIFregisters* dest) {
|
||||
VIFregistersMTVU* src = (VIFregistersMTVU*)&buffer[read_pos];
|
||||
dest->cycle = src->cycle;
|
||||
dest->mode = src->mode;
|
||||
dest->num = src->num;
|
||||
dest->mask = src->mask;
|
||||
dest->itop = src->itop;
|
||||
dest->top = src->top;
|
||||
incReadPos(size_u32(sizeof(VIFregistersMTVU)));
|
||||
}
|
||||
|
||||
__fi void Write(u32 val) {
|
||||
GetWritePtr()[0] = val;
|
||||
write_offset += 1;
|
||||
}
|
||||
__fi void Write(void* src, u32 size) { // Size in bytes
|
||||
memcpy_fast(GetWritePtr(), src, size);
|
||||
write_offset += size_u32(size);
|
||||
}
|
||||
__fi void WriteRegs(VIFregisters* src) {
|
||||
VIFregistersMTVU* dest = (VIFregistersMTVU*)GetWritePtr();
|
||||
dest->cycle = src->cycle;
|
||||
dest->mode = src->mode;
|
||||
dest->num = src->num;
|
||||
dest->mask = src->mask;
|
||||
dest->top = src->top;
|
||||
dest->itop = src->itop;
|
||||
write_offset += size_u32(sizeof(VIFregistersMTVU));
|
||||
}
|
||||
|
||||
void ExecuteTaskInThread() {
|
||||
PCSX2_PAGEFAULT_PROTECT {
|
||||
ExecuteRingBuffer();
|
||||
} PCSX2_PAGEFAULT_EXCEPT;
|
||||
}
|
||||
|
||||
void ExecuteRingBuffer() {
|
||||
for(;;) {
|
||||
semaEvent.WaitWithoutYield();
|
||||
ScopedLockBool lock(mtxBusy, isBusy);
|
||||
while (read_pos != GetWritePos()) {
|
||||
u32 tag = Read();
|
||||
switch (tag) {
|
||||
case MTVU_VU_EXECUTE: {
|
||||
vuRegs.cycle = 0;
|
||||
s32 addr = Read();
|
||||
vifRegs.top = Read();
|
||||
vifRegs.itop = Read();
|
||||
if (addr != -1) vuRegs.VI[REG_TPC].UL = addr;
|
||||
vuCPU->Execute(vu1RunCycles);
|
||||
gifUnit.gifPath[GIF_PATH_1].FinishGSPacketMTVU();
|
||||
semaXGkick.Post(); // Tell MTGS a path1 packet is complete
|
||||
AtomicExchange(vuCycles[vuCycleIdx], vuRegs.cycle);
|
||||
vuCycleIdx = (vuCycleIdx + 1) & 3;
|
||||
break;
|
||||
}
|
||||
case MTVU_VU_WRITE_MICRO: {
|
||||
u32 vu_micro_addr = Read();
|
||||
u32 size = Read();
|
||||
vuCPU->Clear(vu_micro_addr, size);
|
||||
Read(&vuRegs.Micro[vu_micro_addr], size);
|
||||
break;
|
||||
}
|
||||
case MTVU_VU_WRITE_DATA: {
|
||||
u32 vu_data_addr = Read();
|
||||
u32 size = Read();
|
||||
Read(&vuRegs.Mem[vu_data_addr], size);
|
||||
break;
|
||||
}
|
||||
case MTVU_VIF_WRITE_COL:
|
||||
Read(&vif.MaskCol, sizeof(vif.MaskCol));
|
||||
break;
|
||||
case MTVU_VIF_WRITE_ROW:
|
||||
Read(&vif.MaskRow, sizeof(vif.MaskRow));
|
||||
break;
|
||||
case MTVU_VIF_UNPACK: {
|
||||
u32 vif_copy_size = (uptr)&vif.StructEnd - (uptr)&vif.tag;
|
||||
Read(&vif.tag, vif_copy_size);
|
||||
ReadRegs(&vifRegs);
|
||||
u32 size = Read();
|
||||
MTVU_Unpack(&buffer[read_pos], vifRegs);
|
||||
incReadPos(size_u32(size));
|
||||
break;
|
||||
}
|
||||
case MTVU_NULL_PACKET:
|
||||
AtomicExchange(read_pos, 0);
|
||||
break;
|
||||
jNO_DEFAULT;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Returns Average number of vu Cycles from last 4 runs
|
||||
u32 Get_vuCycles() { // Used for vu cycle stealing hack
|
||||
return (AtomicRead(vuCycles[0]) + AtomicRead(vuCycles[1])
|
||||
+ AtomicRead(vuCycles[2]) + AtomicRead(vuCycles[3])) >> 2;
|
||||
}
|
||||
public:
|
||||
|
||||
// Get MTVU to start processing its packets if it isn't already
|
||||
void KickStart(bool forceKick = false) {
|
||||
if ((forceKick && !semaEvent.Count())
|
||||
|| (!isBusy && GetReadPos() != write_pos)) semaEvent.Post();
|
||||
}
|
||||
void KickStart(bool forceKick = false);
|
||||
|
||||
// Used for assertions...
|
||||
bool IsDone() { return !isBusy && GetReadPos() == GetWritePos(); }
|
||||
bool IsDone();
|
||||
|
||||
// Waits till MTVU is done processing
|
||||
void WaitVU() {
|
||||
MTVU_LOG("MTVU - WaitVU!");
|
||||
for(;;) {
|
||||
if (IsDone()) break;
|
||||
//DevCon.WriteLn("WaitVU()");
|
||||
pxAssert(THREAD_VU1);
|
||||
KickStart();
|
||||
ScopedLock lock(mtxBusy);
|
||||
}
|
||||
}
|
||||
void WaitVU();
|
||||
|
||||
void ExecuteVU(u32 vu_addr, u32 vif_top, u32 vif_itop) {
|
||||
MTVU_LOG("MTVU - ExecuteVU!");
|
||||
ReserveSpace(4);
|
||||
Write(MTVU_VU_EXECUTE);
|
||||
Write(vu_addr);
|
||||
Write(vif_top);
|
||||
Write(vif_itop);
|
||||
incWritePos();
|
||||
gifUnit.TransferGSPacketData(GIF_TRANS_MTVU, NULL, 0);
|
||||
KickStart();
|
||||
u32 cycles = std::min(Get_vuCycles(), 3000u);
|
||||
cpuRegs.cycle += cycles * EmuConfig.Speedhacks.VUCycleSteal;
|
||||
}
|
||||
void ExecuteVU(u32 vu_addr, u32 vif_top, u32 vif_itop);
|
||||
|
||||
void VifUnpack(vifStruct& _vif, VIFregisters& _vifRegs, u8* data, u32 size) {
|
||||
MTVU_LOG("MTVU - VifUnpack!");
|
||||
u32 vif_copy_size = (uptr)&_vif.StructEnd - (uptr)&_vif.tag;
|
||||
ReserveSpace(1 + size_u32(vif_copy_size) + size_u32(sizeof(VIFregistersMTVU)) + 1 + size_u32(size));
|
||||
Write(MTVU_VIF_UNPACK);
|
||||
Write(&_vif.tag, vif_copy_size);
|
||||
WriteRegs(&_vifRegs);
|
||||
Write(size);
|
||||
Write(data, size);
|
||||
incWritePos();
|
||||
KickStart();
|
||||
}
|
||||
void VifUnpack(vifStruct& _vif, VIFregisters& _vifRegs, u8* data, u32 size);
|
||||
|
||||
// Writes to VU's Micro Memory (size in bytes)
|
||||
void WriteMicroMem(u32 vu_micro_addr, void* data, u32 size) {
|
||||
MTVU_LOG("MTVU - WriteMicroMem!");
|
||||
ReserveSpace(3 + size_u32(size));
|
||||
Write(MTVU_VU_WRITE_MICRO);
|
||||
Write(vu_micro_addr);
|
||||
Write(size);
|
||||
Write(data, size);
|
||||
incWritePos();
|
||||
}
|
||||
void WriteMicroMem(u32 vu_micro_addr, void* data, u32 size);
|
||||
|
||||
// Writes to VU's Data Memory (size in bytes)
|
||||
void WriteDataMem(u32 vu_data_addr, void* data, u32 size) {
|
||||
MTVU_LOG("MTVU - WriteDataMem!");
|
||||
ReserveSpace(3 + size_u32(size));
|
||||
Write(MTVU_VU_WRITE_DATA);
|
||||
Write(vu_data_addr);
|
||||
Write(size);
|
||||
Write(data, size);
|
||||
incWritePos();
|
||||
}
|
||||
void WriteDataMem(u32 vu_data_addr, void* data, u32 size);
|
||||
|
||||
void WriteCol(vifStruct& _vif) {
|
||||
MTVU_LOG("MTVU - WriteCol!");
|
||||
ReserveSpace(1 + size_u32(sizeof(_vif.MaskCol)));
|
||||
Write(MTVU_VIF_WRITE_COL);
|
||||
Write(&_vif.MaskCol, sizeof(_vif.MaskCol));
|
||||
incWritePos();
|
||||
}
|
||||
void WriteCol(vifStruct& _vif);
|
||||
|
||||
void WriteRow(vifStruct& _vif) {
|
||||
MTVU_LOG("MTVU - WriteRow!");
|
||||
ReserveSpace(1 + size_u32(sizeof(_vif.MaskRow)));
|
||||
Write(MTVU_VIF_WRITE_ROW);
|
||||
Write(&_vif.MaskRow, sizeof(_vif.MaskRow));
|
||||
incWritePos();
|
||||
}
|
||||
void WriteRow(vifStruct& _vif);
|
||||
|
||||
protected:
|
||||
void ExecuteTaskInThread();
|
||||
|
||||
private:
|
||||
void ExecuteRingBuffer();
|
||||
|
||||
void WaitOnSize(s32 size);
|
||||
void ReserveSpace(s32 size);
|
||||
|
||||
volatile s32 GetReadPos();
|
||||
volatile s32 GetWritePos();
|
||||
u32* GetWritePtr();
|
||||
|
||||
void incReadPos(s32 offset);
|
||||
void incWritePos();
|
||||
|
||||
u32 Read();
|
||||
void Read(void* dest, u32 size);
|
||||
void ReadRegs(VIFregisters* dest);
|
||||
|
||||
void Write(u32 val);
|
||||
void Write(void* src, u32 size);
|
||||
void WriteRegs(VIFregisters* src);
|
||||
|
||||
u32 Get_vuCycles();
|
||||
};
|
||||
|
||||
extern __aligned16 VU_Thread vu1Thread;
|
||||
|
||||
extern __aligned16 VU_Thread vu1Thread;
|
||||
|
|
@ -293,7 +293,7 @@ void recMicroVU0::Reserve() {
|
|||
void recMicroVU1::Reserve() {
|
||||
if (AtomicExchange(m_Reserved, 1) == 0) {
|
||||
mVUinit(microVU1, 1);
|
||||
vu1Thread.InitThread();
|
||||
vu1Thread.Start();
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue