mirror of https://github.com/PCSX2/pcsx2.git
Changed a few more -> to . for consistency.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3707 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
parent
fe347c2c04
commit
1edb900405
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@ -283,8 +283,8 @@ _vifT __fi bool vifWrite32(u32 mem, u32 value) {
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switch (mem) {
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case caseVif(MARK):
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VIF_LOG("VIF%d_MARK write32 0x%8.8x", idx, value);
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vifXRegs->stat.MRK = false;
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//vifXRegs->mark = value;
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vifXRegs.stat.MRK = false;
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//vifXRegs.mark = value;
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break;
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case caseVif(FBRST):
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@ -311,7 +311,7 @@ _vifT __fi bool vifWrite32(u32 mem, u32 value) {
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// of a standard psHu32(mem) = value; writeback. Handled by caller for us, thanks! --air
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//if (!idx) g_vifmask.Row0[ (mem>>4)&3 ] = value;
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//else g_vifmask.Row1[ (mem>>4)&3 ] = value;
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//((u32*)&vifXRegs->r0) [((mem>>4)&3)*4] = value;
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//((u32*)&vifXRegs.r0) [((mem>>4)&3)*4] = value;
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break;
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case caseVif(COL0):
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@ -322,7 +322,7 @@ _vifT __fi bool vifWrite32(u32 mem, u32 value) {
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// of a standard psHu32(mem) = value; writeback. Handled by caller for us, thanks! --air
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//if (!idx) g_vifmask.Col0[ (mem>>4)&3 ] = value;
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//else g_vifmask.Col1[ (mem>>4)&3 ] = value;
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//((u32*)&vifXRegs->c0) [((mem>>4)&3)*4] = value;
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//((u32*)&vifXRegs.c0) [((mem>>4)&3)*4] = value;
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break;
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}
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@ -221,7 +221,7 @@ static VIFregisters& vif1Regs = (VIFregisters&)eeHw[0x3C00];
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#define _vifT template <int idx>
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#define GetVifX (idx ? (vif1) : (vif0))
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#define vifXch (idx ? (vif1ch) : (vif0ch))
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#define vifXRegs (idx ? (&vif1Regs): (&vif0Regs))
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#define vifXRegs (idx ? (vif1Regs) : (vif0Regs))
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extern void dmaVIF0();
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extern void dmaVIF1();
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@ -183,7 +183,6 @@ bool _VIF1chain()
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__fi void vif1SetupTransfer()
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{
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tDMA_TAG *ptag;
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DMACh& vif1c = (DMACh&)eeHw[0x9000];
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switch (vif1.dmamode)
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{
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@ -195,20 +194,20 @@ __fi void vif1SetupTransfer()
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break;
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case VIF_CHAIN_MODE:
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ptag = dmaGetAddr(vif1c.tadr, false); //Set memory pointer to TADR
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ptag = dmaGetAddr(vif1ch.tadr, false); //Set memory pointer to TADR
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if (!(vif1c.transfer("Vif1 Tag", ptag))) return;
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if (!(vif1ch.transfer("Vif1 Tag", ptag))) return;
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vif1c.madr = ptag[1]._u32; //MADR = ADDR field + SPR
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vif1ch.madr = ptag[1]._u32; //MADR = ADDR field + SPR
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g_vifCycles += 1; // Add 1 g_vifCycles from the QW read for the tag
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VIF_LOG("VIF1 Tag %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx",
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ptag[1]._u32, ptag[0]._u32, vif1c.qwc, ptag->ID, vif1c.madr, vif1c.tadr);
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ptag[1]._u32, ptag[0]._u32, vif1ch.qwc, ptag->ID, vif1ch.madr, vif1ch.tadr);
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if (!vif1.done && ((dmacRegs.ctrl.STD == STD_VIF1) && (ptag->ID == TAG_REFS))) // STD == VIF1
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{
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// there are still bugs, need to also check if gif->madr +16*qwc >= stadr, if not, stall
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if ((vif1c.madr + vif1c.qwc * 16) >= dmacRegs.stadr.ADDR)
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if ((vif1ch.madr + vif1ch.qwc * 16) >= dmacRegs.stadr.ADDR)
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{
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// stalled
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hwDmacIrq(DMAC_STALL_SIS);
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@ -219,7 +218,7 @@ __fi void vif1SetupTransfer()
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vif1.inprogress &= ~1;
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if (vif1c.chcr.TTE)
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if (vif1ch.chcr.TTE)
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{
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// Transfer dma tag if tte is set
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@ -243,10 +242,10 @@ __fi void vif1SetupTransfer()
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vif1.done |= hwDmacSrcChainWithStack(vif1ch, ptag->ID);
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if(vif1c.qwc > 0) vif1.inprogress |= 1;
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if(vif1ch.qwc > 0) vif1.inprogress |= 1;
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//Check TIE bit of CHCR and IRQ bit of tag
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if (vif1c.chcr.TIE && ptag->IRQ)
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if (vif1ch.chcr.TIE && ptag->IRQ)
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{
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VIF_LOG("dmaIrq Set");
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@ -285,7 +285,7 @@ vifOp(vifCode_FlushE) {
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}
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vifOp(vifCode_ITop) {
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pass1 { vifXRegs->itops = vifXRegs->code & 0x3ff; GetVifX.cmd = 0; }
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pass1 { vifXRegs.itops = vifXRegs.code & 0x3ff; GetVifX.cmd = 0; }
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pass3 { VifCodeLog("ITop"); }
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return 0;
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}
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@ -293,8 +293,8 @@ vifOp(vifCode_ITop) {
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vifOp(vifCode_Mark) {
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vifStruct& vifX = GetVifX;
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pass1 {
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vifXRegs->mark = (u16)vifXRegs->code;
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vifXRegs->stat.MRK = true;
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vifXRegs.mark = (u16)vifXRegs.code;
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vifXRegs.stat.MRK = true;
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vifX.cmd = 0;
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}
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pass3 { VifCodeLog("Mark"); }
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@ -317,8 +317,8 @@ static __fi void _vifCode_MPG(int idx, u32 addr, const u32 *data, int size) {
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vifOp(vifCode_MPG) {
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vifStruct& vifX = GetVifX;
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pass1 {
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int vifNum = (u8)(vifXRegs->code >> 16);
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vifX.tag.addr = (u16)(vifXRegs->code << 3) & (idx ? 0x3fff : 0xfff);
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int vifNum = (u8)(vifXRegs.code >> 16);
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vifX.tag.addr = (u16)(vifXRegs.code << 3) & (idx ? 0x3fff : 0xfff);
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vifX.tag.size = vifNum ? (vifNum*2) : 512;
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//vifFlush(idx);
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return 1;
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@ -350,14 +350,14 @@ vifOp(vifCode_MPG) {
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vifOp(vifCode_MSCAL) {
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vifStruct& vifX = GetVifX;
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pass1 { vifFlush(idx); vuExecMicro(idx, (u16)(vifXRegs->code) << 3); vifX.cmd = 0;}
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pass1 { vifFlush(idx); vuExecMicro(idx, (u16)(vifXRegs.code) << 3); vifX.cmd = 0;}
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pass3 { VifCodeLog("MSCAL"); }
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return 0;
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}
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vifOp(vifCode_MSCALF) {
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vifStruct& vifX = GetVifX;
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pass1 { vifFlush(idx); vuExecMicro(idx, (u16)(vifXRegs->code) << 3); vifX.cmd = 0; }
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pass1 { vifFlush(idx); vuExecMicro(idx, (u16)(vifXRegs.code) << 3); vifX.cmd = 0; }
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pass3 { VifCodeLog("MSCALF"); }
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return 0;
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}
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@ -398,9 +398,9 @@ vifOp(vifCode_Null) {
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vifStruct& vifX = GetVifX;
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pass1 {
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// if ME1, then force the vif to interrupt
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if (!(vifXRegs->err.ME1)) { // Ignore vifcode and tag mismatch error
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if (!(vifXRegs.err.ME1)) { // Ignore vifcode and tag mismatch error
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Console.WriteLn("Vif%d: Unknown VifCmd! [%x]", idx, vifX.cmd);
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vifXRegs->stat.ER1 = true;
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vifXRegs.stat.ER1 = true;
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vifX.vifstalled = true;
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//vifX.irq++;
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}
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@ -463,7 +463,7 @@ vifOp(vifCode_STCol) {
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}
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pass2 {
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u32* cols = idx ? g_vifmask.Col1 : g_vifmask.Col0;
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u32* pmem1 = &vifXRegs->c0 + (vifX.tag.addr << 2);
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u32* pmem1 = &vifXRegs.c0 + (vifX.tag.addr << 2);
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u32* pmem2 = cols + vifX.tag.addr;
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return _vifCode_STColRow<idx>(data, pmem1, pmem2);
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}
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@ -481,7 +481,7 @@ vifOp(vifCode_STRow) {
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}
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pass2 {
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u32* rows = idx ? g_vifmask.Row1 : g_vifmask.Row0;
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u32* pmem1 = &vifXRegs->r0 + (vifX.tag.addr << 2);
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u32* pmem1 = &vifXRegs.r0 + (vifX.tag.addr << 2);
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u32* pmem2 = rows + vifX.tag.addr;
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return _vifCode_STColRow<idx>(data, pmem1, pmem2);
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}
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@ -492,8 +492,8 @@ vifOp(vifCode_STRow) {
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vifOp(vifCode_STCycl) {
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vifStruct& vifX = GetVifX;
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pass1 {
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vifXRegs->cycle.cl = (u8)(vifXRegs->code);
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vifXRegs->cycle.wl = (u8)(vifXRegs->code >> 8);
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vifXRegs.cycle.cl = (u8)(vifXRegs.code);
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vifXRegs.cycle.wl = (u8)(vifXRegs.code >> 8);
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vifX.cmd = 0;
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}
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pass3 { VifCodeLog("STCycl"); }
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@ -503,13 +503,13 @@ vifOp(vifCode_STCycl) {
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vifOp(vifCode_STMask) {
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vifStruct& vifX = GetVifX;
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pass1 { vifX.tag.size = 1; }
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pass2 { vifXRegs->mask = data[0]; vifX.tag.size = 0; vifX.cmd = 0; }
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pass2 { vifXRegs.mask = data[0]; vifX.tag.size = 0; vifX.cmd = 0; }
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pass3 { VifCodeLog("STMask"); }
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return 1;
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}
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vifOp(vifCode_STMod) {
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pass1 { vifXRegs->mode = vifXRegs->code & 0x3; GetVifX.cmd = 0; }
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pass1 { vifXRegs.mode = vifXRegs.code & 0x3; GetVifX.cmd = 0; }
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pass3 { VifCodeLog("STMod"); }
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return 0;
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}
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@ -24,7 +24,7 @@
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// Doesn't stall if the next vifCode is the Mark command
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_vifT bool runMark(u32* &data) {
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if (((vifXRegs->code >> 24) & 0x7f) == 0x7) {
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if (((vifXRegs.code >> 24) & 0x7f) == 0x7) {
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Console.WriteLn("Vif%d: Running Mark with I-bit", idx);
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return 1; // No Stall?
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}
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@ -34,7 +34,7 @@ _vifT bool runMark(u32* &data) {
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// Returns 1 if i-bit && finished vifcode && i-bit not masked
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_vifT bool analyzeIbit(u32* &data, int iBit) {
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vifStruct& vifX = GetVifX;
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if (iBit && !vifX.cmd && !vifXRegs->err.MII) {
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if (iBit && !vifX.cmd && !vifXRegs.err.MII) {
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//DevCon.WriteLn("Vif I-Bit IRQ");
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vifX.irq++;
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@ -75,14 +75,14 @@ _vifT void vifTransferLoop(u32* &data) {
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u32& pSize = vifX.vifpacketsize;
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int iBit = vifX.cmd >> 7;
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vifXRegs->stat.VPS |= VPS_TRANSFERRING;
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vifXRegs->stat.ER1 = false;
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vifXRegs.stat.VPS |= VPS_TRANSFERRING;
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vifXRegs.stat.ER1 = false;
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while (pSize > 0 && !vifX.vifstalled) {
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if(!vifX.cmd) { // Get new VifCode
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vifX.lastcmd = (vifXRegs->code >> 24) & 0x7f;
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vifXRegs->code = data[0];
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vifX.lastcmd = (vifXRegs.code >> 24) & 0x7f;
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vifXRegs.code = data[0];
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vifX.cmd = data[0] >> 24;
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iBit = data[0] >> 31;
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@ -142,10 +142,10 @@ _vifT static __fi bool vifTransfer(u32 *data, int size) {
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if (vifX.irq && vifX.cmd == 0) {
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//DevCon.WriteLn("Vif IRQ!");
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if(((vifXRegs->code >> 24) & 0x7f) != 0x7)
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if(((vifXRegs.code >> 24) & 0x7f) != 0x7)
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{
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vifX.vifstalled = true;
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vifXRegs->stat.VIS = true; // Note: commenting this out fixes WALL-E?
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vifXRegs.stat.VIS = true; // Note: commenting this out fixes WALL-E?
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}
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if (!vifXch.qwc && !vifX.irqoffset) vifX.inprogress &= ~1;
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@ -302,8 +302,8 @@ _vifT void vifUnpackSetup(const u32 *data) {
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vifStruct& vifX = GetVifX;
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if ((vifXRegs->cycle.wl == 0) && (vifXRegs->cycle.wl < vifXRegs->cycle.cl)) {
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Console.WriteLn("Vif%d CL %d, WL %d", idx, vifXRegs->cycle.cl, vifXRegs->cycle.wl);
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if ((vifXRegs.cycle.wl == 0) && (vifXRegs.cycle.wl < vifXRegs.cycle.cl)) {
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Console.WriteLn("Vif%d CL %d, WL %d", idx, vifXRegs.cycle.cl, vifXRegs.cycle.wl);
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vifX.cmd = 0;
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return; // Skipping write and 0 write-cycles, so do nothing!
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}
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@ -311,25 +311,25 @@ _vifT void vifUnpackSetup(const u32 *data) {
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//if (!idx) vif0FLUSH(); // Only VU0?
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vifX.usn = (vifXRegs->code >> 14) & 0x01;
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int vifNum = (vifXRegs->code >> 16) & 0xff;
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vifX.usn = (vifXRegs.code >> 14) & 0x01;
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int vifNum = (vifXRegs.code >> 16) & 0xff;
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if (vifNum == 0) vifNum = 256;
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vifXRegs->num = vifNum;
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vifXRegs.num = vifNum;
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if (vifXRegs->cycle.wl <= vifXRegs->cycle.cl) {
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if (vifXRegs.cycle.wl <= vifXRegs.cycle.cl) {
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if (!idx) vif0.tag.size = ((vifNum * VIFfuncTable[ vif0.cmd & 0xf ].gsize) + 3) >> 2;
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else vif1.tag.size = ((vifNum * VIFfuncTable[ vif1.cmd & 0xf ].gsize) + 3) >> 2;
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}
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else {
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int n = vifXRegs->cycle.cl * (vifNum / vifXRegs->cycle.wl) +
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_limit(vifNum % vifXRegs->cycle.wl, vifXRegs->cycle.cl);
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int n = vifXRegs.cycle.cl * (vifNum / vifXRegs.cycle.wl) +
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_limit(vifNum % vifXRegs.cycle.wl, vifXRegs.cycle.cl);
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if (!idx) vif0.tag.size = ((n * VIFfuncTable[ vif0.cmd & 0xf ].gsize) + 3) >> 2;
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else vif1.tag.size = ((n * VIFfuncTable[ vif1.cmd & 0xf ].gsize) + 3) >> 2;
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}
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u32 addr = vifXRegs->code;
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u32 addr = vifXRegs.code;
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if (idx && ((addr>>15)&1)) addr += vif1Regs.tops;
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vifX.tag.addr = (addr<<4) & (idx ? 0x3ff0 : 0xff0);
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@ -337,7 +337,7 @@ _vifT void vifUnpackSetup(const u32 *data) {
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vifX.cl = 0;
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vifX.tag.cmd = vifX.cmd;
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vifXRegs->offset = 0;
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vifXRegs.offset = 0;
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}
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template void vifUnpackSetup<0>(const u32 *data);
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@ -76,10 +76,10 @@ void resetNewVif(int idx)
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// changed for some reason.
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nVif[idx].idx = idx;
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nVif[idx].VU = idx ? &VU1 : &VU0;
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nVif[idx].VU = idx ? &VU1 : &VU0;
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nVif[idx].vuMemLimit = idx ? 0x3ff0 : 0xff0;
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nVif[idx].vif = &GetVifX;
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nVif[idx].vifRegs = vifXRegs;
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nVif[idx].vifRegs = &vifXRegs;
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nVif[idx].bSize = 0;
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memzero(nVif[idx].buffer);
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