Changed a few more -> to . for consistency.

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3707 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
Jake.Stine 2010-08-31 13:06:53 +00:00
parent fe347c2c04
commit 1edb900405
7 changed files with 48 additions and 49 deletions

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@ -283,8 +283,8 @@ _vifT __fi bool vifWrite32(u32 mem, u32 value) {
switch (mem) {
case caseVif(MARK):
VIF_LOG("VIF%d_MARK write32 0x%8.8x", idx, value);
vifXRegs->stat.MRK = false;
//vifXRegs->mark = value;
vifXRegs.stat.MRK = false;
//vifXRegs.mark = value;
break;
case caseVif(FBRST):
@ -311,7 +311,7 @@ _vifT __fi bool vifWrite32(u32 mem, u32 value) {
// of a standard psHu32(mem) = value; writeback. Handled by caller for us, thanks! --air
//if (!idx) g_vifmask.Row0[ (mem>>4)&3 ] = value;
//else g_vifmask.Row1[ (mem>>4)&3 ] = value;
//((u32*)&vifXRegs->r0) [((mem>>4)&3)*4] = value;
//((u32*)&vifXRegs.r0) [((mem>>4)&3)*4] = value;
break;
case caseVif(COL0):
@ -322,7 +322,7 @@ _vifT __fi bool vifWrite32(u32 mem, u32 value) {
// of a standard psHu32(mem) = value; writeback. Handled by caller for us, thanks! --air
//if (!idx) g_vifmask.Col0[ (mem>>4)&3 ] = value;
//else g_vifmask.Col1[ (mem>>4)&3 ] = value;
//((u32*)&vifXRegs->c0) [((mem>>4)&3)*4] = value;
//((u32*)&vifXRegs.c0) [((mem>>4)&3)*4] = value;
break;
}

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@ -221,7 +221,7 @@ static VIFregisters& vif1Regs = (VIFregisters&)eeHw[0x3C00];
#define _vifT template <int idx>
#define GetVifX (idx ? (vif1) : (vif0))
#define vifXch (idx ? (vif1ch) : (vif0ch))
#define vifXRegs (idx ? (&vif1Regs): (&vif0Regs))
#define vifXRegs (idx ? (vif1Regs) : (vif0Regs))
extern void dmaVIF0();
extern void dmaVIF1();

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@ -183,7 +183,6 @@ bool _VIF1chain()
__fi void vif1SetupTransfer()
{
tDMA_TAG *ptag;
DMACh& vif1c = (DMACh&)eeHw[0x9000];
switch (vif1.dmamode)
{
@ -195,20 +194,20 @@ __fi void vif1SetupTransfer()
break;
case VIF_CHAIN_MODE:
ptag = dmaGetAddr(vif1c.tadr, false); //Set memory pointer to TADR
ptag = dmaGetAddr(vif1ch.tadr, false); //Set memory pointer to TADR
if (!(vif1c.transfer("Vif1 Tag", ptag))) return;
if (!(vif1ch.transfer("Vif1 Tag", ptag))) return;
vif1c.madr = ptag[1]._u32; //MADR = ADDR field + SPR
vif1ch.madr = ptag[1]._u32; //MADR = ADDR field + SPR
g_vifCycles += 1; // Add 1 g_vifCycles from the QW read for the tag
VIF_LOG("VIF1 Tag %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx",
ptag[1]._u32, ptag[0]._u32, vif1c.qwc, ptag->ID, vif1c.madr, vif1c.tadr);
ptag[1]._u32, ptag[0]._u32, vif1ch.qwc, ptag->ID, vif1ch.madr, vif1ch.tadr);
if (!vif1.done && ((dmacRegs.ctrl.STD == STD_VIF1) && (ptag->ID == TAG_REFS))) // STD == VIF1
{
// there are still bugs, need to also check if gif->madr +16*qwc >= stadr, if not, stall
if ((vif1c.madr + vif1c.qwc * 16) >= dmacRegs.stadr.ADDR)
if ((vif1ch.madr + vif1ch.qwc * 16) >= dmacRegs.stadr.ADDR)
{
// stalled
hwDmacIrq(DMAC_STALL_SIS);
@ -219,7 +218,7 @@ __fi void vif1SetupTransfer()
vif1.inprogress &= ~1;
if (vif1c.chcr.TTE)
if (vif1ch.chcr.TTE)
{
// Transfer dma tag if tte is set
@ -243,10 +242,10 @@ __fi void vif1SetupTransfer()
vif1.done |= hwDmacSrcChainWithStack(vif1ch, ptag->ID);
if(vif1c.qwc > 0) vif1.inprogress |= 1;
if(vif1ch.qwc > 0) vif1.inprogress |= 1;
//Check TIE bit of CHCR and IRQ bit of tag
if (vif1c.chcr.TIE && ptag->IRQ)
if (vif1ch.chcr.TIE && ptag->IRQ)
{
VIF_LOG("dmaIrq Set");

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@ -285,7 +285,7 @@ vifOp(vifCode_FlushE) {
}
vifOp(vifCode_ITop) {
pass1 { vifXRegs->itops = vifXRegs->code & 0x3ff; GetVifX.cmd = 0; }
pass1 { vifXRegs.itops = vifXRegs.code & 0x3ff; GetVifX.cmd = 0; }
pass3 { VifCodeLog("ITop"); }
return 0;
}
@ -293,8 +293,8 @@ vifOp(vifCode_ITop) {
vifOp(vifCode_Mark) {
vifStruct& vifX = GetVifX;
pass1 {
vifXRegs->mark = (u16)vifXRegs->code;
vifXRegs->stat.MRK = true;
vifXRegs.mark = (u16)vifXRegs.code;
vifXRegs.stat.MRK = true;
vifX.cmd = 0;
}
pass3 { VifCodeLog("Mark"); }
@ -317,8 +317,8 @@ static __fi void _vifCode_MPG(int idx, u32 addr, const u32 *data, int size) {
vifOp(vifCode_MPG) {
vifStruct& vifX = GetVifX;
pass1 {
int vifNum = (u8)(vifXRegs->code >> 16);
vifX.tag.addr = (u16)(vifXRegs->code << 3) & (idx ? 0x3fff : 0xfff);
int vifNum = (u8)(vifXRegs.code >> 16);
vifX.tag.addr = (u16)(vifXRegs.code << 3) & (idx ? 0x3fff : 0xfff);
vifX.tag.size = vifNum ? (vifNum*2) : 512;
//vifFlush(idx);
return 1;
@ -350,14 +350,14 @@ vifOp(vifCode_MPG) {
vifOp(vifCode_MSCAL) {
vifStruct& vifX = GetVifX;
pass1 { vifFlush(idx); vuExecMicro(idx, (u16)(vifXRegs->code) << 3); vifX.cmd = 0;}
pass1 { vifFlush(idx); vuExecMicro(idx, (u16)(vifXRegs.code) << 3); vifX.cmd = 0;}
pass3 { VifCodeLog("MSCAL"); }
return 0;
}
vifOp(vifCode_MSCALF) {
vifStruct& vifX = GetVifX;
pass1 { vifFlush(idx); vuExecMicro(idx, (u16)(vifXRegs->code) << 3); vifX.cmd = 0; }
pass1 { vifFlush(idx); vuExecMicro(idx, (u16)(vifXRegs.code) << 3); vifX.cmd = 0; }
pass3 { VifCodeLog("MSCALF"); }
return 0;
}
@ -398,9 +398,9 @@ vifOp(vifCode_Null) {
vifStruct& vifX = GetVifX;
pass1 {
// if ME1, then force the vif to interrupt
if (!(vifXRegs->err.ME1)) { // Ignore vifcode and tag mismatch error
if (!(vifXRegs.err.ME1)) { // Ignore vifcode and tag mismatch error
Console.WriteLn("Vif%d: Unknown VifCmd! [%x]", idx, vifX.cmd);
vifXRegs->stat.ER1 = true;
vifXRegs.stat.ER1 = true;
vifX.vifstalled = true;
//vifX.irq++;
}
@ -463,7 +463,7 @@ vifOp(vifCode_STCol) {
}
pass2 {
u32* cols = idx ? g_vifmask.Col1 : g_vifmask.Col0;
u32* pmem1 = &vifXRegs->c0 + (vifX.tag.addr << 2);
u32* pmem1 = &vifXRegs.c0 + (vifX.tag.addr << 2);
u32* pmem2 = cols + vifX.tag.addr;
return _vifCode_STColRow<idx>(data, pmem1, pmem2);
}
@ -481,7 +481,7 @@ vifOp(vifCode_STRow) {
}
pass2 {
u32* rows = idx ? g_vifmask.Row1 : g_vifmask.Row0;
u32* pmem1 = &vifXRegs->r0 + (vifX.tag.addr << 2);
u32* pmem1 = &vifXRegs.r0 + (vifX.tag.addr << 2);
u32* pmem2 = rows + vifX.tag.addr;
return _vifCode_STColRow<idx>(data, pmem1, pmem2);
}
@ -492,8 +492,8 @@ vifOp(vifCode_STRow) {
vifOp(vifCode_STCycl) {
vifStruct& vifX = GetVifX;
pass1 {
vifXRegs->cycle.cl = (u8)(vifXRegs->code);
vifXRegs->cycle.wl = (u8)(vifXRegs->code >> 8);
vifXRegs.cycle.cl = (u8)(vifXRegs.code);
vifXRegs.cycle.wl = (u8)(vifXRegs.code >> 8);
vifX.cmd = 0;
}
pass3 { VifCodeLog("STCycl"); }
@ -503,13 +503,13 @@ vifOp(vifCode_STCycl) {
vifOp(vifCode_STMask) {
vifStruct& vifX = GetVifX;
pass1 { vifX.tag.size = 1; }
pass2 { vifXRegs->mask = data[0]; vifX.tag.size = 0; vifX.cmd = 0; }
pass2 { vifXRegs.mask = data[0]; vifX.tag.size = 0; vifX.cmd = 0; }
pass3 { VifCodeLog("STMask"); }
return 1;
}
vifOp(vifCode_STMod) {
pass1 { vifXRegs->mode = vifXRegs->code & 0x3; GetVifX.cmd = 0; }
pass1 { vifXRegs.mode = vifXRegs.code & 0x3; GetVifX.cmd = 0; }
pass3 { VifCodeLog("STMod"); }
return 0;
}

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@ -24,7 +24,7 @@
// Doesn't stall if the next vifCode is the Mark command
_vifT bool runMark(u32* &data) {
if (((vifXRegs->code >> 24) & 0x7f) == 0x7) {
if (((vifXRegs.code >> 24) & 0x7f) == 0x7) {
Console.WriteLn("Vif%d: Running Mark with I-bit", idx);
return 1; // No Stall?
}
@ -34,7 +34,7 @@ _vifT bool runMark(u32* &data) {
// Returns 1 if i-bit && finished vifcode && i-bit not masked
_vifT bool analyzeIbit(u32* &data, int iBit) {
vifStruct& vifX = GetVifX;
if (iBit && !vifX.cmd && !vifXRegs->err.MII) {
if (iBit && !vifX.cmd && !vifXRegs.err.MII) {
//DevCon.WriteLn("Vif I-Bit IRQ");
vifX.irq++;
@ -75,14 +75,14 @@ _vifT void vifTransferLoop(u32* &data) {
u32& pSize = vifX.vifpacketsize;
int iBit = vifX.cmd >> 7;
vifXRegs->stat.VPS |= VPS_TRANSFERRING;
vifXRegs->stat.ER1 = false;
vifXRegs.stat.VPS |= VPS_TRANSFERRING;
vifXRegs.stat.ER1 = false;
while (pSize > 0 && !vifX.vifstalled) {
if(!vifX.cmd) { // Get new VifCode
vifX.lastcmd = (vifXRegs->code >> 24) & 0x7f;
vifXRegs->code = data[0];
vifX.lastcmd = (vifXRegs.code >> 24) & 0x7f;
vifXRegs.code = data[0];
vifX.cmd = data[0] >> 24;
iBit = data[0] >> 31;
@ -142,10 +142,10 @@ _vifT static __fi bool vifTransfer(u32 *data, int size) {
if (vifX.irq && vifX.cmd == 0) {
//DevCon.WriteLn("Vif IRQ!");
if(((vifXRegs->code >> 24) & 0x7f) != 0x7)
if(((vifXRegs.code >> 24) & 0x7f) != 0x7)
{
vifX.vifstalled = true;
vifXRegs->stat.VIS = true; // Note: commenting this out fixes WALL-E?
vifXRegs.stat.VIS = true; // Note: commenting this out fixes WALL-E?
}
if (!vifXch.qwc && !vifX.irqoffset) vifX.inprogress &= ~1;

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@ -302,8 +302,8 @@ _vifT void vifUnpackSetup(const u32 *data) {
vifStruct& vifX = GetVifX;
if ((vifXRegs->cycle.wl == 0) && (vifXRegs->cycle.wl < vifXRegs->cycle.cl)) {
Console.WriteLn("Vif%d CL %d, WL %d", idx, vifXRegs->cycle.cl, vifXRegs->cycle.wl);
if ((vifXRegs.cycle.wl == 0) && (vifXRegs.cycle.wl < vifXRegs.cycle.cl)) {
Console.WriteLn("Vif%d CL %d, WL %d", idx, vifXRegs.cycle.cl, vifXRegs.cycle.wl);
vifX.cmd = 0;
return; // Skipping write and 0 write-cycles, so do nothing!
}
@ -311,25 +311,25 @@ _vifT void vifUnpackSetup(const u32 *data) {
//if (!idx) vif0FLUSH(); // Only VU0?
vifX.usn = (vifXRegs->code >> 14) & 0x01;
int vifNum = (vifXRegs->code >> 16) & 0xff;
vifX.usn = (vifXRegs.code >> 14) & 0x01;
int vifNum = (vifXRegs.code >> 16) & 0xff;
if (vifNum == 0) vifNum = 256;
vifXRegs->num = vifNum;
vifXRegs.num = vifNum;
if (vifXRegs->cycle.wl <= vifXRegs->cycle.cl) {
if (vifXRegs.cycle.wl <= vifXRegs.cycle.cl) {
if (!idx) vif0.tag.size = ((vifNum * VIFfuncTable[ vif0.cmd & 0xf ].gsize) + 3) >> 2;
else vif1.tag.size = ((vifNum * VIFfuncTable[ vif1.cmd & 0xf ].gsize) + 3) >> 2;
}
else {
int n = vifXRegs->cycle.cl * (vifNum / vifXRegs->cycle.wl) +
_limit(vifNum % vifXRegs->cycle.wl, vifXRegs->cycle.cl);
int n = vifXRegs.cycle.cl * (vifNum / vifXRegs.cycle.wl) +
_limit(vifNum % vifXRegs.cycle.wl, vifXRegs.cycle.cl);
if (!idx) vif0.tag.size = ((n * VIFfuncTable[ vif0.cmd & 0xf ].gsize) + 3) >> 2;
else vif1.tag.size = ((n * VIFfuncTable[ vif1.cmd & 0xf ].gsize) + 3) >> 2;
}
u32 addr = vifXRegs->code;
u32 addr = vifXRegs.code;
if (idx && ((addr>>15)&1)) addr += vif1Regs.tops;
vifX.tag.addr = (addr<<4) & (idx ? 0x3ff0 : 0xff0);
@ -337,7 +337,7 @@ _vifT void vifUnpackSetup(const u32 *data) {
vifX.cl = 0;
vifX.tag.cmd = vifX.cmd;
vifXRegs->offset = 0;
vifXRegs.offset = 0;
}
template void vifUnpackSetup<0>(const u32 *data);

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@ -76,10 +76,10 @@ void resetNewVif(int idx)
// changed for some reason.
nVif[idx].idx = idx;
nVif[idx].VU = idx ? &VU1 : &VU0;
nVif[idx].VU = idx ? &VU1 : &VU0;
nVif[idx].vuMemLimit = idx ? 0x3ff0 : 0xff0;
nVif[idx].vif = &GetVifX;
nVif[idx].vifRegs = vifXRegs;
nVif[idx].vifRegs = &vifXRegs;
nVif[idx].bSize = 0;
memzero(nVif[idx].buffer);