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pcsx2
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It's log, it's log, it's big, it's heavy, it's wood... 

git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@322 a6443dda-0b58-4228-96e9-037be469359c
This commit is contained in:
arcum42 2008-11-13 16:42:12 +00:00 committed by Gregory Hainaut
parent 3ff019fde3
commit 1c8d922eac
37 changed files with 216 additions and 902 deletions
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135
pcsx2/CDVD.c
View File

@ -806,9 +806,8 @@ void mechaDecryptBytes(unsigned char* buffer, int size)
int cdvdReadSector() {
s32 bcr;
#ifdef CDR_LOG
CDR_LOG("SECTOR %d (BCR %x;%x)\n", cdvd.Sector, HW_DMA3_BCR_H16, HW_DMA3_BCR_L16);
#endif
bcr = (HW_DMA3_BCR_H16 * HW_DMA3_BCR_L16) *4;
if (bcr < cdvd.BlockSize) {
//SysPrintf("*PCSX2*: cdvdReadSector: bcr < cdvd.BlockSize; %x < %x\n", bcr, cdvd.BlockSize);
@ -975,110 +974,93 @@ void cdvdVsync() {
u8 cdvdRead04(void) { // NCOMMAND
#ifdef CDR_LOG
CDR_LOG("cdvdRead04(NCMD) %x\n", cdvd.nCommand);
#endif
return cdvd.nCommand;
}
u8 cdvdRead05(void) { // N-READY
#ifdef CDR_LOG
CDR_LOG("cdvdRead05(NReady) %x\n", cdvd.Ready);
#endif
return cdvd.Ready;
}
u8 cdvdRead06(void) { // ERROR
#ifdef CDR_LOG
CDR_LOG("cdvdRead06(Error) %x\n", cdvd.Error);
#endif
return cdvd.Error;
}
u8 cdvdRead07(void) { // BREAK
#ifdef CDR_LOG
CDR_LOG("cdvdRead07(Break) %x\n", 0);
#endif
return 0;
}
u8 cdvdRead08(void) { // INTR_STAT
#ifdef CDR_LOG
CDR_LOG("cdvdRead08(IntrReason) %x\n", cdvd.PwOff);
#endif
return cdvd.PwOff;
}
u8 cdvdRead0A(void) { // STATUS
#ifdef CDR_LOG
CDR_LOG("cdvdRead0A(Status) %x\n", cdvd.Status);
#endif
return cdvd.Status;
}
u8 cdvdRead0B(void) { // TRAY-STATE (if tray has been opened)
u8 tray = cdvdGetTrayStatus();
#ifdef CDR_LOG
CDR_LOG("cdvdRead0B(Tray) %x\n", tray);
#endif
return tray;
}
u8 cdvdRead0C(void) { // CRT MINUTE
#ifdef CDR_LOG
CDR_LOG("cdvdRead0C(Min) %x\n", itob((u8)(cdvd.Sector/(60*75))));
#endif
return itob((u8)(cdvd.Sector/(60*75)));
}
u8 cdvdRead0D(void) { // CRT SECOND
#ifdef CDR_LOG
CDR_LOG("cdvdRead0D(Sec) %x\n", itob((u8)((cdvd.Sector/75)%60)+2));
#endif
return itob((u8)((cdvd.Sector/75)%60)+2);
}
u8 cdvdRead0E(void) { // CRT FRAME
#ifdef CDR_LOG
CDR_LOG("cdvdRead0E(Frame) %x\n", itob((u8)(cdvd.Sector%75)));
#endif
return itob((u8)(cdvd.Sector%75));
}
u8 cdvdRead0F(void) { // TYPE
u8 type = cdvdGetDiskType();
#ifdef CDR_LOG
CDR_LOG("cdvdRead0F(Disc Type) %x\n", type);
#endif
return type;
}
u8 cdvdRead13(void) { // UNKNOWN
#ifdef CDR_LOG
CDR_LOG("cdvdRead13(Unknown) %x\n", 4);
#endif
return 4;
}
u8 cdvdRead15(void) { // RSV
#ifdef CDR_LOG
CDR_LOG("cdvdRead15(RSV)\n");
#endif
return 0x01; // | 0x80 for ATAPI mode
}
u8 cdvdRead16(void) { // SCOMMAND
#ifdef CDR_LOG
CDR_LOG("cdvdRead16(SCMD) %x\n", cdvd.sCommand);
#endif
return cdvd.sCommand;
}
u8 cdvdRead17(void) { // SREADY
#ifdef CDR_LOG
CDR_LOG("cdvdRead17(SReady) %x\n", cdvd.sDataIn);
#endif
return cdvd.sDataIn;
}
@ -1092,137 +1074,115 @@ u8 cdvdRead18(void) { // SDATAOUT
ret = cdvd.Result[cdvd.ResultP-1];
}
}
#ifdef CDR_LOG
CDR_LOG("cdvdRead18(SDataOut) %x (ResultC=%d, ResultP=%d)\n", ret, cdvd.ResultC, cdvd.ResultP);
#endif
return ret;
}
u8 cdvdRead20(void) {
#ifdef CDR_LOG
CDR_LOG("cdvdRead20(Key0) %x\n", cdvd.Key[0]);
#endif
return cdvd.Key[0];
}
u8 cdvdRead21(void) {
#ifdef CDR_LOG
CDR_LOG("cdvdRead21(Key1) %x\n", cdvd.Key[1]);
#endif
return cdvd.Key[1];
}
u8 cdvdRead22(void) {
#ifdef CDR_LOG
CDR_LOG("cdvdRead22(Key2) %x\n", cdvd.Key[2]);
#endif
return cdvd.Key[2];
}
u8 cdvdRead23(void) {
#ifdef CDR_LOG
CDR_LOG("cdvdRead23(Key3) %x\n", cdvd.Key[3]);
#endif
return cdvd.Key[3];
}
u8 cdvdRead24(void) {
#ifdef CDR_LOG
CDR_LOG("cdvdRead24(Key4) %x\n", cdvd.Key[4]);
#endif
return cdvd.Key[4];
}
u8 cdvdRead28(void) {
#ifdef CDR_LOG
CDR_LOG("cdvdRead28(Key5) %x\n", cdvd.Key[5]);
#endif
return cdvd.Key[5];
}
u8 cdvdRead29(void) {
#ifdef CDR_LOG
CDR_LOG("cdvdRead29(Key6) %x\n", cdvd.Key[6]);
#endif
return cdvd.Key[6];
}
u8 cdvdRead2A(void) {
#ifdef CDR_LOG
CDR_LOG("cdvdRead2A(Key7) %x\n", cdvd.Key[7]);
#endif
return cdvd.Key[7];
}
u8 cdvdRead2B(void) {
#ifdef CDR_LOG
CDR_LOG("cdvdRead2B(Key8) %x\n", cdvd.Key[8]);
#endif
return cdvd.Key[8];
}
u8 cdvdRead2C(void) {
#ifdef CDR_LOG
CDR_LOG("cdvdRead2C(Key9) %x\n", cdvd.Key[9]);
#endif
return cdvd.Key[9];
}
u8 cdvdRead30(void) {
#ifdef CDR_LOG
CDR_LOG("cdvdRead30(Key10) %x\n", cdvd.Key[10]);
#endif
return cdvd.Key[10];
}
u8 cdvdRead31(void) {
#ifdef CDR_LOG
CDR_LOG("cdvdRead31(Key11) %x\n", cdvd.Key[11]);
#endif
return cdvd.Key[11];
}
u8 cdvdRead32(void) {
#ifdef CDR_LOG
CDR_LOG("cdvdRead32(Key12) %x\n", cdvd.Key[12]);
#endif
return cdvd.Key[12];
}
u8 cdvdRead33(void) {
#ifdef CDR_LOG
CDR_LOG("cdvdRead33(Key13) %x\n", cdvd.Key[13]);
#endif
return cdvd.Key[13];
}
u8 cdvdRead34(void) {
#ifdef CDR_LOG
CDR_LOG("cdvdRead34(Key14) %x\n", cdvd.Key[14]);
#endif
return cdvd.Key[14];
}
u8 cdvdRead38(void) { // valid parts of key data (first and last are valid)
#ifdef CDR_LOG
CDR_LOG("cdvdRead38(KeysValid) %x\n", cdvd.Key[15]);
#endif
return cdvd.Key[15];
}
u8 cdvdRead39(void) { // KEY-XOR
#ifdef CDR_LOG
CDR_LOG("cdvdRead39(KeyXor) %x\n", cdvd.KeyXor);
#endif
return cdvd.KeyXor;
}
u8 cdvdRead3A(void) { // DEC_SET
#ifdef CDR_LOG
CDR_LOG("cdvdRead3A(DecSet) %x\n", cdvd.decSet);
#endif
SysPrintf("DecSet Read: %02X\n", cdvd.decSet);
return cdvd.decSet;
}
@ -1230,10 +1190,8 @@ u8 cdvdRead3A(void) { // DEC_SET
void cdvdWrite04(u8 rt) { // NCOMMAND
#ifdef CDR_LOG
CDR_LOG("cdvdWrite04: NCMD %s (%x) (ParamP = %x)\n", nCmdName[rt], rt, cdvd.ParamP);
#endif
cdvd.nCommand = rt;
cdvd.Status = CDVD_STATUS_NONE;
switch (rt) {
@ -1285,9 +1243,7 @@ void cdvdWrite04(u8 rt) { // NCOMMAND
else cdvdReadTimeRcnt(0);*/
cdvdReadTimeRcnt(1);
#ifdef CDR_LOG
CDR_LOG( "CdRead: %d, nSectors=%d, RetryCnt=%x, Speed=%x(%x), ReadMode=%x(%x) (1074=%x)\n", cdvd.Sector, cdvd.nSectors, cdvd.RetryCnt, cdvd.Speed, cdvd.Param[9], cdvd.ReadMode, cdvd.Param[10], psxHu32(0x1074));
#endif
//SysPrintf("CdRead: Reading Sector %d(%d Blocks of Size %d) at Speed=%dx\n", cdvd.Sector, cdvd.nSectors,cdvd.BlockSize,cdvd.Speed);
cdvd.Readed = 0;
@ -1332,9 +1288,9 @@ void cdvdWrite04(u8 rt) { // NCOMMAND
cdvd.Speed = CHECK_SLOWDVD ? 1 : 4; //Some games need to read slower
cdvd.ReadMode = CDVD_MODE_2048; cdvd.BlockSize = 2064; // Why oh why was it 2064
cdvdReadTimeRcnt(0);
#ifdef CDR_LOG
CDR_LOG( "DvdRead: %d, nSectors=%d, RetryCnt=%x, Speed=%x(%x), ReadMode=%x(%x) (1074=%x)\n", cdvd.Sector, cdvd.nSectors, cdvd.RetryCnt, cdvd.Speed, cdvd.Param[9], cdvd.ReadMode, cdvd.Param[10], psxHu32(0x1074));
#endif
//SysPrintf("DvdRead: Reading Sector %d(%d Blocks of Size %d) at Speed=%dx\n", cdvd.Sector, cdvd.nSectors,cdvd.BlockSize,cdvd.Speed);
cdvd.Readed = 0;
cdvd.PwOff = 2;//cmdcmplt
@ -1389,9 +1345,8 @@ void cdvdWrite04(u8 rt) { // NCOMMAND
}
void cdvdWrite05(u8 rt) { // NDATAIN
#ifdef CDR_LOG
CDR_LOG("cdvdWrite05(NDataIn) %x\n", rt);
#endif
if (cdvd.ParamP < 32) {
cdvd.Param[cdvd.ParamP++] = rt;
cdvd.ParamC++;
@ -1399,16 +1354,12 @@ void cdvdWrite05(u8 rt) { // NDATAIN
}
void cdvdWrite06(u8 rt) { // HOWTO
#ifdef CDR_LOG
CDR_LOG("cdvdWrite06(HowTo) %x\n", rt);
#endif
cdvd.HowTo = rt;
}
void cdvdWrite07(u8 rt) { // BREAK
#ifdef CDR_LOG
CDR_LOG("cdvdWrite07(Break) %x\n", rt);
#endif
SysPrintf("*PCSX2*: CDVD BREAK %x\n" , rt);
}
@ -1432,15 +1383,11 @@ void cdvdWrite08(u8 rt) { // INTR_STAT
}
void cdvdWrite0A(u8 rt) { // STATUS
#ifdef CDR_LOG
CDR_LOG("cdvdWrite0A(Status) %x\n", rt);
#endif
}
void cdvdWrite0F(u8 rt) { // TYPE
#ifdef CDR_LOG
CDR_LOG("cdvdWrite0F(Type) %x\n", rt);
#endif
SysPrintf("*PCSX2*: CDVD TYPE %x\n", rt);
}
@ -1470,9 +1417,8 @@ void cdvdWrite16(u8 rt) { // SCOMMAND
int address;
u8 tmp;
#ifdef CDR_LOG
CDR_LOG("cdvdWrite16: SCMD %s (%x) (ParamP = %x)\n", sCmdName[rt], rt, cdvd.ParamP);
#endif
cdvd.sCommand = rt;
switch (rt) {
@ -2031,9 +1977,8 @@ fail_pol_cal:
}
void cdvdWrite17(u8 rt) { // SDATAIN
#ifdef CDR_LOG
CDR_LOG("cdvdWrite17(SDataIn) %x\n", rt);
#endif
if (cdvd.ParamP < 32) {
cdvd.Param[cdvd.ParamP++] = rt;
cdvd.ParamC++;
@ -2041,16 +1986,12 @@ void cdvdWrite17(u8 rt) { // SDATAIN
}
void cdvdWrite18(u8 rt) { // SDATAOUT
#ifdef CDR_LOG
CDR_LOG("cdvdWrite18(SDataOut) %x\n", rt);
#endif
SysPrintf("*PCSX2* SDATAOUT\n");
}
void cdvdWrite3A(u8 rt) { // DEC-SET
#ifdef CDR_LOG
CDR_LOG("cdvdWrite3A(DecSet) %x\n", rt);
#endif
cdvd.decSet = rt;
SysPrintf("DecSet Write: %02X\n", cdvd.decSet);
}

30
pcsx2/CDVDiso.c
View File

@ -303,17 +303,13 @@ int CDVD_findfile(char* fname, struct TocEntry* tocEntry){
// Find the TOC for a specific directory
if (CDVD_GetVolumeDescriptor() != TRUE){
#ifdef RPC_LOG
RPC_LOG("Could not get CD Volume Descriptor\n");
#endif
return -1;
}
// Read the TOC of the root directory
if (CdRead(CDVolDesc.rootToc.tocLBA,1,toc,&cdReadMode) != TRUE){
#ifdef RPC_LOG
RPC_LOG("Couldn't Read from CD !\n");
#endif
return -1;
}
//CdSync(0x00);
@ -434,9 +430,7 @@ int CDVD_findfile(char* fname, struct TocEntry* tocEntry){
tocEntryPointer = (struct dirTocEntry*)((char*)tocEntryPointer + tocEntryPointer->length);
}
#ifdef DEBUG
SysPrintf("CDVD_findfile: found dir, now looking for file\n");
#endif
tocEntryPointer = (struct dirTocEntry*)toc;
@ -520,21 +514,15 @@ int CDVD_GetDir_RPC_request(char* pathname, char* extensions, unsigned int inc_d
// Find the TOC for a specific directory
if (CDVD_GetVolumeDescriptor() != TRUE){
#ifdef RPC_LOG
RPC_LOG("[RPC:cdvd] Could not get CD Volume Descriptor\n");
#endif
return -1;
}
#ifdef RPC_LOG
RPC_LOG("[RPC:cdvd] Getting Directory Listing for: \"%s\"\n", pathname);
#endif
// Read the TOC of the root directory
if (CdRead(CDVolDesc.rootToc.tocLBA,1,toc,&cdReadMode) != TRUE){
#ifdef RPC_LOG
RPC_LOG("[RPC: ] Couldn't Read from CD !\n");
#endif
RPC_LOG("[RPC: ] Couldn't Read from CD !\n");
return -1;
}
//CdSync(0x00);
@ -575,9 +563,8 @@ int CDVD_GetDir_RPC_request(char* pathname, char* extensions, unsigned int inc_d
current_sector++;
if (CdRead(current_sector,1,toc,&cdReadMode) != TRUE){
#ifdef RPC_LOG
RPC_LOG("[RPC: ] Couldn't Read from CD !\n");
#endif
return -1;
}
//CdSync(0x00);
@ -598,10 +585,9 @@ int CDVD_GetDir_RPC_request(char* pathname, char* extensions, unsigned int inc_d
if (strcmp(dirname,localTocEntry.filename) == 0){
// if the name matches then we've found the directory
found_dir = TRUE;
#ifdef RPC_LOG
RPC_LOG("[RPC: ] Found directory %s in subdir at sector %d\n",dirname,current_sector);
RPC_LOG("[RPC: ] LBA of found subdirectory = %d\n",localTocEntry.fileLBA);
#endif
break;
}
}
@ -619,9 +605,7 @@ int CDVD_GetDir_RPC_request(char* pathname, char* extensions, unsigned int inc_d
// Read the TOC of the found subdirectory
if (CdRead(localTocEntry.fileLBA,1,toc,&cdReadMode) != TRUE){
#ifdef RPC_LOG
RPC_LOG("[RPC: ] Couldn't Read from CD !\n");
#endif
return -1;
}
//CdSync(0x00);
@ -673,9 +657,7 @@ int CDVD_GetDir_RPC_request(char* pathname, char* extensions, unsigned int inc_d
getDirTocData.current_sector++;
if (CdRead(getDirTocData.current_sector,1,toc,&cdReadMode) != TRUE){
#ifdef RPC_LOG
RPC_LOG("[RPC: ] Couldn't Read from CD !\n");
#endif
RPC_LOG("[RPC: ] Couldn't Read from CD !\n");
return -1;
}
//CdSync(0x00);
@ -740,9 +722,7 @@ int CDVD_GetDir_RPC_get_entries(struct TocEntry tocEntry[], int req_entries){
struct dirTocEntry* tocEntryPointer;
if (CdRead(getDirTocData.current_sector,1,toc,&cdReadMode) != TRUE){
#ifdef RPC_LOG
RPC_LOG("[RPC:cdvd] Couldn't Read from CD !\n");
#endif
return -1;
}
//CdSync(0x00);
@ -774,9 +754,7 @@ int CDVD_GetDir_RPC_get_entries(struct TocEntry tocEntry[], int req_entries){
getDirTocData.current_sector++;
if (CdRead(getDirTocData.current_sector,1,toc,&cdReadMode) != TRUE){
#ifdef RPC_LOG
RPC_LOG("[RPC:cdvd] Couldn't Read from CD !\n");
#endif
return -1;
}
//CdSync(0x00);

36
pcsx2/CDVDisodrv.c
View File

@ -52,11 +52,9 @@ void CDVDFS_init(){
if (inited) return;//might change in the future as a param; forceInit/Reset
#ifdef RPC_LOG
RPC_LOG("[CDVDisodrv:init] CDVD Filesystem v1.00\n");
RPC_LOG("[CDVDisodrv ] \tby A.Lee (aka Hiryu) & Nicholas Van Veen (aka Sjeep)\n");
RPC_LOG("[CDVDisodrv ] Initializing '%s' file driver.\n", "cdfs");
#endif
//CdInit(0); already called by plugin loading system ;)
@ -94,18 +92,13 @@ int CDVDFS_open(char *name, int mode){
fd_used[j] = 1;
files_open++;
#ifdef RPC_LOG
RPC_LOG("[CDVDisodrv:open] internal fd=%d\n", j);
#endif
fd_table[j].fileSize = tocEntry.fileSize;
fd_table[j].LBA = tocEntry.fileLBA;
fd_table[j].filePos = 0;
#ifdef RPC_LOG
RPC_LOG("[CDVDisodrv ] tocEntry.fileSize = %d\n",tocEntry.fileSize);
#endif
return j;
}
@ -116,9 +109,7 @@ int CDVDFS_open(char *name, int mode){
int CDVDFS_lseek(int fd, int offset, int whence){
if ((fd >= 16) || (fd_used[fd]==0)){
#ifdef RPC_LOG
RPC_LOG("[CDVDisodrv:lseek] ERROR: File does not appear to be open!\n");
#endif
return -1;
}
@ -164,9 +155,7 @@ int CDVDFS_read( int fd, char *buffer, int size ){
int ssize=0, asize, esize;
if ((fd >= 16) || (fd_used[fd]==0)){
#ifdef RPC_LOG
RPC_LOG("[CDVDisodrv:read] ERROR: File does not appear to be open!\n");
#endif
return -1;
}
@ -192,14 +181,11 @@ int CDVDFS_read( int fd, char *buffer, int size ){
esector=asector + (asize >> 11);
size += ssize;
#ifdef RPC_LOG
RPC_LOG("[CDVDisodrv:read] read sectors 0x%08X to 0x%08X\n", ssector, esector-(esize==0));
#endif
if (ssize){ if (CdRead(ssector, 1, lb, &cdReadMode) != TRUE){
#ifdef RPC_LOG
if (ssize){
if (CdRead(ssector, 1, lb, &cdReadMode) != TRUE){
RPC_LOG("[CDVDisodrv: ] Couldn't Read from file for some reason\n");
#endif
return 0;
}
FreezeMMXRegs(1);
@ -207,15 +193,12 @@ int CDVDFS_read( int fd, char *buffer, int size ){
FreezeMMXRegs(0);
}
if (asize) if (CdRead(asector, asize >> 11, buffer+ssize, &cdReadMode) != TRUE){
#ifdef RPC_LOG
RPC_LOG("[CDVDisodrv: ] Couldn't Read from file for some reason\n");
#endif
return 0;
}
if (esize){ if (CdRead(esector, 1, lb, &cdReadMode) != TRUE){
#ifdef RPC_LOG
if (esize){
if (CdRead(esector, 1, lb, &cdReadMode) != TRUE){
RPC_LOG("[CDVDisodrv: ] Couldn't Read from file for some reason\n");
#endif
return 0;
}
FreezeMMXRegs(1);
@ -228,16 +211,13 @@ int CDVDFS_read( int fd, char *buffer, int size ){
off_sector = (fd_table[fd].filePos & 0x7FF);
num_sectors = ((off_sector + size) >> 11) + 1;
#ifdef RPC_LOG
RPC_LOG("[CDVDisodrv:read] read sectors 0x%08X to 0x%08X\n",start_sector,start_sector+num_sectors);
#endif
// Read the data (we only ever get 16KB max request at once)
if (CdRead(start_sector, num_sectors, local_buffer, &cdReadMode) != TRUE){
#ifdef RPC_LOG
//RPC_LOG("sector = %d, start sector = %d\n",sector,start_sector);
RPC_LOG("[CDVDisodrv: ] Couldn't Read from file for some reason\n");
#endif
return 0;
}
//CdSync(0); hm, a wait function maybe...
@ -266,16 +246,10 @@ int CDVDFS_write( int fd, char * buffer, int size ){
int CDVDFS_close( int fd){
if ((fd >= 16) || (fd_used[fd]==0)){
#ifdef RPC_LOG
RPC_LOG("[CDVDisodrv:close] ERROR: File does not appear to be open!\n");
#endif
return -1;
}
#ifdef RPC_LOG
RPC_LOG("[CDVDisodrv:close] internal fd %d\n", fd);
#endif
fd_used[fd] = 0;
files_open--;

19
pcsx2/COP0.c
View File

@ -29,23 +29,17 @@ void COP0() {
}
void COP0_BC0() {
#ifdef COP0_LOG
COP0_LOG("%s\n", disR5900F(cpuRegs.code, cpuRegs.pc));
#endif
Int_COP0BC0PrintTable[(cpuRegs.code >> 16) & 0x03]();
}
void COP0_Func() {
#ifdef COP0_LOG
COP0_LOG("%s\n", disR5900F(cpuRegs.code, cpuRegs.pc));
#endif
Int_COP0C0PrintTable[_Funct_]();
}
void COP0_Unknown() {
#ifdef CPU_LOG
CPU_LOG("COP0 Unknown opcode called\n");
#endif
}
void UpdateCP0Status() {
@ -70,10 +64,8 @@ extern u32 s_iLastPERFCycle[2];
void MFC0() {
if (!_Rt_) return;
#ifdef COP0_LOG
if (_Rd_ != 9) { COP0_LOG("%s\n", disR5900F(cpuRegs.code, cpuRegs.pc)); }
#endif
//if(bExecBIOS == FALSE && _Rd_ == 25) SysPrintf("MFC0 _Rd_ %x = %x\n", _Rd_, cpuRegs.CP0.r[_Rd_]);
switch (_Rd_) {
@ -112,9 +104,7 @@ void MFC0() {
}
void MTC0() {
#ifdef COP0_LOG
COP0_LOG("%s\n", disR5900F(cpuRegs.code, cpuRegs.pc));
#endif
//if(bExecBIOS == FALSE && _Rd_ == 25) SysPrintf("MTC0 _Rd_ %x = %x\n", _Rd_, cpuRegs.CP0.r[_Rd_]);
switch (_Rd_) {
case 25:
@ -177,11 +167,10 @@ void BC0TL() {
}
void TLBR() {
#ifdef CPU_LOG
/* CPU_LOG("COP0_TLBR %d:%x,%x,%x,%x\n",
cpuRegs.CP0.n.Random, cpuRegs.CP0.n.PageMask, cpuRegs.CP0.n.EntryHi,
cpuRegs.CP0.n.EntryLo0, cpuRegs.CP0.n.EntryLo1);*/
#endif
int i = cpuRegs.CP0.n.Index&0x1f;
// if( !bExecBIOS )
@ -278,11 +267,9 @@ void TLBWI() {
if (j > 48) return;
#ifdef CPU_LOG
/* CPU_LOG("COP0_TLBWI %d:%x,%x,%x,%x\n",
cpuRegs.CP0.n.Index, cpuRegs.CP0.n.PageMask, cpuRegs.CP0.n.EntryHi,
cpuRegs.CP0.n.EntryLo0, cpuRegs.CP0.n.EntryLo1);*/
#endif
// if( !bExecBIOS )
// __Log("TLBWI %d\n", j);
@ -296,11 +283,9 @@ void TLBWR() {
if (j > 48) return;
#ifdef CPU_LOG
/* CPU_LOG("COP0_TLBWR %d:%x,%x,%x,%x\n",
cpuRegs.CP0.n.Random, cpuRegs.CP0.n.PageMask, cpuRegs.CP0.n.EntryHi,
cpuRegs.CP0.n.EntryLo0, cpuRegs.CP0.n.EntryLo1);*/
#endif
// if( !bExecBIOS )
// __Log("TLBWR %d\n", j);

52
pcsx2/Cache.c
View File

@ -173,9 +173,8 @@ void CACHE() {
return;
}
#ifdef CACHE_LOG
CACHE_LOG("CACHE DHIN addr %x, index %d, way %d, Flags %x\n",addr,index,way,pCache[index].tag[way] & 0x78);
#endif
CACHE_LOG("CACHE DHIN addr %x, index %d, way %d, Flags %x\n",addr,index,way,pCache[index].tag[way] & 0x78);
pCache[index].tag[way] &= ~(0x6F);
((u64*)pCache[index].data[way][0].b8._8)[0] = 0;
((u64*)pCache[index].data[way][0].b8._8)[1] = 0;
@ -210,10 +209,8 @@ void CACHE() {
return;
}
#ifdef CACHE_LOG
CACHE_LOG("CACHE DHWBIN addr %x, index %d, way %d, Flags %x\n",addr,index,way,pCache[index].tag[way] & 0x78);
#endif
CACHE_LOG("CACHE DHWBIN addr %x, index %d, way %d, Flags %x\n",addr,index,way,pCache[index].tag[way] & 0x78);
if(pCache[index].tag[way] & 0x60) // Valid Dirty
{
char * t = (char *)(taddr);//paddr[way]);
@ -262,9 +259,8 @@ void CACHE() {
{
return;
}
#ifdef CACHE_LOG
CACHE_LOG("CACHE DHWOIN addr %x, index %d, way %d, Flags %x\n",addr,index,way,pCache[index].tag[way] & 0x78);
#endif
CACHE_LOG("CACHE DHWOIN addr %x, index %d, way %d, Flags %x\n",addr,index,way,pCache[index].tag[way] & 0x78);
if(pCache[index].tag[way] & 0x60) // Valid Dirty
{
char * t = (char *)(taddr);
@ -286,9 +282,9 @@ void CACHE() {
{
int index = (addr >> 6) & 0x3F;
int way = addr & 0x1;
#ifdef CACHE_LOG
CACHE_LOG("CACHE DXIN addr %x, index %d, way %d, flag %x\n",addr,index,way,pCache[index].tag[way] & 0x78);
#endif
CACHE_LOG("CACHE DXIN addr %x, index %d, way %d, flag %x\n",addr,index,way,pCache[index].tag[way] & 0x78);
pCache[index].tag[way] &= ~(0x6F);
((u64*)pCache[index].data[way][0].b8._8)[0] = 0;
@ -307,9 +303,9 @@ void CACHE() {
int way = addr & 0x1;
u8 * out = pCache[index].data[way][(addr>>4) & 0x3].b8._8;
cpuRegs.CP0.r[28] = *(u32 *)(out+(addr&0xf));
#ifdef CACHE_LOG
CACHE_LOG("CACHE DXLDT addr %x, index %d, way %d, DATA %x\n",addr,index,way,cpuRegs.CP0.r[28]);
#endif
CACHE_LOG("CACHE DXLDT addr %x, index %d, way %d, DATA %x\n",addr,index,way,cpuRegs.CP0.r[28]);
break;
}
case 0x10:
@ -319,9 +315,9 @@ void CACHE() {
cpuRegs.CP0.r[28] = 0;
cpuRegs.CP0.r[28] = pCache[index].tag[way];
#ifdef CACHE_LOG
CACHE_LOG("CACHE DXLTG addr %x, index %d, way %d, DATA %x\n",addr,index,way,cpuRegs.CP0.r[28]);
#endif
CACHE_LOG("CACHE DXLTG addr %x, index %d, way %d, DATA %x\n",addr,index,way,cpuRegs.CP0.r[28]);
break;
}
case 0x13:
@ -330,9 +326,9 @@ void CACHE() {
int way = addr & 0x1;
//u8 * out = pCache[index].data[way][(addr>>4) & 0x3].b8._8;
*(u32*)(&pCache[index].data[way][(addr>>4) & 0x3].b8._8[(addr&0xf)]) = cpuRegs.CP0.r[28];
#ifdef CACHE_LOG
CACHE_LOG("CACHE DXSDT addr %x, index %d, way %d, DATA %x\n",addr,index,way,cpuRegs.CP0.r[28]);
#endif
CACHE_LOG("CACHE DXSDT addr %x, index %d, way %d, DATA %x\n",addr,index,way,cpuRegs.CP0.r[28]);
break;
}
case 0x12:
@ -340,9 +336,9 @@ void CACHE() {
int index = (addr >> 6) & 0x3F;
int way = addr & 0x1;
pCache[index].tag[way] = cpuRegs.CP0.r[28];
#ifdef CACHE_LOG
CACHE_LOG("CACHE DXSTG addr %x, index %d, way %d, DATA %x\n",addr,index,way,cpuRegs.CP0.r[28] & 0x6F);
#endif
CACHE_LOG("CACHE DXSTG addr %x, index %d, way %d, DATA %x\n",addr,index,way,cpuRegs.CP0.r[28] & 0x6F);
break;
}
case 0x14:
@ -352,9 +348,9 @@ void CACHE() {
int index = (addr >> 6) & 0x3F;
int way = addr & 0x1;
#ifdef CACHE_LOG
CACHE_LOG("CACHE DXWBIN addr %x, index %d, way %d, Flags %x\n",addr,index,way,pCache[index].tag[way] & 0x78);
#endif
CACHE_LOG("CACHE DXWBIN addr %x, index %d, way %d, Flags %x\n",addr,index,way,pCache[index].tag[way] & 0x78);
if(pCache[index].tag[way] & 0x60) // Dirty
{
u32 paddr = memLUTW[pCache[index].tag[way] >> 12];

6
pcsx2/DebugTools/Debug.h
View File

@ -92,6 +92,9 @@ void __Log(const char *fmt, ...);
#define PSXCNT_LOG if (varLog & 0x20000000) {logProtocol=0; logSource='I';} if (varLog & 0x20000000) __Log("%8.8lx %8.8lx: ", psxRegs.pc, psxRegs.cycle); if (varLog & 0x20000000) __Log
#define EECNT_LOG if (varLog & 0x40000000) {logProtocol=0; logSource='I';} if (varLog & 0x40000000) __Log("%8.8lx %8.8lx: ", cpuRegs.pc, cpuRegs.cycle); if (varLog & 0x40000000) __Log
// fixme - currently we don't log cache
#define CACHE_LOG 0&&
#if defined (CPU_LOG) || defined(MEM_LOG) || defined(HW_LOG) || defined(DMA_LOG) || \
defined(BIOS_LOG) || defined(ELF_LOG) || defined(FPU_LOG) || defined(MMI_LOG) || \
defined(VU0_LOG) || defined(COP0_LOG) || defined(VIF_LOG) || defined(SPR_LOG) || \
@ -139,7 +142,8 @@ void __Log(const char *fmt, ...);
#define EECNT_LOG 0&&
#define EMU_LOG 0&&
#define CACHE_LOG 0&&
#define MEMCARDS_LOG 0&&
#endif
#endif /* __DEBUG_H__ */

110
pcsx2/Elfheader.c
View File

@ -283,54 +283,39 @@ int loadHeaders( char *Exepath ) {
elfProgH = NULL;
}
#ifdef ELF_LOG
ELF_LOG( "type: " );
#endif
switch( elfHeader->e_type )
{
default:
#ifdef ELF_LOG
ELF_LOG( "unknown %x", elfHeader->e_type );
#endif
{
default:
ELF_LOG( "unknown %x", elfHeader->e_type );
break;
case 0x0:
#ifdef ELF_LOG
ELF_LOG( "no file type" );
#endif
break;
case 0x1:
#ifdef ELF_LOG
ELF_LOG( "relocatable" );
#endif
ELF_LOG( "relocatable" );
break;
case 0x2:
#ifdef ELF_LOG
ELF_LOG( "executable" );
#endif
case 0x2:
ELF_LOG( "executable" );
break;
}
#ifdef ELF_LOG
}
ELF_LOG( "\n" );
ELF_LOG( "machine: " );
#endif
switch ( elfHeader->e_machine )
{
{
default:
#ifdef ELF_LOG
ELF_LOG( "unknown" );
#endif
break;
case 0x8:
#ifdef ELF_LOG
ELF_LOG( "mips_rs3000" );
#endif
break;
}
#ifdef ELF_LOG
ELF_LOG("\n");
ELF_LOG("version: %d\n",elfHeader->e_version);
ELF_LOG("entry: %08x\n",elfHeader->e_entry);
@ -345,7 +330,6 @@ int loadHeaders( char *Exepath ) {
ELF_LOG("sh strndx: %08x\n",elfHeader->e_shstrndx);
ELF_LOG("\n");
#endif
return TRUE;
}
@ -369,21 +353,17 @@ BOOL loadProgramHeaders( char *Exepath )
elfProgH = (ELF_PHR*)&elfdata[elfHeader->e_phoff];
for ( i = 0 ; i < elfHeader->e_phnum ; i++ ) {
#ifdef ELF_LOG
ELF_LOG( "Elf32 Program Header\n" );
ELF_LOG( "Elf32 Program Header\n" );
ELF_LOG( "type: " );
#endif
switch ( elfProgH[ i ].p_type ) {
default:
#ifdef ELF_LOG
ELF_LOG( "unknown %x", (int)elfProgH[ i ].p_type );
#endif
break;
case 0x1:
#ifdef ELF_LOG
ELF_LOG("load");
#endif
if (elfProgH[ i ].p_offset < elfsize) {
int size;
@ -397,15 +377,12 @@ BOOL loadProgramHeaders( char *Exepath )
SysPrintf("ElfProgram different load addrs: paddr=0x%8.8x, vaddr=0x%8.8x\n", elfProgH[ i ].p_paddr, elfProgH[ i ].p_vaddr);
// used to be paddr
memcpy(&PS2MEM_BASE[elfProgH[ i ].p_vaddr & 0x1ffffff],
&elfdata[elfProgH[ i ].p_offset],
size);
#ifdef ELF_LOG
&elfdata[elfProgH[ i ].p_offset], size);
ELF_LOG("\t*LOADED*");
#endif
}
break;
}
#ifdef ELF_LOG
ELF_LOG("\n");
ELF_LOG("offset: %08x\n",(int)elfProgH[i].p_offset);
ELF_LOG("vaddr: %08x\n",(int)elfProgH[i].p_vaddr);
@ -415,7 +392,7 @@ BOOL loadProgramHeaders( char *Exepath )
ELF_LOG("flags: %08x\n",elfProgH[i].p_flags);
ELF_LOG("palign: %08x\n",elfProgH[i].p_align);
ELF_LOG("\n");
#endif
}
return TRUE;
@ -440,68 +417,51 @@ BOOL loadSectionHeaders( char * Exepath )
}
for ( i = 0 ; i < elfHeader->e_shnum ; i++ ) {
#ifdef ELF_LOG
ELF_LOG( "Elf32 Section Header [%x] %s", i, &sections_names[ elfSectH[ i ].sh_name ] );
#endif
if ( elfSectH[i].sh_flags & 0x2 ) {
//2002-09-19 (Florin)
args_ptr = min( args_ptr, elfSectH[ i ].sh_addr & 0x1ffffff );
}
#ifdef ELF_LOG
ELF_LOG("\n");
ELF_LOG("type: ");
#endif
ELF_LOG("\n");
ELF_LOG("type: ");
switch ( elfSectH[ i ].sh_type )
{
default:
#ifdef ELF_LOG
ELF_LOG("unknown %08x",elfSectH[i].sh_type);
#endif
ELF_LOG("unknown %08x",elfSectH[i].sh_type);
break;
case 0x0:
#ifdef ELF_LOG
ELF_LOG("null");
#endif
ELF_LOG("null");
break;
case 0x1:
#ifdef ELF_LOG
ELF_LOG("progbits");
#endif
ELF_LOG("progbits");
break;
case 0x2:
#ifdef ELF_LOG
ELF_LOG("symtab");
#endif
ELF_LOG("symtab");
break;
case 0x3:
#ifdef ELF_LOG
ELF_LOG("strtab");
#endif
ELF_LOG("strtab");
break;
case 0x4:
#ifdef ELF_LOG
ELF_LOG("rela");
#endif
case 0x4:
ELF_LOG("rela");
break;
case 0x8:
#ifdef ELF_LOG
ELF_LOG("no bits");
#endif
ELF_LOG("no bits");
break;
case 0x9:
#ifdef ELF_LOG
ELF_LOG("rel");
#endif
case 0x9:
ELF_LOG("rel");
break;
}
#ifdef ELF_LOG
ELF_LOG("\n");
ELF_LOG("flags: %08x\n", elfSectH[i].sh_flags);
ELF_LOG("addr: %08x\n", elfSectH[i].sh_addr);
@ -511,7 +471,6 @@ BOOL loadSectionHeaders( char * Exepath )
ELF_LOG("info: %08x\n", elfSectH[i].sh_info);
ELF_LOG("addralign: %08x\n", elfSectH[i].sh_addralign);
ELF_LOG("entsize: %08x\n", elfSectH[i].sh_entsize);
#endif
// dump symbol table
if ( elfSectH[ i ].sh_type == 0x02 )
@ -574,9 +533,8 @@ int loadElfFile(char *filename) {
loadProgramHeaders( filename );
loadSectionHeaders( filename );
#ifdef ELF_LOG
ELF_LOG( "PC set to: %8.8lx\n", cpuRegs.pc );
#endif
cpuRegs.GPR.n.sp.UL[0] = 0x81f00000;
cpuRegs.GPR.n.gp.UL[0] = 0x81f80000; // might not be 100% ok
@ -645,7 +603,7 @@ void LoadGameSpecificSettings()
// break;
case 0xb99379b7: // erementar gerad (discolored chars)
g_VUGameFixes |= VUFIX_XGKICKDELAY2;
g_VUGameFixes |= VUFIX_XGKICKDELAY2; // Tested - still needed - arcum42
break;
case 0xa08c4057: //Sprint Cars (SLUS)
case 0x8b0725d5: //Flinstones Bedrock Racing (SLES)

4
pcsx2/FPU.c
View File

@ -149,9 +149,7 @@
//****************************************************************
void COP1() {
#ifdef FPU_LOG
FPU_LOG("%s\n", disR5900F(cpuRegs.code, cpuRegs.pc));
#endif
Int_COP1PrintTable[_Rs_]();
}
@ -168,9 +166,7 @@ void COP1_W() {
}
void COP1_Unknown() {
#ifdef FPU_LOG
FPU_LOG("Unknown FPU opcode called\n");
#endif
}
//****************************************************************

13
pcsx2/FiFo.c
View File

@ -38,9 +38,7 @@ extern int FOreadpos;
// NOTE: cannot use XMM/MMX regs
void ReadFIFO(u32 mem, u64 *out) {
if ((mem >= 0x10004000) && (mem < 0x10005000)) {
#ifdef VIF_LOG
VIF_LOG("ReadFIFO VIF0 0x%08X\n", mem);
#endif
out[0] = psHu64(mem );
out[1] = psHu64(mem+8);
return;
@ -96,9 +94,8 @@ void WriteFIFO(u32 mem, u64 *value) {
int ret;
if ((mem >= 0x10004000) && (mem < 0x10005000)) {
#ifdef VIF_LOG
VIF_LOG("WriteFIFO VIF0 0x%08X\n", mem);
#endif
psHu64(mem ) = value[0];
psHu64(mem+8) = value[1];
vif0ch->qwc += 1;
@ -106,9 +103,8 @@ void WriteFIFO(u32 mem, u64 *value) {
assert(ret == 0 ); // vif stall code not implemented
}
else if ((mem >= 0x10005000) && (mem < 0x10006000)) {
#ifdef VIF_LOG
VIF_LOG("WriteFIFO VIF1 0x%08X\n", mem);
#endif
psHu64(mem ) = value[0];
psHu64(mem+8) = value[1];
@ -125,9 +121,7 @@ void WriteFIFO(u32 mem, u64 *value) {
}
else if ((mem >= 0x10006000) && (mem < 0x10007000)) {
u64* data;
#ifdef GIF_LOG
GIF_LOG("WriteFIFO GIF 0x%08X\n", mem);
#endif
psHu64(mem ) = value[0];
psHu64(mem+8) = value[1];
@ -156,9 +150,8 @@ void WriteFIFO(u32 mem, u64 *value) {
} else
if ((mem&0xfffff010) == 0x10007010) {
#ifdef IPU_LOG
IPU_LOG("WriteFIFO IPU_in[%d] <- %8.8X_%8.8X_%8.8X_%8.8X\n", (mem - 0x10007010)/8, ((u32*)value)[3], ((u32*)value)[2], ((u32*)value)[1], ((u32*)value)[0]);
#endif
//commiting every 16 bytes
while( FIFOto_write((void*)value, 1) == 0 ) {
SysPrintf("IPU sleeping\n");

51
pcsx2/GS.cpp
View File

@ -503,10 +503,7 @@ void gsWrite8(u32 mem, u8 value) {
GSRingBufSimplePacket(GS_RINGTYPE_MEMWRITE8, mem&0x13ff, value, 0);
}
}
#ifdef GIF_LOG
GIF_LOG("GS write 8 at %8.8lx with data %8.8lx\n", mem, value);
#endif
}
extern void UpdateVSyncRate();
@ -555,10 +552,7 @@ void gsWrite16(u32 mem, u16 value) {
GSRingBufSimplePacket(GS_RINGTYPE_MEMWRITE16, mem&0x13ff, value, 0);
}
}
#ifdef GIF_LOG
GIF_LOG("GS write 16 at %8.8lx with data %8.8lx\n", mem, value);
#endif
}
void gsWrite32(u32 mem, u32 value)
@ -601,10 +595,7 @@ void gsWrite32(u32 mem, u32 value)
GSRingBufSimplePacket(GS_RINGTYPE_MEMWRITE32, mem&0x13ff, value, 0);
}
}
#ifdef GIF_LOG
GIF_LOG("GS write 32 at %8.8lx with data %8.8lx\n", mem, value);
#endif
}
void gsWrite64(u32 mem, u64 value) {
@ -647,43 +638,32 @@ void gsWrite64(u32 mem, u64 value) {
GSRingBufSimplePacket(GS_RINGTYPE_MEMWRITE64, mem&0x13ff, (u32)value, (u32)(value>>32));
}
}
#ifdef GIF_LOG
GIF_LOG("GS write 64 at %8.8lx with data %8.8lx_%8.8lx\n", mem, ((u32*)&value)[1], (u32)value);
#endif
}
u8 gsRead8(u32 mem)
{
#ifdef GIF_LOG
GIF_LOG("GS read 8 %8.8lx, at %8.8lx\n", *(u8*)(PS2MEM_BASE+(mem&~0xc00)), mem);
#endif
return *(u8*)PS2GS_BASE(mem);
}
u16 gsRead16(u32 mem)
{
#ifdef GIF_LOG
GIF_LOG("GS read 16 %8.8lx, at %8.8lx\n", *(u16*)(PS2MEM_BASE+(mem&~0xc00)), mem);
#endif
return *(u16*)PS2GS_BASE(mem);
}
u32 gsRead32(u32 mem) {
#ifdef GIF_LOG
u32 gsRead32(u32 mem)
{
GIF_LOG("GS read 32 %8.8lx, at %8.8lx\n", *(u32*)(PS2MEM_BASE+(mem&~0xc00)), mem);
#endif
return *(u32*)PS2GS_BASE(mem);
}
u64 gsRead64(u32 mem)
{
#ifdef GIF_LOG
GIF_LOG("GS read 64 %8.8lx, at %8.8lx\n", *(u32*)PS2GS_BASE(mem), mem);
#endif
return *(u64*)PS2GS_BASE(mem);
}
@ -693,9 +673,8 @@ void gsIrq() {
static void GSRegHandlerSIGNAL(u32* data)
{
#ifdef GIF_LOG
GIF_LOG("GS SIGNAL data %x_%x CSRw %x\n",data[0], data[1], CSRw);
#endif
GSSIGLBLID->SIGID = (GSSIGLBLID->SIGID&~data[1])|(data[0]&data[1]);
if ((CSRw & 0x1))
@ -710,9 +689,8 @@ static void GSRegHandlerSIGNAL(u32* data)
static void GSRegHandlerFINISH(u32* data)
{
#ifdef GIF_LOG
GIF_LOG("GS FINISH data %x_%x CSRw %x\n",data[0], data[1], CSRw);
#endif
if ((CSRw & 0x2))
GSCSRr |= 2; // finish
@ -910,9 +888,7 @@ static int gspath3done=0;
int gscycles = 0;
void gsInterrupt() {
#ifdef GIF_LOG
GIF_LOG("gsInterrupt: %8.8x\n", cpuRegs.cycle);
#endif
if((gif->chcr & 0x100) == 0){
//SysPrintf("Eh? why are you still interrupting! chcr %x, qwc %x, done = %x\n", gif->chcr, gif->qwc, done);
@ -1291,11 +1267,7 @@ void mfifoGIFtransfer(int qwc) {
gifqwc += qwc;
if(!(gif->chcr & 0x100))return;
}
#ifdef SPR_LOG
SPR_LOG("mfifoGIFtransfer %x madr %x, tadr %x\n", gif->chcr, gif->madr, gif->tadr);
#endif
if(gif->qwc == 0){
if(gif->tadr == spr0->madr) {
@ -1316,11 +1288,9 @@ void mfifoGIFtransfer(int qwc) {
mfifocycles += 2;
gif->chcr = ( gif->chcr & 0xFFFF ) | ( (*ptag) & 0xFFFF0000 );
#ifdef SPR_LOG
SPR_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx mfifo qwc = %x spr0 madr = %x\n",
ptag[1], ptag[0], gif->qwc, id, gif->madr, gif->tadr, gifqwc, spr0->madr);
#endif
gifqwc--;
switch (id) {
case 0: // Refe - Transfer Packet According to ADDR field
@ -1354,9 +1324,7 @@ void mfifoGIFtransfer(int qwc) {
break;
}
if ((gif->chcr & 0x80) && (ptag[0] >> 31)) {
#ifdef SPR_LOG
SPR_LOG("dmaIrq Set\n");
#endif
gifdone = 2;
}
}
@ -1370,15 +1338,10 @@ void mfifoGIFtransfer(int qwc) {
FreezeXMMRegs(0);
FreezeMMXRegs(0);
if(gif->qwc == 0 && gifdone == 2) gifdone = 1;
CPU_INT(11,mfifocycles);
#ifdef SPR_LOG
SPR_LOG("mfifoGIFtransfer end %x madr %x, tadr %x\n", gif->chcr, gif->madr, gif->tadr);
#endif
SPR_LOG("mfifoGIFtransfer end %x madr %x, tadr %x\n", gif->chcr, gif->madr, gif->tadr);
}
void gifMFIFOInterrupt()

74
pcsx2/Hw.c
View File

@ -89,9 +89,7 @@ u8 hwRead8(u32 mem)
SysPrintf("hwRead8 to %x\n", mem);
#endif
#ifdef SPR_LOG
SPR_LOG("Hardware read 8bit at %lx, ret %lx\n", mem, psHu8(mem));
#endif
switch (mem) {
default:
@ -110,9 +108,7 @@ u8 hwRead8(u32 mem)
ret = psHu8(mem);
}
else ret = 0;
#ifdef HW_LOG
HW_LOG("Unknown Hardware Read 8 at %x\n",mem);
#endif
break;
}
@ -127,10 +123,8 @@ u16 hwRead16(u32 mem)
if( mem >= 0x10002000 && mem < 0x10008000 )
SysPrintf("hwRead16 to %x\n", mem);
#endif
#ifdef SPR_LOG
SPR_LOG("Hardware read 16bit at %lx, ret %lx\n", mem, psHu16(mem));
#endif
switch (mem) {
case 0x10000000: ret = (u16)rcntRcount(0); break;
case 0x10000010: ret = (u16)counters[0].mode; break;
@ -164,9 +158,7 @@ u16 hwRead16(u32 mem)
ret = psHu16(mem);
}
else ret = 0;
#ifdef HW_LOG
HW_LOG("Unknown Hardware Read 16 at %x\n",mem);
#endif
break;
}
@ -279,9 +271,7 @@ u32 hwRead32(u32 mem) {
break;
case 0x1000f520: // DMAC_ENABLER
#ifdef HW_LOG
HW_LOG("DMAC_ENABLER Read 32bit %lx\n", psHu32(0xf590));
#endif
return psHu32(0xf590);
default:
@ -314,9 +304,7 @@ u32 hwRead32(u32 mem) {
SysPrintf("32bit HW read of address 0x%x\n", mem);
ret = 0;
}
#ifdef HW_LOG
HW_LOG("Unknown Hardware Read 32 at %lx, ret %lx\n", mem, ret);
#endif
break;
}
@ -336,9 +324,7 @@ u64 hwRead64(u32 mem) {
ret = psHu64(mem);
}
else ret = 0;
#ifdef HW_LOG
HW_LOG("Unknown Hardware Read 64 at %x\n",mem);
#endif
break;
}
@ -355,9 +341,7 @@ void hwRead128(u32 mem, u64 *out) {
out[1] = psHu64(mem+8);
}
#ifdef HW_LOG
HW_LOG("Unknown Hardware Read 128 at %x\n",mem);
#endif
}
// dark cloud2 uses it
@ -419,30 +403,22 @@ void hwWrite8(u32 mem, u8 value) {
vif1Write32(mem & ~0x2, value << 16);
break;
case 0x10008001: // dma0 - vif0
#ifdef DMA_LOG
DMA_LOG("VIF0dma %lx\n", value);
#endif
DmaExec8(VIF0, 0);
break;
case 0x10009001: // dma1 - vif1
#ifdef DMA_LOG
DMA_LOG("VIF1dma %lx\n", value);
#endif
DmaExec8(VIF1, 1);
break;
case 0x1000a001: // dma2 - gif
#ifdef DMA_LOG
DMA_LOG("0x%8.8x hwWrite8: GSdma %lx 0x%lx\n", cpuRegs.cycle, value);
#endif
DmaExec8(GIF, 2);
break;
case 0x1000b001: // dma3 - fromIPU
#ifdef DMA_LOG
DMA_LOG("IPU0dma %lx\n", value);
#endif
DmaExec8(IPU0, 3);
break;
@ -454,38 +430,28 @@ void hwWrite8(u32 mem, u8 value) {
break;
case 0x1000c001: // dma5 - sif0
#ifdef DMA_LOG
DMA_LOG("SIF0dma %lx\n", value);
#endif
// if (value == 0) psxSu32(0x30) = 0x40000;
DmaExec8(SIF0, 5);
break;
case 0x1000c401: // dma6 - sif1
#ifdef DMA_LOG
DMA_LOG("SIF1dma %lx\n", value);
#endif
DmaExec8(SIF1, 6);
break;
case 0x1000c801: // dma7 - sif2
#ifdef DMA_LOG
DMA_LOG("SIF2dma %lx\n", value);
#endif
DmaExec8(SIF2, 7);
break;
case 0x1000d001: // dma8 - fromSPR
#ifdef DMA_LOG
DMA_LOG("fromSPRdma8 %lx\n", value);
#endif
DmaExec8(SPR0, 8);
break;
case 0x1000d401: // dma9 - toSPR
#ifdef DMA_LOG
DMA_LOG("toSPRdma8 %lx\n", value);
#endif
DmaExec8(SPR1, 9);
break;
@ -518,9 +484,7 @@ void hwWrite8(u32 mem, u8 value) {
default:
psHu8(mem) = value;
}
#ifdef HW_LOG
HW_LOG("Unknown Hardware write 8 at %x with value %x\n", mem, value);
#endif
break;
}
}
@ -541,17 +505,13 @@ void hwWrite16(u32 mem, u16 value)
#endif
switch(mem) {
case 0x10008000: // dma0 - vif0
#ifdef DMA_LOG
DMA_LOG("VIF0dma %lx\n", value);
#endif
DmaExec16(VIF0, 0);
break;
// Latest Fix for Florin by asadr (VIF1)
case 0x10009000: // dma1 - vif1 - chcr
#ifdef DMA_LOG
DMA_LOG("VIF1dma CHCR %lx\n", value);
#endif
DmaExec16(VIF1, 1);
break;
@ -584,9 +544,7 @@ void hwWrite16(u32 mem, u16 value)
// ---------------------------------------------------
case 0x1000a000: // dma2 - gif
#ifdef DMA_LOG
DMA_LOG("0x%8.8x hwWrite32: GSdma %lx\n", cpuRegs.cycle, value);
#endif
DmaExec16(GIF, 2);
break;
#ifdef HW_LOG
@ -617,9 +575,7 @@ void hwWrite16(u32 mem, u16 value)
break;
#endif
case 0x1000b000: // dma3 - fromIPU
#ifdef DMA_LOG
DMA_LOG("IPU0dma %lx\n", value);
#endif
DmaExec16(IPU0, 3);
break;
@ -642,9 +598,7 @@ void hwWrite16(u32 mem, u16 value)
break;
#endif
case 0x1000b400: // dma4 - toIPU
#ifdef DMA_LOG
DMA_LOG("IPU1dma %lx\n", value);
#endif
DmaExec16(IPU1, 4);
break;
#ifdef HW_LOG
@ -667,9 +621,7 @@ void hwWrite16(u32 mem, u16 value)
#endif
case 0x1000c000: // dma5 - sif0
#ifdef DMA_LOG
DMA_LOG("SIF0dma %lx\n", value);
#endif
// if (value == 0) psxSu32(0x30) = 0x40000;
DmaExec16(SIF0, 5);
break;
@ -678,9 +630,7 @@ void hwWrite16(u32 mem, u16 value)
//?
break;
case 0x1000c400: // dma6 - sif1
#ifdef DMA_LOG
DMA_LOG("SIF1dma %lx\n", value);
#endif
DmaExec16(SIF1, 6);
break;
@ -699,25 +649,19 @@ void hwWrite16(u32 mem, u16 value)
#endif
case 0x1000c800: // dma7 - sif2
#ifdef DMA_LOG
DMA_LOG("SIF2dma %lx\n", value);
#endif
DmaExec16(SIF2, 7);
break;
case 0x1000c802:
//?
break;
case 0x1000d000: // dma8 - fromSPR
#ifdef DMA_LOG
DMA_LOG("fromSPRdma %lx\n", value);
#endif
DmaExec16(SPR0, 8);
break;
case 0x1000d400: // dma9 - toSPR
#ifdef DMA_LOG
DMA_LOG("toSPRdma %lx\n", value);
#endif
DmaExec16(SPR1, 9);
break;
case 0x1000f592: // DMAC_ENABLEW
@ -766,9 +710,7 @@ void hwWrite16(u32 mem, u16 value)
}
}
#ifdef HW_LOG
HW_LOG("Unknown Hardware write 16 at %x with value %x\n",mem,value);
#endif
}
#define DmaExec(name, num) { \
@ -1110,9 +1052,7 @@ void hwWrite64(u32 mem, u64 value) {
return;
case 0x1000a000: // dma2 - gif
#ifdef DMA_LOG
DMA_LOG("0x%8.8x hwWrite64: GSdma %lx\n", cpuRegs.cycle, value);
#endif
DmaExec(GIF, 2);
break;
@ -1124,9 +1064,7 @@ void hwWrite64(u32 mem, u64 value) {
#endif
case 0x1000e010: // DMAC_STAT
#ifdef HW_LOG
HW_LOG("DMAC_STAT Write 64bit %x\n", value);
#endif
val32 = (u32)value;
psHu16(0xe010)&= ~(val32 & 0xffff); // clear on 1
val32 = val32 >> 16;
@ -1146,18 +1084,14 @@ void hwWrite64(u32 mem, u64 value) {
break;
case 0x1000f000: // INTC_STAT
#ifdef HW_LOG
HW_LOG("INTC_STAT Write 64bit %x\n", value);
#endif
psHu32(0xf000)&=~value;
if ((cpuRegs.CP0.n.Status.val & 0x10407) == 0x10401)
cpuTestINTCInts();
break;
case 0x1000f010: // INTC_MASK
#ifdef HW_LOG
HW_LOG("INTC_MASK Write 32bit %x\n", value);
#endif
for (i=0; i<16; i++) { // reverse on 1
int s = (1<<i);
if (value & s) {
@ -1220,9 +1154,7 @@ void intcInterrupt() {
}
if ((psHu32(INTC_STAT) & psHu32(INTC_MASK)) == 0) return;
#ifdef HW_LOG
HW_LOG("intcInterrupt %x\n", psHu32(INTC_STAT) & psHu32(INTC_MASK));
#endif
if(psHu32(INTC_STAT) & 0x2){
counters[0].hold = rcntRcount(0);
counters[1].hold = rcntRcount(1);
@ -1252,11 +1184,9 @@ void dmacInterrupt()
psHu16(0xe010) & 0x8000) == 0) return;
if((psHu32(DMAC_CTRL) & 0x1) == 0) return;
#ifdef HW_LOG
HW_LOG("dmacInterrupt %x\n", (psHu16(0xe012) & psHu16(0xe010) ||
psHu16(0xe010) & 0x8000));
#endif
cpuException(0x800, cpuRegs.branch);
}

5
pcsx2/Hw.h
View File

@ -343,9 +343,8 @@ extern uptr *memLUTR;
static __forceinline void *dmaGetAddr(u32 addr) {
u8 *ptr;
/*#ifdef DMA_LOG
if (addr & 0xf) { DMA_LOG("*PCSX2*: DMA address not 128bit aligned: %8.8x\n", addr); }
#endif*/
// if (addr & 0xf) { DMA_LOG("*PCSX2*: DMA address not 128bit aligned: %8.8x\n", addr); }
if (addr & 0x80000000) { // teh sux why the f00k 0xE0000000
return (void*)&psS[addr & 0x3ff0];
}

13
pcsx2/IPU/IPU.c
View File

@ -595,9 +595,7 @@ static void ipuBCLR(u32 val) {
ipuRegs->ctrl.BUSY = 0;
ipuRegs->cmd.BUSY = 0;
memset(readbits,0,80);
#ifdef IPU_LOG
IPU_LOG("Clear IPU input FIFO. Set Bit offset=0x%X\n", g_BP.BP);
#endif
}
static BOOL ipuIDEC(u32 val)
@ -746,11 +744,9 @@ static BOOL ipuVDEC(u32 val) {
BigEndian(ipuRegs->top, ipuRegs->top);
#ifdef IPU_LOG
IPU_LOG("IPU VDEC command data 0x%x(0x%x). Skip 0x%X bits/Table=%d (%s), pct %d\n",
ipuRegs->cmd.DATA,ipuRegs->cmd.DATA >> 16,val & 0x3f, (val >> 26) & 3, (val >> 26) & 1 ?
((val >> 26) & 2 ? "DMV" : "MBT") : (((val >> 26) & 2 ? "MC" : "MBAI")),ipuRegs->ctrl.PCT);
#endif
return TRUE;
}
@ -767,9 +763,7 @@ static BOOL ipuFDEC(u32 val)
BigEndian(ipuRegs->cmd.DATA, ipuRegs->cmd.DATA);
ipuRegs->top = ipuRegs->cmd.DATA;
#ifdef IPU_LOG
IPU_LOG("FDEC read: 0x%8.8x\n", ipuRegs->top);
#endif
return TRUE;
}
@ -940,9 +934,7 @@ static BOOL ipuPACK(u32 val) {
static void ipuSETTH(u32 val) {
s_thresh[0] = (val & 0xff);
s_thresh[1] = ((val>>16) & 0xff);
#ifdef IPU_LOG
IPU_LOG("IPU SETTH (Set threshold value)command %x.\n", val&0xff00ff);
#endif
}
///////////////////////
@ -986,11 +978,8 @@ void IPUCMD_WRITE(u32 val) {
break;
case SCE_IPU_FDEC:
#ifdef IPU_LOG
IPU_LOG("IPU FDEC command. Skip 0x%X bits, FIFO 0x%X qwords, BP 0x%X, FP %d, CHCR 0x%x, %x\n",
val & 0x3f,g_BP.IFC,(int)g_BP.BP,g_BP.FP,((DMACh*)&PS2MEM_HW[0xb400])->chcr,cpuRegs.pc);
#endif
g_BP.BP+= val & 0x3F;
@ -1889,10 +1878,8 @@ int IPU0dma()
assert( !(ipu0dma->chcr&0x40) );
#ifdef IPU_LOG
IPU_LOG("dmaIPU0 chcr = %lx, madr = %lx, qwc = %lx\n",
ipu0dma->chcr, ipu0dma->madr, ipu0dma->qwc);
#endif
assert((ipu0dma->chcr & 0xC) == 0 );
pMem = (u32*)dmaGetAddr(ipu0dma->madr);

14
pcsx2/Interpreter.c
View File

@ -134,9 +134,7 @@ void REGIMM() {Int_REGIMMPrintTable[_Rt_](); }
void UnknownOpcode() {
#ifdef CPU_LOG
CPU_LOG("%8.8lx: Unknown opcode called\n", cpuRegs.pc);
#endif
}
/*********************************************************
@ -714,27 +712,21 @@ int __Deci2Call(int call, u32 *addr) {
switch (call) {
case 1: // open
deci2addr = (u32*)PSM(addr[1]);
#ifdef BIOS_LOG
BIOS_LOG("deci2open: %x,%x,%x,%x\n",
addr[3], addr[2], addr[1], addr[0]);
#endif
deci2handler = addr[2];
return 1;
case 2: // close
return 1;
case 3: // reqsend
#ifdef BIOS_LOG
BIOS_LOG("deci2reqsend: %x,%x,%x,%x: deci2addr: %x,%x,%x,buf=%x %x,%x,len=%x,%x\n",
addr[3], addr[2], addr[1], addr[0],
deci2addr[7], deci2addr[6], deci2addr[5], deci2addr[4],
deci2addr[3], deci2addr[2], deci2addr[1], deci2addr[0]);
#endif
// cpuRegs.pc = deci2handler;
// SysPrintf("deci2msg: %s", (char*)PSM(deci2addr[4]+0xc));
if (deci2addr == NULL) return 1;
@ -750,10 +742,8 @@ int __Deci2Call(int call, u32 *addr) {
return 1;
case 4: // poll
#ifdef BIOS_LOG
BIOS_LOG("deci2poll: %x,%x,%x,%x\n",
addr[3], addr[2], addr[1], addr[0]);
#endif
return 1;
case 5: // exrecv
@ -798,12 +788,10 @@ void SYSCALL() {
addr = cpuRegs.GPR.n.a0.UL[0] + n_transfer * sizeof(struct t_sif_dma_transfer);
dmat = (struct t_sif_dma_transfer*)PSM(addr);
#ifdef BIOS_LOG
BIOS_LOG("bios_%s: n_transfer=%d, size=%x, attr=%x, dest=%x, src=%x\n",
bios[cpuRegs.GPR.n.v1.UC[0]], n_transfer,
dmat->size, dmat->attr,
dmat->dest, dmat->src);
#endif
}
//Log=1;
}

2
pcsx2/MMI.c
View File

@ -24,9 +24,7 @@
void MMI() {
#ifdef MMI_LOG
MMI_LOG("%s\n", disR5900F(cpuRegs.code, cpuRegs.pc));
#endif
Int_MMIPrintTable[_Funct_]();
}

20
pcsx2/Mdec.c
View File

@ -186,9 +186,8 @@ void mdecInit(void) {
void mdecWrite0(u32 data) {
#ifdef CDR_LOG
CDR_LOG("mdec0 write %lx\n", data);
#endif
mdec.command = data;
if ((data&0xf5ff0000)==0x30000000) {
mdec.rlsize = data&0xffff;
@ -196,9 +195,8 @@ void mdecWrite0(u32 data) {
}
void mdecWrite1(u32 data) {
#ifdef CDR_LOG
CDR_LOG("mdec1 write %lx\n", data);
#endif
if (data&0x80000000) { // mdec reset
round_init();
// mdecInit();
@ -206,9 +204,8 @@ void mdecWrite1(u32 data) {
}
u32 mdecRead0(void) {
#ifdef CDR_LOG
CDR_LOG("mdec0 read %lx\n", mdec.command);
#endif
return mdec.command;
}
@ -230,9 +227,7 @@ void psxDma0(u32 adr, u32 bcr, u32 chcr) {
int cmd = mdec.command;
int size;
#ifdef CDR_LOG
CDR_LOG("DMA0 %lx %lx %lx\n", adr, bcr, chcr);
#endif
if (chcr!=0x01000201) return;
@ -260,9 +255,7 @@ void psxDma1(u32 adr, u32 bcr, u32 chcr) {
unsigned short *image;
int size;
#ifdef CDR_LOG
CDR_LOG("DMA1 %lx %lx %lx (cmd = %lx)\n", adr, bcr, chcr, mdec.command);
#endif
if (chcr!=0x01000200) return;
@ -503,15 +496,10 @@ void yuv2rgb24(int *blk,unsigned char *image) {
}
int mdecFreeze(gzFile f, int Mode) {
gzfreeze(&mdec, sizeof(mdec));
gzfreezel(iq_y);
gzfreezel(iq_uv);
return 0;
}

101
pcsx2/Memory.c
View File

@ -84,9 +84,7 @@ extern void * memcpy_fast(void *dest, const void *src, size_t n);
int MemMode = 0; // 0 is Kernel Mode, 1 is Supervisor Mode, 2 is User Mode
u16 ba0R16(u32 mem) {
#ifdef MEM_LOG
//MEM_LOG("ba00000 Memory read16 address %x\n", mem);
#endif
#ifdef PCSX2_VIRTUAL_MEM
if (mem == 0x1a000006) {
@ -631,10 +629,8 @@ u8 recMemRead8()
default:
return *(u8*)(PS2MEM_BASE+mem);
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory read32 from address %8.8x\n", mem);
#endif
cpuTlbMissR(mem, cpuRegs.branch);
return 0;
@ -903,12 +899,8 @@ u16 recMemRead16() {
default:
return *(u16*)(PS2MEM_BASE+mem);
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory read16 from address %8.8x\n", mem);
#endif
cpuTlbMissR(mem, cpuRegs.branch);
return 0;
}
@ -1255,10 +1247,7 @@ void recMemWrite8()
*(u8*)(PS2MEM_BASE+mem) = value;
return;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory write8 to address %x with data %2.2x\n", mem, value);
#endif
cpuTlbMissW(mem, cpuRegs.branch);
}
@ -1330,10 +1319,7 @@ void recMemWrite16() {
*(u16*)(PS2MEM_BASE+mem) = value;
return;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory write16 to address %x with data %4.4x\n", mem, value);
#endif
cpuTlbMissW(mem, cpuRegs.branch);
}
@ -1792,10 +1778,7 @@ int memRead8RS (u32 mem, u64 *out)
*out = *(s8*)(PS2MEM_BASE+mem);
return 0;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory read32 from address %8.8x\n", mem);
#endif
cpuTlbMissR(mem, cpuRegs.branch);
return -1;
@ -1818,10 +1801,7 @@ int memRead8RU (u32 mem, u64 *out)
*out = *(u8*)(PS2MEM_BASE+mem);
return 0;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory read32 from address %8.8x\n", mem);
#endif
cpuTlbMissR(mem, cpuRegs.branch);
return -1;
@ -1849,12 +1829,8 @@ int memRead16(u32 mem, u16 *out) {
*out = *(u16*)(PS2MEM_BASE+mem);
return 0;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory read16 from address %8.8x\n", mem);
#endif
cpuTlbMissR(mem, cpuRegs.branch);
return -1;
}
@ -1880,12 +1856,8 @@ int memRead16RS(u32 mem, u64 *out) {
*out = *(s16*)(PS2MEM_BASE+mem);
return 0;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory read16 from address %8.8x\n", mem);
#endif
cpuTlbMissR(mem, cpuRegs.branch);
return -1;
}
@ -1911,12 +1883,8 @@ int memRead16RU(u32 mem, u64 *out) {
*out = *(u16*)(PS2MEM_BASE+mem);
return 0;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory read16 from address %8.8x\n", mem);
#endif
cpuTlbMissR(mem, cpuRegs.branch);
return -1;
}
@ -2061,10 +2029,7 @@ void memWrite8 (u32 mem, u8 value) {
}
return;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory write8 to address %x with data %2.2x\n", mem, value);
#endif
cpuTlbMissW(mem, cpuRegs.branch);
}
@ -2089,10 +2054,7 @@ void memWrite16(u32 mem, u16 value) {
}
return;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory write16 to address %x with data %4.4x\n", mem, value);
#endif
cpuTlbMissW(mem, cpuRegs.branch);
}
@ -2118,10 +2080,7 @@ void memWrite32(u32 mem, u32 value)
}
return;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory write32 to address %x with data %8.8x\n", mem, value);
#endif
cpuTlbMissW(mem, cpuRegs.branch);
}
@ -2141,10 +2100,7 @@ void memWrite64(u32 mem, u64 value) {
}
return;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory write64 to address %x with data %8.8x_%8.8x\n", mem, (u32)(value>>32), (u32)value);
#endif
cpuTlbMissW(mem, cpuRegs.branch);
}
@ -2170,10 +2126,7 @@ void memWrite128(u32 mem, u64 *value) {
}
return;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory write128 to address %x with data %8.8x_%8.8x_%8.8x_%8.8x\n", mem, ((u32*)value)[3], ((u32*)value)[2], ((u32*)value)[1], ((u32*)value)[0]);
#endif
cpuTlbMissW(mem, cpuRegs.branch);
}
@ -2387,12 +2340,8 @@ int memRead8 (u32 mem, u8 *out) {
SysPrintf("DEV9 read8 %8.8lx: %2.2lx\n", mem & ~0xa4000000, *out);
return 0;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory read32 from address %8.8x\n", mem);
#endif
cpuTlbMissR(mem, cpuRegs.branch);
return -1;
}
@ -2427,10 +2376,7 @@ int memRead8RS (u32 mem, u64 *out) {
SysPrintf("DEV9 read8 %8.8lx: %2.2lx\n", mem & ~0xa4000000, *out);
return 0;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory read32 from address %8.8x\n", mem);
#endif
cpuTlbMissR(mem, cpuRegs.branch);
return -1;
@ -2467,12 +2413,8 @@ int memRead8RU (u32 mem, u64 *out) {
SysPrintf("DEV9 read8 %8.8lx: %2.2lx\n", mem & ~0xa4000000, *out);
return 0;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory read32 from address %8.8x\n", mem);
#endif
cpuTlbMissR(mem, cpuRegs.branch);
return -1;
}
@ -2499,9 +2441,7 @@ int memRead16(u32 mem, u16 *out) {
case 2: // psh
*out = psxHwRead16(mem & ~0xa0000000); return 0;
case 4: // b80
#ifdef MEM_LOG
MEM_LOG("b800000 Memory read16 address %x\n", mem);
#endif
*out = 0; return 0;
case 5: // ba0
*out = ba0R16(mem); return 0;
@ -2514,10 +2454,7 @@ int memRead16(u32 mem, u16 *out) {
case 8: // spu2
*out = SPU2read(mem & ~0xa0000000); return 0;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory read16 from address %8.8x\n", mem);
#endif
cpuTlbMissR(mem, cpuRegs.branch);
return -1;
@ -2546,9 +2483,7 @@ int memRead16RS(u32 mem, u64 *out) {
case 2: // psh
*out = (s16)psxHwRead16(mem & ~0xa0000000); return 0;
case 4: // b80
#ifdef MEM_LOG
MEM_LOG("b800000 Memory read16 address %x\n", mem);
#endif
*out = 0; return 0;
case 5: // ba0
*out = (s16)ba0R16(mem); return 0;
@ -2561,12 +2496,8 @@ int memRead16RS(u32 mem, u64 *out) {
case 8: // spu2
*out = (s16)SPU2read(mem & ~0xa0000000); return 0;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory read16 from address %8.8x\n", mem);
#endif
cpuTlbMissR(mem, cpuRegs.branch);
return -1;
}
@ -2593,9 +2524,7 @@ int memRead16RU(u32 mem, u64 *out) {
case 2: // psh
*out = (u16)psxHwRead16(mem & ~0xa0000000); return 0;
case 4: // b80
#ifdef MEM_LOG
MEM_LOG("b800000 Memory read16 address %x\n", mem);
#endif
*out = 0; return 0;
case 5: // ba0
*out = (u16)ba0R16(mem); return 0;
@ -2608,12 +2537,8 @@ int memRead16RU(u32 mem, u64 *out) {
case 8: // spu2
*out = (u16)SPU2read(mem & ~0xa0000000); return 0;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory read16 from address %8.8x\n", mem);
#endif
cpuTlbMissR(mem, cpuRegs.branch);
return -1;
}
@ -2763,12 +2688,8 @@ int memRead64(u32 mem, u64 *out) {
case 6: // gsm
*out = gsRead64(mem & ~0xa0000000); return 0;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory read64 from address %8.8x\n", mem);
#endif
cpuTlbMissR(mem, cpuRegs.branch);
return -1;
}
@ -2801,12 +2722,8 @@ int memRead128(u32 mem, u64 *out) {
out[0] = gsRead64((mem ) & ~0xa0000000);
out[1] = gsRead64((mem+8) & ~0xa0000000); return 0;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory read128 from address %8.8x\n", mem);
#endif
cpuTlbMissR(mem, cpuRegs.branch);
return -1;
}
@ -2853,10 +2770,7 @@ void memWrite8 (u32 mem, u8 value) {
SysPrintf("DEV9 write8 %8.8lx: %2.2lx\n", mem & ~0xa4000000, value);
return;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory write8 to address %x with data %2.2x\n", mem, value);
#endif
cpuTlbMissW(mem, cpuRegs.branch);
}
@ -2887,9 +2801,7 @@ void memWrite16(u32 mem, u16 value) {
case 2: // psh
psxHwWrite16(mem & ~0xa0000000, value); return;
case 5: // ba0
#ifdef MEM_LOG
MEM_LOG("ba00000 Memory write16 to address %x with data %x\n", mem, value);
#endif
return;
case 6: // gsm
gsWrite16(mem & ~0xa0000000, value); return;
@ -2900,10 +2812,7 @@ void memWrite16(u32 mem, u16 value) {
case 8: // spu2
SPU2write(mem & ~0xa0000000, value); return;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory write16 to address %x with data %4.4x\n", mem, value);
#endif
cpuTlbMissW(mem, cpuRegs.branch);
}
@ -2941,9 +2850,7 @@ void memWrite32(u32 mem, u32 value)
SysPrintf("DEV9 write32 %8.8lx: %8.8lx\n", mem & ~0xa4000000, value);
return;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory write32 to address %x with data %8.8x\n", mem, value);
#endif
cpuTlbMissW(mem, cpuRegs.branch);
}
@ -2981,10 +2888,7 @@ void memWrite64(u32 mem, u64 value) {
case 6: // gsm
gsWrite64(mem & ~0xa0000000, value); return;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory write64 to address %x with data %8.8x_%8.8x\n", mem, (u32)(value>>32), (u32)value);
#endif
cpuTlbMissW(mem, cpuRegs.branch);
}
@ -3026,10 +2930,7 @@ void memWrite128(u32 mem, u64 *value) {
gsWrite64(mem, value[0]);
gsWrite64(mem+8, value[1]); return;
}
#ifdef MEM_LOG
MEM_LOG("Unknown Memory write128 to address %x with data %8.8x_%8.8x_%8.8x_%8.8x\n", mem, ((u32*)value)[3], ((u32*)value)[2], ((u32*)value)[1], ((u32*)value)[0]);
#endif
cpuTlbMissW(mem, cpuRegs.branch);
}

3
pcsx2/PsxBios.c
View File

@ -183,12 +183,9 @@ void bios_write() { // 0x35/0x03
}
pc0 = ra; return;
}
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("bios_%s: %x,%x,%x\n", biosB0n[0x35], a0, a1, a2);
#endif
v0 = -1;
pc0 = ra;
}

2
pcsx2/PsxCounters.c
View File

@ -493,9 +493,7 @@ void psxRcntWcount16(int index, u32 value) {
void psxRcntWcount32(int index, u32 value) {
u32 change = 0;
#ifdef PSXCNT_LOG
PSXCNT_LOG("writeCcount[%d] = %x\n", index, value);
#endif
change = psxRegs.cycle - psxCounters[index].sCycleT;
//psxCounters[i].count += change / psxCounters[i].rate;

4
pcsx2/PsxInterpreter.c
View File

@ -338,9 +338,7 @@ void zeroEx() {
pc = psxRegs.GPR.n.ra;
while (psxRegs.pc != pc) psxCpu->ExecuteBlock();
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("%s: %s (%x) END\n", lib, fname == NULL ? "unknown" : fname, code);
#endif*/
PSXBIOS_LOG("%s: %s (%x) END\n", lib, fname == NULL ? "unknown" : fname, code);*/
}
/*/==========================================CALL LOG
char* getName(char *file, u32 addr){

42
pcsx2/PsxMem.c
View File

@ -90,9 +90,7 @@ u16 psxMemRead16(u32 mem)
break;
case 0x1d00:
#ifdef SIF_LOG
SIF_LOG("Sif reg read %x value %x\n", mem, psxHu16(mem));
#endif
switch(mem & 0xF0)
{
case 0x40: return psHu16(0x1000F240) | 0x0002;
@ -126,9 +124,7 @@ u32 psxMemRead32(u32 mem)
break;
case 0x1d00:
#ifdef SIF_LOG
SIF_LOG("Sif reg read %x value %x\n", mem, psxHu32(mem));
#endif
switch(mem & 0xF0)
{
case 0x40: return psHu32(0x1000F240) | 0xF0000002;
@ -308,16 +304,12 @@ void psxMemWrite32(u32 mem, u32 value)
case 0xcc0: case 0xcc4:
case 0x0c4:
g_psxWriteOk = 0;
#ifdef PSXMEM_LOG
// PSXMEM_LOG("writectrl: writenot ok\n");
#endif
//PSXMEM_LOG("writectrl: writenot ok\n");
break;
case 0x1e988:
case 0x1edd8:
g_psxWriteOk = 1;
#ifdef PSXMEM_LOG
// PSXMEM_LOG("writectrl: write ok\n");
#endif
//PSXMEM_LOG("writectrl: write ok\n");
break;
default:
#ifdef PSXMEM_LOG
@ -465,9 +457,7 @@ u8 psxMemRead8(u32 mem) {
return *(u8 *)(p + (mem & 0xffff));
} else {
if (t == 0x1000) return DEV9read8(mem & 0x1FFFFFFF);
#ifdef PSXMEM_LOG
PSXMEM_LOG("err lb %8.8lx\n", mem);
#endif
return 0;
}
}
@ -507,9 +497,7 @@ u16 psxMemRead16(u32 mem) {
ret = psxHu16(mem);
break;
}
#ifdef SIF_LOG
SIF_LOG("Sif reg read %x value %x\n", mem, ret);
#endif
SIF_LOG("Sif reg read %x value %x\n", mem, ret);
return ret;
}
return *(u16 *)(p + (mem & 0xffff));
@ -517,9 +505,7 @@ u16 psxMemRead16(u32 mem) {
if (t == 0x1F90)
return SPU2read(mem & 0x1FFFFFFF);
if (t == 0x1000) return DEV9read16(mem & 0x1FFFFFFF);
#ifdef PSXMEM_LOG
PSXMEM_LOG("err lh %8.8lx\n", mem);
#endif
return 0;
}
}
@ -565,9 +551,7 @@ u32 psxMemRead32(u32 mem) {
ret = psxHu32(mem);
break;
}
#ifdef SIF_LOG
SIF_LOG("Sif reg read %x value %x\n", mem, ret);
#endif
SIF_LOG("Sif reg read %x value %x\n", mem, ret);
return ret;
}
return *(u32 *)(p + (mem & 0xffff));
@ -614,9 +598,7 @@ void psxMemWrite8(u32 mem, u8 value) {
if (t == 0x1000) {
DEV9write8(mem & 0x1fffffff, value); return;
}
#ifdef PSXMEM_LOG
PSXMEM_LOG("err sb %8.8lx = %x\n", mem, value);
#endif
}
}
}
@ -673,9 +655,7 @@ void psxMemWrite16(u32 mem, u16 value) {
if (t == 0x1000) {
DEV9write16(mem & 0x1fffffff, value); return;
}
#ifdef PSXMEM_LOG
PSXMEM_LOG("err sh %8.8lx = %x\n", mem, value);
#endif
}
}
}
@ -700,9 +680,7 @@ void psxMemWrite32(u32 mem, u32 value) {
} else {
if (mem != 0xfffe0130) {
if (t == 0x1d00) {
#ifdef MEM_LOG
MEM_LOG("iop Sif reg write %x value %x\n", mem, value);
#endif
MEM_LOG("iop Sif reg write %x value %x\n", mem, value);
switch (mem & 0xf0) {
case 0x10:
// write to ps2 mem
@ -765,9 +743,7 @@ void psxMemWrite32(u32 mem, u32 value) {
memset(psxMemWLUT + 0x0000, 0, 0x80 * sizeof(uptr));
memset(psxMemWLUT + 0x8000, 0, 0x80 * sizeof(uptr));
memset(psxMemWLUT + 0xa000, 0, 0x80 * sizeof(uptr));
#ifdef PSXMEM_LOG
// PSXMEM_LOG("writectrl: writenot ok\n");
#endif
//PSXMEM_LOG("writectrl: writenot ok\n");
break;
case 0x1e988:
case 0x1edd8:
@ -776,14 +752,10 @@ void psxMemWrite32(u32 mem, u32 value) {
for (i=0; i<0x0080; i++) psxMemWLUT[i + 0x0000] = (uptr)&psxM[(i & 0x1f) << 16];
for (i=0; i<0x0080; i++) psxMemWLUT[i + 0x8000] = (uptr)&psxM[(i & 0x1f) << 16];
for (i=0; i<0x0080; i++) psxMemWLUT[i + 0xa000] = (uptr)&psxM[(i & 0x1f) << 16];
#ifdef PSXMEM_LOG
// PSXMEM_LOG("writectrl: write ok\n");
#endif
//PSXMEM_LOG("writectrl: write ok\n");
break;
default:
#ifdef PSXMEM_LOG
PSXMEM_LOG("unk %8.8lx = %x\n", mem, value);
#endif
break;
}
}

29
pcsx2/PsxSio2.c
View File

@ -59,16 +59,14 @@ void sio2Reset() {
}
u32 sio2_getRecv1() {
#ifdef PAD_LOG
PAD_LOG("Reading Recv1 = %x\n",sio2.packet.recvVal1);
#endif
return sio2.packet.recvVal1;
}
u32 sio2_getRecv2() {
#ifdef PAD_LOG
PAD_LOG("Reading Recv2 = %x\n",0xF);
#endif
return 0xf;
}//0, 0x10, 0x20, 0x10 | 0x20; bits 4 & 5
@ -76,17 +74,17 @@ u32 sio2_getRecv3() {
if(sio2.packet.recvVal3 == 0x8C || sio2.packet.recvVal3 == 0x8b ||
sio2.packet.recvVal3 == 0x83)
{
#ifdef PAD_LOG
PAD_LOG("Reading Recv3 = %x\n",sio2.packet.recvVal3);
#endif
sio.packetsize = sio2.packet.recvVal3;
sio2.packet.recvVal3 = 0; // Reset
return sio.packetsize;
}else{
#ifdef PAD_LOG
}
else
{
PAD_LOG("Reading Recv3 = %x\n",sio.packetsize << 16);
#endif
return sio.packetsize << 16;
return sio.packetsize << 16;
}
}
@ -153,9 +151,8 @@ void sio2_serialIn(u8 value){
ctrl |= (sio2.packet.sendArray3[sio2.cmdport] & 1) << 13;
//sioWriteCtrl16(SIO_RESET);
sioWriteCtrl16(ctrl);
#ifdef PSXDMA_LOG
PSXDMA_LOG("sio2_fifoIn: ctrl = %x, cmdlength = %x, cmdport = %d (%x)\n", ctrl, sio2.cmdlength, sio2.cmdport, sio2.packet.sendArray3[sio2.cmdport]);
#endif
sio2.cmdport++;
}
@ -181,9 +178,8 @@ void sio2_fifoIn(u8 value){
ctrl |= (sio2.packet.sendArray3[sio2.cmdport] & 1) << 13;
//sioWriteCtrl16(SIO_RESET);
sioWriteCtrl16(ctrl);
#ifdef PSXDMA_LOG
PSXDMA_LOG("sio2_fifoIn: ctrl = %x, cmdlength = %x, cmdport = %d (%x)\n", ctrl, sio2.cmdlength, sio2.cmdport, sio2.packet.sendArray3[sio2.cmdport]);
#endif
sio2.cmdport++;
}
@ -215,9 +211,7 @@ u8 sio2_fifoOut(){
void psxDma11(u32 madr, u32 bcr, u32 chcr) {
unsigned int i, j;
int size = (bcr >> 16) * (bcr & 0xffff);
#ifdef PSXDMA_LOG
PSXDMA_LOG("*** DMA 11 - SIO2 in *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
#endif
if (chcr != 0x01000201) return;
@ -250,9 +244,8 @@ void psxDMA11Interrupt()
void psxDma12(u32 madr, u32 bcr, u32 chcr) {
int size = bcr;
#ifdef PSXDMA_LOG
PSXDMA_LOG("*** DMA 12 - SIO2 out *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
#endif
if (chcr != 0x41000200) return;

6
pcsx2/R3000A.c
View File

@ -131,9 +131,8 @@ void psxException(u32 code, u32 bd) {
biosB0[call]();
break;
case 0xc0:
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("Bios call c0: %s (%x) %x,%x,%x,%x\n", biosC0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3);
#endif
if (biosC0[call])
biosC0[call]();
break;
@ -232,9 +231,8 @@ void psxBranchTest()
void psxExecuteBios() {
/* while (psxRegs.pc != 0x80030000)
psxCpu->ExecuteBlock();
#ifdef PSX_LOG
PSX_LOG("*BIOS END*\n");
#endif*/
*/
}
void psxRestartCPU()

30
pcsx2/SPR.c
View File

@ -29,9 +29,7 @@ void sprInit() {
//__inline static void SPR0transfer(u32 *data, int size) {
///* while (size > 0) {
//#ifdef SPR_LOG
// SPR_LOG("SPR1transfer: %x\n", *data);
//#endif
// data++; size--;
// }*/
// size <<= 2;
@ -105,10 +103,9 @@ void _SPR0interleave() {
u32 *pMem;
if(tqwc == 0) tqwc = qwc;
//SysPrintf("dmaSPR0 interleave\n");
#ifdef SPR_LOG
SPR_LOG("SPR0 interleave size=%d, tqwc=%d, sqwc=%d, addr=%lx sadr=%lx\n",
spr0->qwc, tqwc, sqwc, spr0->madr, spr0->sadr);
#endif
while (qwc > 0) {
spr0->qwc = min(tqwc, qwc); qwc-= spr0->qwc;
pMem = (u32*)dmaGetAddr(spr0->madr);
@ -176,10 +173,9 @@ void _dmaSPR0() {
spr0->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag
spr0->madr = ptag[1]; //MADR = ADDR field
#ifdef SPR_LOG
SPR_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx\n",
ptag[1], ptag[0], spr0->qwc, id, spr0->madr);
#endif
if ((psHu32(DMAC_CTRL) & 0x30) == 0x20) { // STS == fromSPR
SysPrintf("SPR stall control\n");
}
@ -206,9 +202,8 @@ void _dmaSPR0() {
/* if (spr0->chcr & 0x80 && ptag[0] >> 31) {
#ifdef SPR_LOG
SPR_LOG("dmaIrq Set\n");
#endif
spr0->chcr&= ~0x100;
hwDmacIrq(8);
return;
@ -235,10 +230,9 @@ extern void mfifoGIFtransfer(int);
void dmaSPR0() { // fromSPR
int qwc = spr0->qwc;
FreezeMMXRegs(1);
#ifdef SPR_LOG
SPR_LOG("dmaSPR0 chcr = %lx, madr = %lx, qwc = %lx, sadr = %lx\n",
spr0->chcr, spr0->madr, spr0->qwc, spr0->sadr);
#endif
_dmaSPR0();
FreezeMMXRegs(0);
@ -262,9 +256,7 @@ __inline static void SPR1transfer(u32 *data, int size) {
/* {
int i;
for (i=0; i<size; i++) {
#ifdef SPR_LOG
SPR_LOG( "SPR1transfer[0x%x]: 0x%x\n", (spr1->sadr+i*4) & 0x3fff, data[i] );
#endif
}
}*/
//Cpu->Clear(spr1->sadr, size); // why?
@ -299,11 +291,9 @@ void _SPR1interleave() {
int cycles = 0;
u32 *pMem;
if(tqwc == 0) tqwc = qwc;
#ifdef SPR_LOG
SPR_LOG("SPR1 interleave size=%d, tqwc=%d, sqwc=%d, addr=%lx sadr=%lx\n",
spr1->qwc, tqwc, sqwc, spr1->madr, spr1->sadr);
#endif
while (qwc > 0) {
spr1->qwc = min(tqwc, qwc); qwc-= spr1->qwc;
pMem = (u32*)dmaGetAddr(spr1->madr);
@ -373,27 +363,19 @@ void dmaSPR1() { // toSPR
// Transfer dma tag if tte is set
if (spr1->chcr & 0x40) {
#ifdef SPR_LOG
SPR_LOG("SPR TTE: %x_%x\n", ptag[3], ptag[2]);
#endif
SPR1transfer(ptag, 4); //Transfer Tag
}
#ifdef SPR_LOG
SPR_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx\n",
ptag[1], ptag[0], spr1->qwc, id, spr1->madr);
#endif
done = hwDmacSrcChain(spr1, id);
SPR1chain(); //Transfers the data set by the switch
if (spr1->chcr & 0x80 && ptag[0] >> 31) { //Check TIE bit of CHCR and IRQ bit of tag
#ifdef SPR_LOG
SPR_LOG("dmaIrq Set\n");
#endif
//SysPrintf("SPR1 TIE\n");
spr1->qwc = 0;
break;

58
pcsx2/Sio.c
View File

@ -92,17 +92,12 @@ unsigned char sioRead8() {
}*/
}
}
#ifdef PAD_LOG
//PAD_LOG("sio read8 ;ret = %x\n", ret);
#endif
return ret;
}
void SIO_CommandWrite(u8 value,int way) {
#ifdef PAD_LOG
PAD_LOG("sio write8 %x\n", value);
#endif
// PAD COMMANDS
switch (sio.padst) {
@ -147,9 +142,8 @@ void SIO_CommandWrite(u8 value,int way) {
sio.parp = 1;
switch (value) {
case 0x11: // RESET
#ifdef PAD_LOG
PAD_LOG("RESET MEMORY CARD\n");
#endif
sio.bufcount = 8;
memset(sio.buf, 0xFF, 256);
sio.buf[3] = sio.terminator;
@ -165,9 +159,7 @@ void SIO_CommandWrite(u8 value,int way) {
sio.mcdst = 99;
sio2.packet.recvVal3 = 0x8c;
#ifdef MEMCARDS_LOG
MEMCARDS_LOG("MC(%d) command 0x%02X\n", ((sio.CtrlReg&0x2000)>>13)+1, value);
#endif
break;
case 0x81: // COMMIT
sio.bufcount = 8;
@ -181,9 +173,7 @@ void SIO_CommandWrite(u8 value,int way) {
sio2.packet.recvVal1 = 0x1600; // Writing
else if(sio.mc_command==0x43) sio2.packet.recvVal1 = 0x1700; // Reading
}
#ifdef MEMCARDS_LOG
MEMCARDS_LOG("MC(%d) command 0x%02X\n", ((sio.CtrlReg&0x2000)>>13)+1, value);
#endif
break;
case 0x21:
case 0x22:
@ -193,10 +183,7 @@ void SIO_CommandWrite(u8 value,int way) {
sio2.packet.recvVal3 = 0x8c;
sio.buf[8]=sio.terminator;
sio.buf[7]='+';
#ifdef MEMCARDS_LOG
MEMCARDS_LOG("MC(%d) command 0x%02X\n", ((sio.CtrlReg&0x2000)>>13)+1, value);
#endif
break;
case 0x24: break;
case 0x25: break;
@ -205,9 +192,7 @@ void SIO_CommandWrite(u8 value,int way) {
memset(sio.buf, 0xFF, 256);
memcpy(&sio.buf[2], &mc_command_0x26, sizeof(mc_command_0x26));
sio.buf[12]=sio.terminator;
#ifdef MEMCARDS_LOG
MEMCARDS_LOG("MC(%d) command 0x%02X\n", ((sio.CtrlReg&0x2000)>>13)+1, value);
#endif
break;
case 0x27:
case 0x28:
@ -216,9 +201,7 @@ void SIO_CommandWrite(u8 value,int way) {
memset(sio.buf, 0xFF, 256);
sio.buf[4]=sio.terminator;
sio.buf[3]='+';
#ifdef MEMCARDS_LOG
MEMCARDS_LOG("MC(%d) command 0x%02X\n", ((sio.CtrlReg&0x2000)>>13)+1, value);
#endif
break;
case 0x42: // WRITE
case 0x43: // READ
@ -231,17 +214,13 @@ void SIO_CommandWrite(u8 value,int way) {
memset(sio.buf, 0xFF, 256);
sio.buf[133]=sio.terminator;
sio.buf[132]='+';
#ifdef MEMCARDS_LOG
MEMCARDS_LOG("MC(%d) command 0x%02X\n", ((sio.CtrlReg&0x2000)>>13)+1, value);
#endif
break;
case 0xf0:
case 0xf1:
case 0xf2:
sio.mcdst = 99;
#ifdef MEMCARDS_LOG
MEMCARDS_LOG("MC(%d) command 0x%02X\n", ((sio.CtrlReg&0x2000)>>13)+1, value);
#endif
break;
case 0xf3:
case 0xf7:
@ -249,31 +228,23 @@ void SIO_CommandWrite(u8 value,int way) {
memset(sio.buf, 0xFF, 256);
sio.buf[4]=sio.terminator;
sio.buf[3]='+';
#ifdef MEMCARDS_LOG
MEMCARDS_LOG("MC(%d) command 0x%02X\n", ((sio.CtrlReg&0x2000)>>13)+1, value);
#endif
break;
case 0x52:
sio.rdwr = 1; memset(sio.buf, 0xFF, 256);
sio.buf[sio.bufcount]=sio.terminator; sio.buf[sio.bufcount-1]='+';
#ifdef MEMCARDS_LOG
MEMCARDS_LOG("MC(%d) command 0x%02X\n", ((sio.CtrlReg&0x2000)>>13)+1, value);
#endif
break;
case 0x57:
sio.rdwr = 2; memset(sio.buf, 0xFF, 256);
sio.buf[sio.bufcount]=sio.terminator; sio.buf[sio.bufcount-1]='+';
#ifdef MEMCARDS_LOG
MEMCARDS_LOG("MC(%d) command 0x%02X\n", ((sio.CtrlReg&0x2000)>>13)+1, value);
#endif
break;
default:
sio.mcdst = 0;
memset(sio.buf, 0xFF, 256);
sio.buf[sio.bufcount]=sio.terminator; sio.buf[sio.bufcount-1]='+';
#ifdef MEMCARDS_LOG
MEMCARDS_LOG("Unknown MC(%d) command 0x%02X\n", ((sio.CtrlReg&0x2000)>>13)+1, value);
#endif
}
sio.mc_command=value;
return;
@ -295,10 +266,8 @@ void SIO_CommandWrite(u8 value,int way) {
if (sio.parp==5)sio.sector|=(value & 0xFF)<<24;
if (sio.parp==6)
{
#ifdef MEMCARDS_LOG
MEMCARDS_LOG("MC(%d) SET PAGE sio.sector 0x%04X\n",
MEMCARDS_LOG("MC(%d) SET PAGE sio.sector 0x%04X\n",
((sio.CtrlReg&0x2000)>>13)+1, sio.sector);
#endif
}
break;
@ -307,9 +276,7 @@ void SIO_CommandWrite(u8 value,int way) {
if(sio.parp==2) {
sio.terminator = value;
sio.buf[4] = value;
#ifdef MEMCARDS_LOG
MEMCARDS_LOG("MC(%d) SET TERMINATOR command 0x%02X\n", ((sio.CtrlReg&0x2000)>>13)+1, value);
#endif
}
break;
@ -323,9 +290,7 @@ void SIO_CommandWrite(u8 value,int way) {
if(value == 0) sio.buf[4] = 0xFF;
else sio.buf[4] = 0x55;
#ifdef MEMCARDS_LOG
MEMCARDS_LOG("MC(%d) GET TERMINATOR command 0x%02X\n", ((sio.CtrlReg&0x2000)>>13)+1, value);
#endif
}
break;
// WRITE DATA
@ -335,15 +300,12 @@ void SIO_CommandWrite(u8 value,int way) {
memset(sio.buf, 0xFF, 256);
sio.buf[sio.bufcount-1]='+';
sio.buf[sio.bufcount]=sio.terminator;
#ifdef MEMCARDS_LOG
MEMCARDS_LOG("MC(%d) WRITE command 0x%02X\n\n\n\n\n", ((sio.CtrlReg&0x2000)>>13)+1, value);
#endif
} else
}
else
if ((sio.parp>2) && (sio.parp<sio.bufcount-2)) {
sio.buf[sio.parp]=value;
#ifdef MEMCARDS_LOG
//MEMCARDS_LOG("MC(%d) WRITING 0x%02X\n", ((sio.CtrlReg&0x2000)>>13)+1, value);
#endif
} else
if (sio.parp==sio.bufcount-2) {
if (sio_xor(&sio.buf[3], sio.bufcount-5)==value) {
@ -351,10 +313,8 @@ void SIO_CommandWrite(u8 value,int way) {
sio.buf[sio.bufcount-1]=value;
sio.k+=sio.bufcount-5;
}else {
#ifdef MEMCARDS_LOG
MEMCARDS_LOG("MC(%d) write XOR value error 0x%02X != ^0x%02X\n",
((sio.CtrlReg&0x2000)>>13)+1, value, sio_xor(&sio.buf[3], sio.bufcount-5));
#endif
}
}
break;
@ -364,9 +324,7 @@ void SIO_CommandWrite(u8 value,int way) {
//int i;
sio.bufcount=value+5;
sio.buf[3]='+';
#ifdef MEMCARDS_LOG
MEMCARDS_LOG("MC(%d) READ command 0x%02X\n", ((sio.CtrlReg&0x2000)>>13)+1, value);
#endif
_ReadMcd(&sio.buf[4], (512+16)*sio.sector+sio.k, value);
if(sio.mode==2)
{
@ -392,18 +350,14 @@ void SIO_CommandWrite(u8 value,int way) {
sio.buf[2]='+';
*/ sio.buf[3]=sio.terminator;
//sio.buf[sio.bufcount] = sio.terminator;
#ifdef MEMCARDS_LOG
MEMCARDS_LOG("MC(%d) INTERNAL ERASE command 0x%02X\n", ((sio.CtrlReg&0x2000)>>13)+1, value);
#endif
}
break;
// CARD AUTHENTICATION CHECKS
case 0xF0:
if (sio.parp==2)
{
#ifdef MEMCARDS_LOG
MEMCARDS_LOG("MC(%d) CARD AUTH :0x%02X\n", ((sio.CtrlReg&0x2000)>>13)+1, value);
#endif
switch(value){
case 1:
case 2:
@ -518,9 +472,7 @@ void InitializeSIO(u8 value)
sio2.packet.recvVal1 = 0x1100; // Memcards are present
sio.count = 0;
SIO_INT();
#ifdef PAD_LOG
PAD_LOG("START MEMORY CARD\n");
#endif
return;
}
}
@ -546,9 +498,7 @@ void sioWriteCtrl16(unsigned short value) {
}
void sioInterrupt() {
#ifdef PAD_LOG
PAD_LOG("Sio Interrupt\n");
#endif
sio.StatReg|= IRQ;
psxHu32(0x1070)|=0x80;
psxRegs.interrupt&= ~(1 << 16);

4
pcsx2/VU0.c
View File

@ -51,9 +51,7 @@
PCSX2_ALIGNED16(VURegs VU0);
void COP2() {
#ifdef VU0_LOG
VU0_LOG("%s\n", disR5900Fasm(cpuRegs.code, cpuRegs.pc));
#endif
Int_COP2PrintTable[_Rs_]();
}
@ -66,9 +64,7 @@ void COP2_SPECIAL2() {
void COP2_Unknown()
{
#ifdef CPU_LOG
CPU_LOG("Unknown COP2 opcode called\n");
#endif
}
void LQC2() {

11
pcsx2/VU0micro.c
View File

@ -197,9 +197,8 @@ void VU0MI_XTOP() {
}
void vu0ExecMicro(u32 addr) {
#ifdef VUM_LOG
VUM_LOG("vu0ExecMicro %x\n", addr);
#endif
if(VU0.VI[REG_VPU_STAT].UL & 0x1) {
SysPrintf("Previous Microprogram still running on VU0\n");
vu0Finish();
@ -240,7 +239,7 @@ void _vu0Exec(VURegs* VU) {
int discard=0;
if(VU0.VI[REG_TPC].UL >= VU0.maxmicro){
#ifdef CPU_LOG
#ifdef CPU_LOG
SysPrintf("VU0 memory overflow!!: %x\n", VU->VI[REG_TPC].UL);
#endif
VU0.VI[REG_VPU_STAT].UL&= ~0x1;
@ -387,16 +386,14 @@ _vuRegsTables(VU0, VU0regs);
void VU0unknown() {
assert(0);
#ifdef CPU_LOG
CPU_LOG("Unknown VU micromode opcode called\n");
#endif
}
void VU0regsunknown(_VURegsNum *VUregsn) {
assert(0);
#ifdef CPU_LOG
CPU_LOG("Unknown VU micromode opcode called\n");
#endif
}

12
pcsx2/VU1micro.c
View File

@ -152,10 +152,9 @@ void vu1ExecMicro(u32 addr)
} while(VU0.VI[REG_VPU_STAT].UL & 0x100);
}
}
#ifdef VUM_LOG
VUM_LOG("vu1ExecMicro %x\n", addr);
VUM_LOG("vu1ExecMicro %x (count=%d)\n", addr, count++);
#endif
VU0.VI[REG_VPU_STAT].UL|= 0x100;
VU0.VI[REG_VPU_STAT].UL&= ~0x7E000;
vif1Regs->stat|= 0x4;
@ -227,11 +226,9 @@ void _vu1Exec(VURegs* VU) {
}
}
#ifdef VUM_LOG
if (Log) {
VUM_LOG("VU->cycle = %d (flags st=%x;mac=%x;clip=%x,q=%f)\n", VU->cycle, VU->statusflag, VU->macflag, VU->clipflag, VU->q.F);
}
#endif
VU->code = ptr[1];
VU1regs_UPPER_OPCODE[VU->code & 0x3f](&uregs);
@ -321,9 +318,8 @@ void _vu1Exec(VURegs* VU) {
void vu1Exec(VURegs* VU) {
if (VU->VI[REG_TPC].UL >= VU->maxmicro) {
#ifdef CPU_LOG
SysPrintf("VU1 memory overflow!!: %x\n", VU->VI[REG_TPC].UL);
#endif
VU0.VI[REG_VPU_STAT].UL&= ~0x100;
} else {
_vu1Exec(VU);
@ -343,16 +339,12 @@ _vuRegsTables(VU1, VU1regs);
void VU1unknown(_VURegsNum *VUregsn) {
//assert(0);
#ifdef CPU_LOG
CPU_LOG("Unknown VU micromode opcode called\n");
#endif
}
void VU1regsunknown(_VURegsNum *VUregsn) {
//assert(0);
#ifdef CPU_LOG
CPU_LOG("Unknown VU micromode opcode called\n");
#endif
}

36
pcsx2/VUops.c
View File

@ -56,9 +56,8 @@ void _vuFMACflush(VURegs * VU) {
if (VU->fmac[i].enable == 0) continue;
if ((VU->cycle - VU->fmac[i].sCycle) >= VU->fmac[i].Cycle) {
#ifdef VUM_LOG
if (Log) { VUM_LOG("flushing FMAC pipe[%d] (macflag=%x)\n", i, VU->fmac[i].macflag); }
#endif
VU->fmac[i].enable = 0;
VU->VI[REG_MAC_FLAG].UL = VU->fmac[i].macflag;
VU->VI[REG_STATUS_FLAG].UL = VU->fmac[i].statusflag;
@ -71,9 +70,8 @@ void _vuFDIVflush(VURegs * VU) {
if (VU->fdiv.enable == 0) return;
if ((VU->cycle - VU->fdiv.sCycle) >= VU->fdiv.Cycle) {
#ifdef VUM_LOG
if (Log) { VUM_LOG("flushing FDIV pipe\n"); }
#endif
VU->fdiv.enable = 0;
VU->VI[REG_Q].UL = VU->fdiv.reg.UL;
VU->VI[REG_STATUS_FLAG].UL = VU->fdiv.statusflag;
@ -84,9 +82,8 @@ void _vuEFUflush(VURegs * VU) {
if (VU->efu.enable == 0) return;
if ((VU->cycle - VU->efu.sCycle) >= VU->efu.Cycle) {
#ifdef VUM_LOG
// if (Log) { VUM_LOG("flushing EFU pipe\n"); }
#endif
VU->efu.enable = 0;
VU->VI[REG_P].UL = VU->efu.reg.UL;
}
@ -106,9 +103,8 @@ void _vuFlushAll(VURegs* VU)
nRepeat = 1;
if ((VU->cycle - VU->fmac[i].sCycle) >= VU->fmac[i].Cycle) {
#ifdef VUM_LOG
if (Log) { VUM_LOG("flushing FMAC pipe[%d] (macflag=%x)\n", i, VU->fmac[i].macflag); }
#endif
VU->fmac[i].enable = 0;
VU->VI[REG_MAC_FLAG].UL = VU->fmac[i].macflag;
VU->VI[REG_STATUS_FLAG].UL = VU->fmac[i].statusflag;
@ -121,9 +117,8 @@ void _vuFlushAll(VURegs* VU)
nRepeat = 1;
if ((VU->cycle - VU->fdiv.sCycle) >= VU->fdiv.Cycle) {
#ifdef VUM_LOG
if (Log) { VUM_LOG("flushing FDIV pipe\n"); }
#endif
nRepeat = 1;
VU->fdiv.enable = 0;
VU->VI[REG_Q].UL = VU->fdiv.reg.UL;
@ -136,9 +131,8 @@ void _vuFlushAll(VURegs* VU)
nRepeat = 1;
if ((VU->cycle - VU->efu.sCycle) >= VU->efu.Cycle) {
#ifdef VUM_LOG
// if (Log) { VUM_LOG("flushing EFU pipe\n"); }
#endif
nRepeat = 1;
VU->efu.enable = 0;
VU->VI[REG_P].UL = VU->efu.reg.UL;
@ -173,9 +167,8 @@ void _vuFMACTestStall(VURegs * VU, int reg, int xyzw) {
VU->VI[REG_MAC_FLAG].UL = VU->fmac[i].macflag;
VU->VI[REG_STATUS_FLAG].UL = VU->fmac[i].statusflag;
VU->VI[REG_CLIP_FLAG].UL = VU->fmac[i].clipflag;
#ifdef VUM_LOG
if (Log) { VUM_LOG("FMAC[%d] stall %d\n", i, cycle); }
#endif
VU->cycle+= cycle;
_vuTestPipes(VU);
}
@ -192,9 +185,8 @@ void _vuFMACAdd(VURegs * VU, int reg, int xyzw) {
// SysPrintf("*PCSX2*: error , out of fmacs %d\n", VU->cycle);
}
#ifdef VUM_LOG
if (Log) { VUM_LOG("adding FMAC pipe[%d]; xyzw=%x\n", i, xyzw); }
#endif
VU->fmac[i].enable = 1;
VU->fmac[i].sCycle = VU->cycle;
VU->fmac[i].Cycle = 3;
@ -206,9 +198,8 @@ void _vuFMACAdd(VURegs * VU, int reg, int xyzw) {
}
void _vuFDIVAdd(VURegs * VU, int cycles) {
#ifdef VUM_LOG
if (Log) { VUM_LOG("adding FDIV pipe\n"); }
#endif
VU->fdiv.enable = 1;
VU->fdiv.sCycle = VU->cycle;
VU->fdiv.Cycle = cycles;
@ -217,9 +208,8 @@ void _vuFDIVAdd(VURegs * VU, int cycles) {
}
void _vuEFUAdd(VURegs * VU, int cycles) {
#ifdef VUM_LOG
// if (Log) { VUM_LOG("adding EFU pipe\n"); }
#endif
VU->efu.enable = 1;
VU->efu.sCycle = VU->cycle;
VU->efu.Cycle = cycles;
@ -232,9 +222,8 @@ void _vuFlushFDIV(VURegs * VU) {
if (VU->fdiv.enable == 0) return;
cycle = VU->fdiv.Cycle - (VU->cycle - VU->fdiv.sCycle);
#ifdef VUM_LOG
if (Log) { VUM_LOG("waiting FDIV pipe %d\n", cycle); }
#endif
VU->fdiv.enable = 0;
VU->cycle+= cycle;
VU->VI[REG_Q].UL = VU->fdiv.reg.UL;
@ -247,9 +236,8 @@ void _vuFlushEFU(VURegs * VU) {
if (VU->efu.enable == 0) return;
cycle = VU->efu.Cycle - (VU->cycle - VU->efu.sCycle);
#ifdef VUM_LOG
// if (Log) { VUM_LOG("waiting EFU pipe %d\n", cycle); }
#endif
VU->efu.enable = 0;
VU->cycle+= cycle;
VU->VI[REG_P].UL = VU->efu.reg.UL;

54
pcsx2/Vif.c
View File

@ -92,9 +92,7 @@ static void writeX( u32 *dest, u32 data ) {
}
break;
}
/*#ifdef VIF_LOG
VIF_LOG("writeX %8.8x : Mode %d, r0 = %x, data %8.8x\n", *dest,_vifRegs->mode,_vifRegs->r0,data);
#endif*/
// VIF_LOG("writeX %8.8x : Mode %d, r0 = %x, data %8.8x\n", *dest,_vifRegs->mode,_vifRegs->r0,data);
}
static void writeY( u32 *dest, u32 data ) {
@ -133,9 +131,7 @@ static void writeY( u32 *dest, u32 data ) {
}
break;
}
/*#ifdef VIF_LOG
VIF_LOG("writeY %8.8x : Mode %d, r1 = %x, data %8.8x\n", *dest,_vifRegs->mode,_vifRegs->r1,data);
#endif*/
// VIF_LOG("writeY %8.8x : Mode %d, r1 = %x, data %8.8x\n", *dest,_vifRegs->mode,_vifRegs->r1,data);
}
static void writeZ( u32 *dest, u32 data ) {
@ -174,9 +170,7 @@ static void writeZ( u32 *dest, u32 data ) {
}
break;
}
/*#ifdef VIF_LOG
VIF_LOG("writeZ %8.8x : Mode %d, r2 = %x, data %8.8x\n", *dest,_vifRegs->mode,_vifRegs->r2,data);
#endif*/
// VIF_LOG("writeZ %8.8x : Mode %d, r2 = %x, data %8.8x\n", *dest,_vifRegs->mode,_vifRegs->r2,data);
}
static void writeW( u32 *dest, u32 data ) {
@ -215,9 +209,7 @@ static void writeW( u32 *dest, u32 data ) {
}
break;
}
/*#ifdef VIF_LOG
VIF_LOG("writeW %8.8x : Mode %d, r3 = %x, data %8.8x\n", *dest,_vifRegs->mode,_vifRegs->r3,data);
#endif*/
// VIF_LOG("writeW %8.8x : Mode %d, r3 = %x, data %8.8x\n", *dest,_vifRegs->mode,_vifRegs->r3,data);
}
void UNPACK_S_32(u32 *dest, u32 *data, int size) {
@ -418,16 +410,16 @@ __inline int mfifoVIF1rbTransfer() {
/* Check if the transfer should wrap around the ring buffer */
if ((vif1ch->madr+(mfifoqwc << 4)) > (msize)) {
int s1 = ((msize) - vif1ch->madr) >> 2;
SPR_LOG("Split MFIFO\n");
#ifdef SPR_LOG
SPR_LOG("Split MFIFO\n");
#endif
/* it does, so first copy 's1' bytes from 'addr' to 'data' */
src = (u32*)PSM(vif1ch->madr);
if (src == NULL) return -1;
if(vif1.vifstalled == 1){
ret = VIF1transfer(src+vif1.irqoffset, s1-vif1.irqoffset, 0);
}else
}
else
ret = VIF1transfer(src, s1, 0);
if(ret == -2) return ret;
@ -437,10 +429,10 @@ __inline int mfifoVIF1rbTransfer() {
src = (u32*)PSM(maddr);
if (src == NULL) return -1;
ret = VIF1transfer(src, ((mfifoqwc << 2) - s1), 0);
} else {
#ifdef SPR_LOG
SPR_LOG("Direct MFIFO\n");
#endif
} else
{
SPR_LOG("Direct MFIFO\n");
/* it doesn't, so just transfer 'qwc*4' words */
src = (u32*)PSM(vif1ch->madr);
if (src == NULL) return -1;
@ -469,9 +461,8 @@ __inline int mfifoVIF1chain() {
vifqwc -= startqwc - vif1ch->qwc;
} else {
u32 *pMem = (u32*)dmaGetAddr(vif1ch->madr);
#ifdef SPR_LOG
SPR_LOG("Non-MFIFO Location\n");
#endif
if (pMem == NULL) return -1;
if(vif1.vifstalled == 1){
ret = VIF1transfer(pMem+vif1.irqoffset, vif1ch->qwc*4-vif1.irqoffset, 0);
@ -493,9 +484,7 @@ void mfifoVIF1transfer(int qwc) {
if(qwc > 0){
vifqwc += qwc;
#ifdef SPR_LOG
SPR_LOG("Added %x qw to mfifo, total now %x\n", qwc, vifqwc);
#endif
if((vif1ch->chcr & 0x100) == 0 || vif1.vifstalled == 1) return;
}
@ -517,9 +506,8 @@ void mfifoVIF1transfer(int qwc) {
if( vif1.stallontag == 1) ret = VIF1transfer(ptag+(2+vif1.irqoffset), 2-vif1.irqoffset, 1); //Transfer Tag on Stall
else ret = VIF1transfer(ptag+2, 2, 1); //Transfer Tag
if (ret == -2) {
#ifdef SPR_LOG
VIF_LOG("MFIFO Stallon tag\n");
#endif
vif1.stallontag = 1;
CPU_INT(10,cycles+g_vifCycles);
return; //IRQ set by VIFTransfer
@ -533,10 +521,8 @@ void mfifoVIF1transfer(int qwc) {
vif1ch->chcr = ( vif1ch->chcr & 0xFFFF ) | ( (*ptag) & 0xFFFF0000 );
#ifdef SPR_LOG
SPR_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx mfifo qwc = %x spr0 madr = %x\n",
ptag[1], ptag[0], vif1ch->qwc, id, vif1ch->madr, vif1ch->tadr, vifqwc, spr0->madr);
#endif
vifqwc--;
switch (id) {
@ -573,9 +559,7 @@ void mfifoVIF1transfer(int qwc) {
}
if ((vif1ch->chcr & 0x80) && (ptag[0] >> 31)) {
#ifdef SPR_LOG
VIF_LOG("dmaIrq Set\n");
#endif
vif1.done = 2;
}
}
@ -587,21 +571,14 @@ void mfifoVIF1transfer(int qwc) {
CPU_INT(10,g_vifCycles);
}
if(ret == -2){
#ifdef VIF_LOG
VIF_LOG("MFIFO Stall\n");
#endif
CPU_INT(10,g_vifCycles);
return;
}
if(vif1.done == 2 && vif1ch->qwc == 0) vif1.done = 1;
CPU_INT(10,g_vifCycles);
#ifdef SPR_LOG
SPR_LOG("mfifoVIF1transfer end %x madr %x, tadr %x vifqwc %x\n", vif1ch->chcr, vif1ch->madr, vif1ch->tadr, vifqwc);
#endif
}
void vifMFIFOInterrupt()
@ -636,9 +613,8 @@ void vifMFIFOInterrupt()
vif1.done = 0;
vif1ch->chcr &= ~0x100;
hwDmacIrq(DMAC_VIF1);
#ifdef VIF_LOG
VIF_LOG("vif mfifo dma end\n");
#endif
vif1Regs->stat&= ~0x1F000000; // FQC=0
// }
cpuRegs.interrupt &= ~(1 << 10);

90
pcsx2/VifDma.c
View File

@ -409,10 +409,8 @@ static void VIFunpack(u32 *data, vifCode *v, int size, const unsigned int VIFdma
dest = (u32*)(VU->Mem + v->addr);
#ifdef VIF_LOG
VIF_LOG("VIF%d UNPACK: Mode=%x, v->size=%d, size=%d, v->addr=%x\n",
VIFdmanum, v->cmd & 0xf, v->size, size, v->addr );
#endif
/* if (vifRegs->cycle.cl > vifRegs->cycle.wl) {
SysPrintf( "VIF%d UNPACK: Mode=%x, v->size=%d, size=%d, v->addr=%x\n",
@ -420,9 +418,7 @@ static void VIFunpack(u32 *data, vifCode *v, int size, const unsigned int VIFdma
}*/
#ifdef _DEBUG
if (v->size != size) {
#ifdef VIF_LOG
VIF_LOG("*PCSX2*: warning v->size != size\n");
#endif
}
if ((v->addr+size*4) > memsize) {
SysPrintf("*PCSX2*: fixme unpack overflow\n");
@ -705,9 +701,8 @@ static void VIFunpack(u32 *data, vifCode *v, int size, const unsigned int VIFdma
// s_count++;
if( size >= ft->dsize && vifRegs->num > 0) {
#ifdef VIF_LOG
VIF_LOG("warning, end with size = %d\n", size);
#endif
// SSE doesn't handle such small data
//ft = &VIFfuncTable[ unpackType ];
//func = vif->usn ? ft->funcU : ft->funcS;
@ -728,9 +723,8 @@ static void VIFunpack(u32 *data, vifCode *v, int size, const unsigned int VIFdma
}
else { /* filling write */
#ifdef VIF_LOG
VIF_LOG("*PCSX2*: filling write\n");
#endif
//ft = &VIFfuncTable[ unpackType ];
//func = vif->usn ? ft->funcU : ft->funcS;
#ifdef VIFUNPACKDEBUG
@ -904,9 +898,8 @@ static int Vif0TransNull(u32 *data){ // Shouldnt go here
static int Vif0TransSTMask(u32 *data){ // STMASK
SetNewMask(g_vif0Masks, g_vif0HasMask3, data[0], vif0Regs->mask);
vif0Regs->mask = data[0];
#ifdef VIF_LOG
VIF_LOG("STMASK == %x\n", vif0Regs->mask);
#endif
vif0.tag.size = 0;
vif0.cmd = 0;
return 1;
@ -1075,15 +1068,12 @@ int VIF0transfer(u32 *data, int size, int istag) {
int ret;
int transferred=vif0.vifstalled ? vif0.irqoffset : 0; // irqoffset necessary to add up the right qws, or else will spin (spiderman)
//vif0.irqoffset = 0;
#ifdef VIF_LOG
VIF_LOG( "VIF0transfer: size %x (vif0.cmd %x)\n", size, vif0.cmd );
#endif
vif0.stallontag = 0;
vif0.vifstalled = 0;
vif0.vifpacketsize = size;
while (vif0.vifpacketsize > 0) {
if (vif0.cmd) {
@ -1110,9 +1100,8 @@ int VIF0transfer(u32 *data, int size, int istag) {
if ((vif0.cmd & 0x60) == 0x60) {
vif0UNPACK(data);
} else {
#ifdef VIF_LOG
VIF_LOG( "VIFtransfer: cmd %x, num %x, imm %x, size %x\n", vif0.cmd, (data[0] >> 16) & 0xff, data[0] & 0xffff, size );
#endif
if((vif0.cmd & 0x7f) > 0x4A){
if ((vif0Regs->err & 0x4) == 0) { //Ignore vifcode and tag mismatch error
SysPrintf( "UNKNOWN VifCmd: %x\n", vif0.cmd );
@ -1129,9 +1118,7 @@ int VIF0transfer(u32 *data, int size, int istag) {
if ((vif0.cmd & 0x80)) { //i bit on vifcode and not masked by VIF0_ERR
if(!(vif0Regs->err & 0x1)){
#ifdef VIF_LOG
VIF_LOG( "Interrupt on VIFcmd: %x (INTC_MASK = %x)\n", vif0.cmd, psHu32(INTC_MASK) );
#endif
++vif0.irq;
if(istag && vif0.tag.size <= vif0.vifpacketsize) vif0.stallontag = 1;
@ -1216,11 +1203,9 @@ int _chainVIF0() {
vif0ch->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag
vif0ch->madr = ptag[1]; //MADR = ADDR field
g_vifCycles+=1; // Add 1 g_vifCycles from the QW read for the tag
#ifdef VIF_LOG
VIF_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx\n",
ptag[1], ptag[0], vif0ch->qwc, id, vif0ch->madr, vif0ch->tadr);
#endif
vif0ch->chcr = ( vif0ch->chcr & 0xFFFF ) | ( (*ptag) & 0xFFFF0000 ); //Transfer upper part of tag to CHCR bits 31-15
// Transfer dma tag if tte is set
@ -1237,10 +1222,8 @@ int _chainVIF0() {
vif0.done |= hwDmacSrcChainWithStack(vif0ch, id);
#ifdef VIF_LOG
VIF_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx\n",
ptag[1], ptag[0], vif0ch->qwc, id, vif0ch->madr, vif0ch->tadr);
#endif
//done |= hwDmacSrcChainWithStack(vif0ch, id);
ret = _VIF0chain(); //Transfers the data set by the switch
@ -1255,9 +1238,8 @@ int _chainVIF0() {
vif0.vifstalled = 0;
if ((vif0ch->chcr & 0x80) && (ptag[0] >> 31)) { //Check TIE bit of CHCR and IRQ bit of tag
#ifdef VIF_LOG
VIF_LOG( "dmaIrq Set\n" );
#endif
//SysPrintf("VIF0 TIE\n");
//SysPrintf( "VIF0dmaIrq Set\n" );
//vif0ch->qwc = 0;
@ -1271,9 +1253,7 @@ int _chainVIF0() {
void vif0Interrupt() {
int ret;
g_vifCycles = 0; //Reset the cycle count, Wouldnt reset on stall if put lower down.
#ifdef VIF_LOG
VIF_LOG("vif0Interrupt: %8.8x\n", cpuRegs.cycle);
#endif
//if(vif0.vifstalled == 1) {
if(vif0.irq && vif0.tag.size == 0) {
@ -1371,13 +1351,10 @@ void (*Vif0CMDTLB[75])() =
};
void dmaVIF0() {
#ifdef VIF_LOG
VIF_LOG("dmaVIF0 chcr = %lx, madr = %lx, qwc = %lx\n"
" tadr = %lx, asr0 = %lx, asr1 = %lx\n",
vif0ch->chcr, vif0ch->madr, vif0ch->qwc,
vif0ch->tadr, vif0ch->asr0, vif0ch->asr1 );
#endif
/* Check if there is a pending irq */
/*if (vif0.irq > 0) {
@ -1417,17 +1394,15 @@ void dmaVIF0() {
void vif0Write32(u32 mem, u32 value) {
if (mem == 0x10003830) { // MARK
#ifdef VIF_LOG
VIF_LOG("VIF0_MARK write32 0x%8.8x\n", value);
#endif
/* Clear mark flag in VIF0_STAT and set mark with 'value' */
vif0Regs->stat&= ~VIF0_STAT_MRK;
vif0Regs->mark = value;
} else
if (mem == 0x10003810) { // FBRST
#ifdef VIF_LOG
VIF_LOG("VIF0_FBRST write32 0x%8.8x\n", value);
#endif
if (value & 0x1) {
/* Reset VIF */
//SysPrintf("Vif0 Reset %x\n", vif0Regs->stat);
@ -1483,9 +1458,8 @@ void vif0Write32(u32 mem, u32 value) {
}
} else
if (mem == 0x10003820) { // ERR
#ifdef VIF_LOG
VIF_LOG("VIF0_ERR write32 0x%8.8x\n", value);
#endif
/* Set VIF0_ERR with 'value' */
vif0Regs->err = value;
} else{
@ -1605,9 +1579,8 @@ static int Vif1TransNull(u32 *data){ // Shouldnt go here
static int Vif1TransSTMask(u32 *data){ // STMASK
SetNewMask(g_vif1Masks, g_vif1HasMask3, data[0], vif1Regs->mask);
vif1Regs->mask = data[0];
#ifdef VIF_LOG
VIF_LOG("STMASK == %x\n", vif1Regs->mask);
#endif
vif1.tag.size = 0;
vif1.cmd = 0;
return 1;
@ -1968,10 +1941,7 @@ int VIF1transfer(u32 *data, int size, int istag) {
int ret;
transferred=vif1.vifstalled ? vif1.irqoffset : 0; // irqoffset necessary to add up the right qws, or else will spin (spiderman)
#ifdef VIF_LOG
VIF_LOG( "VIF1transfer: size %x (vif1.cmd %x)\n", size, vif1.cmd );
#endif
vif1.irqoffset = 0;
vif1.vifstalled = 0;
@ -1999,15 +1969,13 @@ int VIF1transfer(u32 *data, int size, int istag) {
vif1.cmd = (data[0] >> 24);
vif1Regs->code = data[0];
//vif1Regs->stat |= VIF1_STAT_VPS_D;
if ((vif1.cmd & 0x60) == 0x60) {
vif1UNPACK(data);
} else {
#ifdef VIF_LOG
VIF_LOG( "VIFtransfer: cmd %x, num %x, imm %x, size %x\n", vif1.cmd, (data[0] >> 16) & 0xff, data[0] & 0xffff, vif1.vifpacketsize );
#endif
//vif1CMD(data, size);
/*if((vif1.cmd & 0x7f) > 0x51){
if ((vif1Regs->err & 0x4) == 0) { //Ignore vifcode and tag mismatch error
@ -2024,9 +1992,8 @@ int VIF1transfer(u32 *data, int size, int istag) {
--vif1.vifpacketsize;
if ((vif1.cmd & 0x80)) { //i bit on vifcode and not masked by VIF1_ERR
#ifdef VIF_LOG
VIF_LOG( "Interrupt on VIFcmd: %x (INTC_MASK = %x)\n", vif1.cmd, psHu32(INTC_MASK) );
#endif
/*if((psHu32(DMAC_CTRL) & 0xC) == 0x8){
SysPrintf("VIF1 Stall on MFIFO, not implemented!\n");
}*/
@ -2077,7 +2044,6 @@ int VIF1transfer(u32 *data, int size, int istag) {
//if(vif1ch->qwc > 0 && size != 0) vif1.vifstalled = 1;
}
return 0;
}
@ -2094,10 +2060,9 @@ int _VIF1chain() {
if (pMem == NULL)
return -1;
#ifdef VIF_LOG
VIF_LOG("dmaChain size=%d, madr=%lx, tadr=%lx\n",
vif1ch->qwc, vif1ch->madr, vif1ch->tadr);
#endif
if( vif1.vifstalled ) {
ret = VIF1transfer(pMem+vif1.irqoffset, vif1ch->qwc*4-vif1.irqoffset, 0);
}
@ -2135,15 +2100,8 @@ int _chainVIF1() {
vif1ch->chcr = ( vif1ch->chcr & 0xFFFF ) | ( (*vifptag) & 0xFFFF0000 ); //Transfer upper part of tag to CHCR bits 31-15
// Transfer dma tag if tte is set
#ifdef VIF_LOG
VIF_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx\n",
vifptag[1], vifptag[0], vif1ch->qwc, id, vif1ch->madr, vif1ch->tadr);
#endif
//} else
@ -2176,10 +2134,8 @@ int _chainVIF1() {
//if((psHu32(DMAC_CTRL) & 0xC0) != 0x40 || id != 4)
vif1.done |= hwDmacSrcChainWithStack(vif1ch, id);
#ifdef VIF_LOG
VIF_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx\n",
vifptag[1], vifptag[0], vif1ch->qwc, id, vif1ch->madr, vif1ch->tadr);
#endif
//done |= hwDmacSrcChainWithStack(vif1ch, id);
ret = _VIF1chain(); //Transfers the data set by the switch
@ -2190,9 +2146,8 @@ int _chainVIF1() {
if ((vif1ch->chcr & 0x80) && (vifptag[0] >> 31)) { //Check TIE bit of CHCR and IRQ bit of tag
#ifdef VIF_LOG
VIF_LOG( "dmaIrq Set\n" );
#endif
//SysPrintf("VIF1 TIE\n");
//SysPrintf( "VIF1dmaIrq Set\n" );
//vif1ch->qwc = 0;
@ -2204,10 +2159,7 @@ int _chainVIF1() {
}
void vif1Interrupt() {
#ifdef VIF_LOG
VIF_LOG("vif1Interrupt: %8.8x\n", cpuRegs.cycle);
#endif
g_vifCycles = 0;
@ -2283,13 +2235,10 @@ extern u32 g_MTGSVifStart, g_MTGSVifCount;
#define spr0 ((DMACh*)&PS2MEM_HW[0xD000])
void dmaVIF1()
{
#ifdef VIF_LOG
VIF_LOG("dmaVIF1 chcr = %lx, madr = %lx, qwc = %lx\n"
" tadr = %lx, asr0 = %lx, asr1 = %lx\n",
vif1ch->chcr, vif1ch->madr, vif1ch->qwc,
vif1ch->tadr, vif1ch->asr0, vif1ch->asr1 );
#endif
/*if ((psHu32(DMAC_CTRL) & 0xC0)) {
SysPrintf("DMA Stall Control %x\n",(psHu32(DMAC_CTRL) & 0xC0));
@ -2449,17 +2398,15 @@ void dmaVIF1()
void vif1Write32(u32 mem, u32 value) {
if (mem == 0x10003c30) { // MARK
#ifdef VIF_LOG
VIF_LOG("VIF1_MARK write32 0x%8.8x\n", value);
#endif
/* Clear mark flag in VIF1_STAT and set mark with 'value' */
vif1Regs->stat&= ~VIF1_STAT_MRK;
vif1Regs->mark = value;
} else
if (mem == 0x10003c10) { // FBRST
#ifdef VIF_LOG
VIF_LOG("VIF1_FBRST write32 0x%8.8x\n", value);
#endif
if (value & 0x1) {
/* Reset VIF */
//SysPrintf("Vif1 Reset %x\n", vif1Regs->stat);
@ -2524,16 +2471,13 @@ void vif1Write32(u32 mem, u32 value) {
}
} else
if (mem == 0x10003c20) { // ERR
#ifdef VIF_LOG
VIF_LOG("VIF1_ERR write32 0x%8.8x\n", value);
#endif
/* Set VIF1_ERR with 'value' */
vif1Regs->err = value;
} else
if (mem == 0x10003c00) { // STAT
#ifdef VIF_LOG
VIF_LOG("VIF1_STAT write32 0x%8.8x\n", value);
#endif
#ifdef PCSX2_DEVBUILD
/* Only FDR bit is writable, so mask the rest */

15
pcsx2/x86/iGS.cpp
View File

@ -33,8 +33,6 @@
using namespace std;
extern "C" {
#include "zlib.h"
#include "Elfheader.h"
#include "Misc.h"
@ -51,7 +49,8 @@ extern "C" {
#include "Counters.h"
#include "GS.h"
#include "Common.h"
extern u32 CSRw;
}
@ -466,36 +465,28 @@ void gsConstWrite128(u32 mem, int mmreg)
int gsConstRead8(u32 x86reg, u32 mem, u32 sign)
{
#ifdef GIF_LOG
GIF_LOG("GS read 8 %8.8lx (%8.8x), at %8.8lx\n", (uptr)PS2GS_BASE(mem), mem);
#endif
_eeReadConstMem8(x86reg, (uptr)PS2GS_BASE(mem), sign);
return 0;
}
int gsConstRead16(u32 x86reg, u32 mem, u32 sign)
{
#ifdef GIF_LOG
GIF_LOG("GS read 16 %8.8lx (%8.8x), at %8.8lx\n", (uptr)PS2GS_BASE(mem), mem);
#endif
_eeReadConstMem16(x86reg, (uptr)PS2GS_BASE(mem), sign);
return 0;
}
int gsConstRead32(u32 x86reg, u32 mem)
{
#ifdef GIF_LOG
GIF_LOG("GS read 32 %8.8lx (%8.8x), at %8.8lx\n", (uptr)PS2GS_BASE(mem), mem);
#endif
_eeReadConstMem32(x86reg, (uptr)PS2GS_BASE(mem));
return 0;
}
void gsConstRead64(u32 mem, int mmreg)
{
#ifdef GIF_LOG
GIF_LOG("GS read 64 %8.8lx (%8.8x), at %8.8lx\n", (uptr)PS2GS_BASE(mem), mem);
#endif
if( IS_XMMREG(mmreg) ) SSE_MOVLPS_M64_to_XMM(mmreg&0xff, (uptr)PS2GS_BASE(mem));
else {
#ifndef __x86_64__
@ -509,9 +500,7 @@ void gsConstRead64(u32 mem, int mmreg)
void gsConstRead128(u32 mem, int xmmreg)
{
#ifdef GIF_LOG
GIF_LOG("GS read 128 %8.8lx (%8.8x), at %8.8lx\n", (uptr)PS2GS_BASE(mem), mem);
#endif
_eeReadConstMem128( xmmreg, (uptr)PS2GS_BASE(mem));
}

26
pcsx2/x86/iHw.c
View File

@ -93,9 +93,7 @@ int hwConstRead16(u32 x86reg, u32 mem, u32 sign)
#endif
#ifdef PCSX2_DEVBUILD
if( mem >= 0x10000000 && mem < 0x10002000 ){
#ifdef EECNT_LOG
EECNT_LOG("cnt read to %x\n", mem);
#endif
}
#endif
@ -295,22 +293,16 @@ int hwConstRead32(u32 x86reg, u32 mem)
iFlushCall(0);
PUSH32I(0);
CALLFunc((uptr)rcntRcount);
#ifdef EECNT_LOG
EECNT_LOG("Counter 0 count read = %x\n", rcntRcount(0));
#endif
ADD32ItoR(ESP, 4);
return 1;
case 0x10000010:
_eeReadConstMem32(x86reg, (uptr)&counters[0].mode);
#ifdef EECNT_LOG
EECNT_LOG("Counter 0 mode read = %x\n", counters[0].mode);
#endif
return 0;
case 0x10000020:
_eeReadConstMem32(x86reg, (uptr)&counters[0].target);
#ifdef EECNT_LOG
EECNT_LOG("Counter 0 target read = %x\n", counters[0].target);
#endif
return 0;
case 0x10000030:
_eeReadConstMem32(x86reg, (uptr)&counters[0].hold);
@ -320,22 +312,16 @@ int hwConstRead32(u32 x86reg, u32 mem)
iFlushCall(0);
PUSH32I(1);
CALLFunc((uptr)rcntRcount);
#ifdef EECNT_LOG
EECNT_LOG("Counter 1 count read = %x\n", rcntRcount(1));
#endif
ADD32ItoR(ESP, 4);
return 1;
case 0x10000810:
_eeReadConstMem32(x86reg, (uptr)&counters[1].mode);
#ifdef EECNT_LOG
EECNT_LOG("Counter 1 mode read = %x\n", counters[1].mode);
#endif
return 0;
case 0x10000820:
_eeReadConstMem32(x86reg, (uptr)&counters[1].target);
#ifdef EECNT_LOG
EECNT_LOG("Counter 1 target read = %x\n", counters[1].target);
#endif
return 0;
case 0x10000830:
_eeReadConstMem32(x86reg, (uptr)&counters[1].hold);
@ -345,22 +331,16 @@ int hwConstRead32(u32 x86reg, u32 mem)
iFlushCall(0);
PUSH32I(2);
CALLFunc((uptr)rcntRcount);
#ifdef EECNT_LOG
EECNT_LOG("Counter 2 count read = %x\n", rcntRcount(2));
#endif
ADD32ItoR(ESP, 4);
return 1;
case 0x10001010:
_eeReadConstMem32(x86reg, (uptr)&counters[2].mode);
#ifdef EECNT_LOG
EECNT_LOG("Counter 2 mode read = %x\n", counters[2].mode);
#endif
return 0;
case 0x10001020:
_eeReadConstMem32(x86reg, (uptr)&counters[2].target);
#ifdef EECNT_LOG
EECNT_LOG("Counter 2 target read = %x\n", counters[2].target);
#endif
return 0;
case 0x10001030:
_eeReadConstMem32(x86reg, (uptr)&counters[2].hold);
@ -370,22 +350,16 @@ int hwConstRead32(u32 x86reg, u32 mem)
iFlushCall(0);
PUSH32I(3);
CALLFunc((uptr)rcntRcount);
#ifdef EECNT_LOG
EECNT_LOG("Counter 3 count read = %x\n", rcntRcount(3));
#endif
ADD32ItoR(ESP, 4);
return 1;
case 0x10001810:
_eeReadConstMem32(x86reg, (uptr)&counters[3].mode);
#ifdef EECNT_LOG
EECNT_LOG("Counter 3 mode read = %x\n", counters[3].mode);
#endif
return 0;
case 0x10001820:
_eeReadConstMem32(x86reg, (uptr)&counters[3].target);
#ifdef EECNT_LOG
EECNT_LOG("Counter 3 target read = %x\n", counters[3].target);
#endif
return 0;
case 0x10001830:
_eeReadConstMem32(x86reg, (uptr)&counters[3].hold);

2
pcsx2/x86/iVU0micro.c
View File

@ -311,9 +311,7 @@ void recVU0LowerOP_T3_11( void )
void recVU0unknown( void )
{
#ifdef CPU_LOG
CPU_LOG("Unknown VU0 micromode opcode calledn");
#endif
}

5
pcsx2/x86/iVUmicro.c
View File

@ -408,9 +408,7 @@ void _recvuFMACflush(VURegs * VU) {
if (VU->fmac[i].enable == 0) continue;
if ((vucycle - VU->fmac[i].sCycle) >= VU->fmac[i].Cycle) {
#ifdef VUM_LOG
// if (Log) { VUM_LOG("flushing FMAC pipe[%d]\n", i); }
#endif
VU->fmac[i].enable = 0;
}
}
@ -495,9 +493,8 @@ void _recvuFMACAdd(VURegs * VU, int reg, int xyzw) {
SysPrintf("*PCSX2*: error , out of fmacs\n");
}
#ifdef VUM_LOG
// if (Log) { VUM_LOG("adding FMAC pipe[%d]; reg %d\n", i, reg); }
#endif
VU->fmac[i].enable = 1;
VU->fmac[i].sCycle = vucycle;
VU->fmac[i].Cycle = 3;

2
pcsx2/x86/ix86-32/iR5900-32.c
View File

@ -2309,9 +2309,7 @@ REC_SYS(COP2);
void recCOP2( void )
{
#ifdef CPU_LOG
CPU_LOG( "Recompiling COP2:%s\n", disR5900Fasm( cpuRegs.code, cpuRegs.pc ) );
#endif
recCOP22( );
}

2
pcsx2/x86/ix86-64/iR5900-64.c
View File

@ -1812,9 +1812,7 @@ REC_SYS(COP2);
void recCOP2( void )
{
#ifdef CPU_LOG
CPU_LOG( "Recompiling COP2:%s\n", disR5900Fasm( cpuRegs.code, cpuRegs.pc ) );
#endif
recCOP22( );
}