mirror of https://github.com/PCSX2/pcsx2.git
Revising some logging messages.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2539 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
arcum42
parent
4dc7d3e2ab
commit
1b6fd8377e
26
pcsx2/Sif.h
26
pcsx2/Sif.h
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@ -80,14 +80,32 @@ struct sifFifo
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struct _sif
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{
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sifFifo fifo;
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sifFifo fifo; // Used in both.
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s32 chain; // Not used.
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s32 end;
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s32 end; // Only used for EE.
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s32 tagMode; // No longer used.
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s32 counter;
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struct sifData data;
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s32 counter; // Used to keep track of how much is left in IOP.
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struct sifData data; // Only used in IOP.
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};
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/*struct _sif
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{
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sifFifo fifo; // Used in both.
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struct ee
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{
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bool end; // Only used for EE.
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bool busy;
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}
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struct iop
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{
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bool end;
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bool busy;
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s32 counter; // Used to keep track of how much is left in IOP.
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struct sifData data; // Only used in IOP.
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}
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};*/
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extern bool eesifbusy[2], iopsifbusy[2];
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extern void sifInit();
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@ -44,12 +44,12 @@ static __forceinline bool WriteFifoToEE()
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tDMA_TAG *ptag;
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//SIF_LOG(" EE SIF doing transfer %04Xqw to %08X", readSize, sif0dma->madr);
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SIF_LOG("----------- %lX of %lX", readSize << 2, sif0dma->qwc << 2);
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SIF_LOG("Write Fifo to EE: ----------- %lX of %lX", readSize << 2, sif0dma->qwc << 2);
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ptag = sif0dma->getAddr(sif0dma->madr, DMAC_SIF0);
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if (ptag == NULL)
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{
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DevCon.Warning("WriteFifoToEE: ptag == NULL");
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DevCon.Warning("Write Fifo to EE: ptag == NULL");
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return false;
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}
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@ -64,7 +64,7 @@ static __forceinline bool WriteFifoToEE()
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//}
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//else
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//{
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//DevCon.Warning("WriteFifoToEE: readSize is 0");
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//DevCon.Warning("Write Fifo to EE: readSize is 0");
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// return false;
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//}
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return true;
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@ -78,12 +78,12 @@ static __forceinline bool WriteIOPtoFifo()
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//if (writeSize <= 0)
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//{
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//DevCon.Warning("WriteIOPtoFifo: writeSize is 0");
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//DevCon.Warning("Write IOP to Fifo: writeSize is 0");
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// return false;
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//}
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//else
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//{
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SIF_LOG("+++++++++++ %lX of %lX", writeSize, sif0.counter);
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SIF_LOG("Write IOP to Fifo: +++++++++++ %lX of %lX", writeSize, sif0.counter);
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sif0.fifo.write((u32*)iopPhysMem(hw_dma(9).madr), writeSize);
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hw_dma(9).madr += writeSize << 2;
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@ -99,13 +99,13 @@ static __forceinline bool ProcessEETag()
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static __aligned16 u32 tag[4];
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sif0.fifo.read((u32*)&tag[0], 4); // Tag
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SIF_LOG(" EE SIF read tag: %x %x %x %x", tag[0], tag[1], tag[2], tag[3]);
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SIF_LOG("SIF0 EE read tag: %x %x %x %x", tag[0], tag[1], tag[2], tag[3]);
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sif0dma->unsafeTransfer(((tDMA_TAG*)(tag)));
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sif0dma->madr = tag[1];
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tDMA_TAG ptag(tag[0]);
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SIF_LOG(" EE SIF dest chain tag madr:%08X qwc:%04X id:%X irq:%d(%08X_%08X)",
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SIF_LOG("SIF0 EE dest chain tag madr:%08X qwc:%04X id:%X irq:%d(%08X_%08X)",
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sif0dma->madr, sif0dma->qwc, ptag.ID, ptag.IRQ, tag[1], tag[0]);
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if (sif0dma->chcr.TIE && ptag.IRQ)
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@ -148,7 +148,7 @@ static __forceinline bool ProcessIOPTag()
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hw_dma(9).madr = sif0.data.data & 0xFFFFFF;
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sif0.counter = sif0.data.words & 0xFFFFFF;
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SIF_LOG(" SIF0 Tag: madr=%lx, tadr=%lx, counter=%lx (%08X_%08X)", HW_DMA9_MADR, HW_DMA9_TADR, sif0.counter, sif0.data.words, sif0.data.data);
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SIF_LOG("SIF0 IOP Tag: madr=%lx, tadr=%lx, counter=%lx (%08X_%08X)", HW_DMA9_MADR, HW_DMA9_TADR, sif0.counter, sif0.data.words, sif0.data.data);
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return true;
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}
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@ -156,20 +156,22 @@ static __forceinline bool ProcessIOPTag()
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// Stop transferring ee, and signal an interrupt.
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static __forceinline void EndEE()
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{
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SIF_LOG("Sif0: End EE");
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eesifbusy[0] = false;
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if (cycles == 0) DevCon.Warning("EESIF0cycles = 0"); // No transfer happened
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if (cycles == 0) DevCon.Warning("SIF0 EE: cycles = 0"); // No transfer happened
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else CPU_INT(DMAC_SIF0, cycles*BIAS); // Hence no Interrupt
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}
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// Stop transferring iop, and signal an interrupt.
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static __forceinline void EndIOP()
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{
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SIF_LOG("Sif0: End IOP");
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iopsifbusy[0] = false;
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// iop is 1/8th the clock rate of the EE and psxcycles is in words (not quadwords)
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// So when we're all done, the equation looks like thus:
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//PSX_INT(IopEvt_SIF0, ( ( psxCycles*BIAS ) / 4 ) / 8);
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if (psxCycles == 0) DevCon.Warning("IOPSIF0cycles = 0"); // No transfer happened
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if (psxCycles == 0) DevCon.Warning("SIF0 IOP: cycles = 0"); // No transfer happened
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else PSX_INT(IopEvt_SIF0, psxCycles); // Hence no Interrupt
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}
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@ -195,7 +197,6 @@ static __forceinline void HandleEETransfer()
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{
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// Read Fifo into an ee tag, transfer it to sif0dma
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// and process it.
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done = false;
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ProcessEETag();
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}
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}
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@ -209,6 +210,33 @@ static __forceinline void HandleEETransfer()
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// Handle the IOP transfer.
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// Note: Test any changes in this function against Grandia III.
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// What currently happens is this:
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// SIF0 DMA start...
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// SIF + 4 = 4 (pos=4)
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// SIF0 IOP Tag: madr=19870, tadr=179cc, counter=8 (00000008_80019870)
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// SIF - 4 = 0 (pos=4)
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// SIF0 EE read tag: 90000002 935c0 0 0
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// SIF0 EE dest chain tag madr:000935C0 qwc:0002 id:1 irq:1(000935C0_90000002)
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// Write Fifo to EE: ----------- 0 of 8
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// SIF - 0 = 0 (pos=4)
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// Write IOP to Fifo: +++++++++++ 8 of 8
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// SIF + 8 = 8 (pos=12)
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// Write Fifo to EE: ----------- 8 of 8
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// SIF - 8 = 0 (pos=12)
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// Sif0: End IOP
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// Sif0: End EE
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// SIF0 DMA end...
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// What happens if (sif0.counter > 0) is handled first is this
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// SIF0 DMA start...
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// ...
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// SIF + 8 = 8 (pos=12)
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// Sif0: End IOP
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// Write Fifo to EE: ----------- 8 of 8
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// SIF - 8 = 0 (pos=12)
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// SIF0 DMA end...
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static __forceinline void HandleIOPTransfer()
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{
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if (sif0.counter <= 0) // If there's no more to transfer
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@ -223,7 +251,6 @@ static __forceinline void HandleIOPTransfer()
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{
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// Read Fifo into an iop tag, and transfer it to hw_dma(9).
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// And presumably process it.
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done = false;
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ProcessIOPTag();
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}
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}
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@ -248,7 +275,7 @@ __forceinline void SIF0Dma()
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{
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if (iopsifbusy[0]) HandleIOPTransfer();
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if (eesifbusy[0]) HandleEETransfer();
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} while (!done);
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} while (!done); // Substituting (iopsifbusy[0] || eesifbusy[0]) breaks things.
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SIF_LOG("SIF0 DMA end...");
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Sif0End();
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@ -39,7 +39,8 @@ static __forceinline void Sif1Init()
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static __forceinline bool WriteEEtoFifo()
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{
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// There's some data ready to transfer into the fifo..
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SIF_LOG("Sif 1: Write EE to Fifo");
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const int writeSize = min((s32)sif1dma->qwc, sif1.fifo.free() >> 2);
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//if (writeSize <= 0)
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//{
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@ -53,7 +54,7 @@ static __forceinline bool WriteEEtoFifo()
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ptag = sif1dma->getAddr(sif1dma->madr, DMAC_SIF1);
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if (ptag == NULL)
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{
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DevCon.Warning("WriteEEtoFifo: ptag == NULL");
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DevCon.Warning("Write EE to Fifo: ptag == NULL");
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return false;
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}
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@ -70,6 +71,8 @@ static __forceinline bool WriteEEtoFifo()
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static __forceinline bool WriteFifoToIOP()
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{
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// If we're reading something, continue to do so.
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SIF_LOG("Sif1: Write Fifo to IOP");
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const int readSize = min (sif1.counter, sif1.fifo.size);
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//if (readSize <= 0)
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//{
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@ -78,12 +81,12 @@ static __forceinline bool WriteFifoToIOP()
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//}
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//else
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//{
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SIF_LOG(" IOP SIF doing transfer %04X to %08X", readSize, HW_DMA10_MADR);
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SIF_LOG("Sif 1 IOP doing transfer %04X to %08X", readSize, HW_DMA10_MADR);
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sif1.fifo.read((u32*)iopPhysMem(hw_dma(10).madr), readSize);
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psxCpu->Clear(hw_dma(10).madr, readSize);
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hw_dma(10).madr += readSize << 2;
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psxCycles += readSize >> 2; // fixme: should be / 16
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psxCycles += readSize >> 2; // fixme: should be >> 4
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sif1.counter -= readSize;
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//}
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return true;
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@ -94,12 +97,13 @@ static __forceinline bool ProcessEETag()
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{
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// Chain mode
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tDMA_TAG *ptag;
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SIF_LOG("Sif1: ProcessEETag");
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// Process DMA tag at sif1dma->tadr
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ptag = sif1dma->DMAtransfer(sif1dma->tadr, DMAC_SIF1);
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if (ptag == NULL)
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{
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Console.WriteLn("ProcessEETag: ptag = NULL");
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Console.WriteLn("Sif1 ProcessEETag: ptag = NULL");
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return false;
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}
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@ -161,7 +165,7 @@ static __forceinline bool SIFIOPReadTag()
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{
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// Read a tag.
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sif1.fifo.read((u32*)&sif1.data, 4);
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SIF_LOG(" IOP SIF dest chain tag madr:%08X wc:%04X id:%X irq:%d",
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SIF_LOG("SIF 1 IOP: dest chain tag madr:%08X wc:%04X id:%X irq:%d",
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sif1.data.data & 0xffffff, sif1.data.words, DMA_TAG(sif1.data.data).ID,
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DMA_TAG(sif1.data.data).IRQ);
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@ -174,25 +178,43 @@ static __forceinline bool SIFIOPReadTag()
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static __forceinline void EndEE()
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{
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eesifbusy[1] = false;
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SIF_LOG("Sif 1: End EE");
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// Voodoocycles : Okami wants around 100 cycles when booting up
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// Other games reach like 50k cycles here, but the EE will long have given up by then and just retry.
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// (Cause of double interrupts on the EE)
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if (cycles == 0) DevCon.Warning("SIF1 EE: cycles = 0"); // No transfer happened
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else CPU_INT(DMAC_SIF1, min((int)(cycles*BIAS), 384)); // Hence no Interrupt (fixes Eternal Poison reboot when selecting new game)
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if (cycles == 0)
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{
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// No transfer happened
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DevCon.Warning("SIF1 EE: cycles = 0");
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}
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else
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{
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// Hence no Interrupt (fixes Eternal Poison reboot when selecting new game)
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CPU_INT(DMAC_SIF1, min((int)(cycles*BIAS), 384));
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}
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}
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// Stop processing IOP, and signal an interrupt.
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static __forceinline void EndIOP()
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{
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iopsifbusy[1] = false;
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SIF_LOG("Sif 1: End IOP");
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//Fixme ( voodoocycles ):
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//The *24 are needed for ecco the dolphin (CDVD hangs) and silver surfer (Pad not detected)
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//Greater than *35 break rebooting when trying to play Tekken5 arcade history
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//Total cycles over 1024 makes SIF too slow to keep up the sound stream in so3...
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if (psxCycles == 0) DevCon.Warning("SIF1 IOP: cycles = 0"); // No transfer happened
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else PSX_INT(IopEvt_SIF1, min((psxCycles * 26), 1024)); // Hence no Interrupt
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if (psxCycles == 0)
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{
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// No transfer happened
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DevCon.Warning("SIF1 IOP: cycles = 0");
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}
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else
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{
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// Hence no Interrupt
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PSX_INT(IopEvt_SIF1, min((psxCycles * 26), 1024));
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}
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}
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// Handle the EE transfer.
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@ -264,10 +286,9 @@ __forceinline void SIF1Dma()
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{
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if (eesifbusy[1]) HandleEETransfer();
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if (iopsifbusy[1]) HandleIOPTransfer();
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} while (!done);
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SIF_LOG("SIF0 DMA end...");
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SIF_LOG("SIF1 DMA end...");
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Sif1End();
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}
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