mirror of https://github.com/PCSX2/pcsx2.git
x86/microVU: Forward CTC2 I direct to VNNNi instructions
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d6332e796e
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1a7263cb9f
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@ -437,6 +437,19 @@ static void recCFC2()
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{
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xXOR(xRegister32(regt), xRegister32(regt));
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}
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else if (_Rd_ == REG_I)
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{
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const int xmmreg = _checkXMMreg(XMMTYPE_VFREG, 33, MODE_READ);
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if (xmmreg >= 0)
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{
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xMOVD(xRegister32(regt), xRegisterSSE(xmmreg));
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xMOVSX(xRegister64(regt), xRegister32(regt));
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}
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else
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{
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xMOVSX(xRegister64(regt), ptr32[&vu0Regs.VI[_Rd_].UL]);
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}
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}
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else if (_Rd_ >= REG_STATUS_FLAG) // FixMe: Should R-Reg have upper 9 bits 0?
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{
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xMOVSX(xRegister64(regt), ptr32[&vu0Regs.VI[_Rd_].UL]);
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@ -539,14 +552,6 @@ static void recCTC2()
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// sVU's COP2 has a comment that "Donald Duck" needs this too...
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if (_Rd_ < REG_STATUS_FLAG)
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{
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// I isn't invalidated correctly yet, ideally we would move this to the XMM directly.
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if (_Rd_ == REG_I)
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{
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const int xmmreg = _checkXMMreg(XMMTYPE_VFREG, 33, 0);
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if (xmmreg >= 0)
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_freeXMMregWithoutWriteback(xmmreg);
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}
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// Little bit nasty, but optimal codegen.
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const int gprreg = _allocIfUsedGPRtoX86(_Rt_, MODE_READ);
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const int vireg = _allocIfUsedVItoX86(_Rd_, MODE_WRITE);
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@ -606,7 +611,36 @@ static void recCTC2()
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}
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else
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{
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_eeMoveGPRtoM((uptr)&vu0Regs.VI[_Rd_].UL, _Rt_);
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// Move I direct to FPR if used.
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if (_Rd_ == REG_I)
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{
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const int xmmreg = _allocVFtoXMMreg(33, MODE_WRITE);
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if (_Rt_ == 0)
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{
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xPXOR(xRegisterSSE(xmmreg), xRegisterSSE(xmmreg));
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}
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else
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{
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const int xmmgpr = _checkXMMreg(XMMTYPE_GPRREG, _Rt_, MODE_READ);
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if (xmmgpr >= 0)
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{
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xPSHUF.D(xRegisterSSE(xmmreg), xRegisterSSE(xmmgpr), 0);
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}
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else
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{
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const int gprreg = _allocX86reg(X86TYPE_GPR, _Rt_, MODE_READ);
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if (gprreg >= 0)
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xMOVDZX(xRegisterSSE(xmmreg), xRegister32(gprreg));
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else
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xMOVSSZX(xRegisterSSE(xmmreg), ptr32[&cpuRegs.GPR.r[_Rt_].SD[0]]);
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xSHUF.PS(xRegisterSSE(xmmreg), xRegisterSSE(xmmreg), 0);
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}
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}
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}
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else
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{
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_eeMoveGPRtoM((uptr)&vu0Regs.VI[_Rd_].UL, _Rt_);
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}
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}
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break;
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}
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