x86emitter: remove unused FPU opcode

Future code would rely on SSE anyway
This commit is contained in:
Gregory Hainaut 2016-01-20 10:23:23 +01:00
parent 162bf3d22d
commit 1a700145ec
2 changed files with 0 additions and 268 deletions

View File

@ -146,10 +146,6 @@ ATTR_DEP extern u32* JS32( u32 to );
// FPU instructions
//******************
// fild m32 to fpu reg stack
ATTR_DEP extern void FILD32( u32 from );
// fistp m32 from fpu reg stack
ATTR_DEP extern void FISTP32( u32 from );
// fld m32 to fpu reg stack
ATTR_DEP extern void FLD32( u32 from );
// fld st(i)
@ -158,94 +154,30 @@ ATTR_DEP extern void FLD(int st);
ATTR_DEP extern void FLD1();
// fld1 (push log_2 e on the stack)
ATTR_DEP extern void FLDL2E();
// fst m32 from fpu reg stack
ATTR_DEP extern void FST32( u32 to );
// fstp m32 from fpu reg stack
ATTR_DEP extern void FSTP32( u32 to );
// fstp st(i)
ATTR_DEP extern void FSTP(int st);
// fldcw fpu control word from m16
ATTR_DEP extern void FLDCW( u32 from );
// fstcw fpu control word to m16
ATTR_DEP extern void FNSTCW( u32 to );
ATTR_DEP extern void FXAM();
ATTR_DEP extern void FDECSTP();
// frndint
ATTR_DEP extern void FRNDINT();
ATTR_DEP extern void FXCH(int st);
ATTR_DEP extern void F2XM1();
ATTR_DEP extern void FSCALE();
// fadd ST(src) to fpu reg stack ST(0)
ATTR_DEP extern void FADD32Rto0( x86IntRegType src );
// fadd ST(0) to fpu reg stack ST(src)
ATTR_DEP extern void FADD320toR( x86IntRegType src );
// fsub ST(src) to fpu reg stack ST(0)
ATTR_DEP extern void FSUB32Rto0( x86IntRegType src );
// fsub ST(0) to fpu reg stack ST(src)
ATTR_DEP extern void FSUB320toR( x86IntRegType src );
// fsubp -> subtract ST(0) from ST(1), store in ST(1) and POP stack
ATTR_DEP extern void FSUBP( void );
// fmul ST(src) to fpu reg stack ST(0)
ATTR_DEP extern void FMUL32Rto0( x86IntRegType src );
// fmul ST(0) to fpu reg stack ST(src)
ATTR_DEP extern void FMUL320toR( x86IntRegType src );
// fdiv ST(src) to fpu reg stack ST(0)
ATTR_DEP extern void FDIV32Rto0( x86IntRegType src );
// fdiv ST(0) to fpu reg stack ST(src)
ATTR_DEP extern void FDIV320toR( x86IntRegType src );
// fdiv ST(0) to fpu reg stack ST(src), pop stack, store in ST(src)
ATTR_DEP extern void FDIV320toRP( x86IntRegType src );
// fadd m32 to fpu reg stack
ATTR_DEP extern void FADD32( u32 from );
// fsub m32 to fpu reg stack
ATTR_DEP extern void FSUB32( u32 from );
// fmul m32 to fpu reg stack
ATTR_DEP extern void FMUL32( u32 from );
// fdiv m32 to fpu reg stack
ATTR_DEP extern void FDIV32( u32 from );
// fcomi st, st( i)
ATTR_DEP extern void FCOMI( x86IntRegType src );
// fcomip st, st( i)
ATTR_DEP extern void FCOMIP( x86IntRegType src );
// fucomi st, st( i)
ATTR_DEP extern void FUCOMI( x86IntRegType src );
// fucomip st, st( i)
ATTR_DEP extern void FUCOMIP( x86IntRegType src );
// fcom m32 to fpu reg stack
ATTR_DEP extern void FCOM32( u32 from );
// fabs fpu reg stack
ATTR_DEP extern void FABS( void );
// fsqrt fpu reg stack
ATTR_DEP extern void FSQRT( void );
// ftan fpu reg stack
ATTR_DEP extern void FPATAN( void );
// fsin fpu reg stack
ATTR_DEP extern void FSIN( void );
// fchs fpu reg stack
ATTR_DEP extern void FCHS( void );
// fcmovb fpu reg to fpu reg stack
ATTR_DEP extern void FCMOVB32( x86IntRegType from );
// fcmove fpu reg to fpu reg stack
ATTR_DEP extern void FCMOVE32( x86IntRegType from );
// fcmovbe fpu reg to fpu reg stack
ATTR_DEP extern void FCMOVBE32( x86IntRegType from );
// fcmovu fpu reg to fpu reg stack
ATTR_DEP extern void FCMOVU32( x86IntRegType from );
// fcmovnb fpu reg to fpu reg stack
ATTR_DEP extern void FCMOVNB32( x86IntRegType from );
// fcmovne fpu reg to fpu reg stack
ATTR_DEP extern void FCMOVNE32( x86IntRegType from );
// fcmovnbe fpu reg to fpu reg stack
ATTR_DEP extern void FCMOVNBE32( x86IntRegType from );
// fcmovnu fpu reg to fpu reg stack
ATTR_DEP extern void FCMOVNU32( x86IntRegType from );
ATTR_DEP extern void FCOMP32( u32 from );
ATTR_DEP extern void FNSTSWtoAX( void );
//*********************
// SSE instructions *

View File

@ -19,23 +19,6 @@
//------------------------------------------------------------------
// FPU instructions
//------------------------------------------------------------------
/* fild m32 to fpu reg stack */
emitterT void FILD32( u32 from )
{
xWrite8( 0xDB );
ModRM( 0, 0x0, DISP32 );
xWrite32( MEMADDR(from, 4) );
}
/* fistp m32 from fpu reg stack */
emitterT void FISTP32( u32 from )
{
xWrite8( 0xDB );
ModRM( 0, 0x3, DISP32 );
xWrite32( MEMADDR(from, 4) );
}
/* fld m32 to fpu reg stack */
emitterT void FLD32( u32 from )
{
@ -49,14 +32,6 @@ emitterT void FLD(int st) { xWrite16(0xc0d9+(st<<8)); }
emitterT void FLD1() { xWrite16(0xe8d9); }
emitterT void FLDL2E() { xWrite16(0xead9); }
/* fst m32 from fpu reg stack */
emitterT void FST32( u32 to )
{
xWrite8( 0xD9 );
ModRM( 0, 0x2, DISP32 );
xWrite32( MEMADDR(to, 4) );
}
/* fstp m32 from fpu reg stack */
emitterT void FSTP32( u32 to )
{
@ -68,25 +43,6 @@ emitterT void FSTP32( u32 to )
// fstp st(i)
emitterT void FSTP(int st) { xWrite16(0xd8dd+(st<<8)); }
/* fldcw fpu control word from m16 */
emitterT void FLDCW( u32 from )
{
xWrite8( 0xD9 );
ModRM( 0, 0x5, DISP32 );
xWrite32( MEMADDR(from, 4) );
}
/* fnstcw fpu control word to m16 */
emitterT void FNSTCW( u32 to )
{
xWrite8( 0xD9 );
ModRM( 0, 0x7, DISP32 );
xWrite32( MEMADDR(to, 4) );
}
emitterT void FNSTSWtoAX() { xWrite16(0xE0DF); }
emitterT void FXAM() { xWrite16(0xe5d9); }
emitterT void FDECSTP() { xWrite16(0xf6d9); }
emitterT void FRNDINT() { xWrite16(0xfcd9); }
emitterT void FXCH(int st) { xWrite16(0xc8d9+(st<<8)); }
emitterT void F2XM1() { xWrite16(0xf0d9); }
@ -94,13 +50,6 @@ emitterT void FSCALE() { xWrite16(0xfdd9); }
emitterT void FPATAN(void) { xWrite16(0xf3d9); }
emitterT void FSIN(void) { xWrite16(0xfed9); }
/* fadd ST(src) to fpu reg stack ST(0) */
emitterT void FADD32Rto0( x86IntRegType src )
{
xWrite8( 0xD8 );
xWrite8( 0xC0 + src );
}
/* fadd ST(0) to fpu reg stack ST(src) */
emitterT void FADD320toR( x86IntRegType src )
{
@ -115,70 +64,6 @@ emitterT void FSUB32Rto0( x86IntRegType src )
xWrite8( 0xE0 + src );
}
/* fsub ST(0) to fpu reg stack ST(src) */
emitterT void FSUB320toR( x86IntRegType src )
{
xWrite8( 0xDC );
xWrite8( 0xE8 + src );
}
/* fsubp -> substract ST(0) from ST(1), store in ST(1) and POP stack */
emitterT void FSUBP( void )
{
xWrite8( 0xDE );
xWrite8( 0xE9 );
}
/* fmul ST(src) to fpu reg stack ST(0) */
emitterT void FMUL32Rto0( x86IntRegType src )
{
xWrite8( 0xD8 );
xWrite8( 0xC8 + src );
}
/* fmul ST(0) to fpu reg stack ST(src) */
emitterT void FMUL320toR( x86IntRegType src )
{
xWrite8( 0xDC );
xWrite8( 0xC8 + src );
}
/* fdiv ST(src) to fpu reg stack ST(0) */
emitterT void FDIV32Rto0( x86IntRegType src )
{
xWrite8( 0xD8 );
xWrite8( 0xF0 + src );
}
/* fdiv ST(0) to fpu reg stack ST(src) */
emitterT void FDIV320toR( x86IntRegType src )
{
xWrite8( 0xDC );
xWrite8( 0xF8 + src );
}
emitterT void FDIV320toRP( x86IntRegType src )
{
xWrite8( 0xDE );
xWrite8( 0xF8 + src );
}
/* fadd m32 to fpu reg stack */
emitterT void FADD32( u32 from )
{
xWrite8( 0xD8 );
ModRM( 0, 0x0, DISP32 );
xWrite32( MEMADDR(from, 4) );
}
/* fsub m32 to fpu reg stack */
emitterT void FSUB32( u32 from )
{
xWrite8( 0xD8 );
ModRM( 0, 0x4, DISP32 );
xWrite32( MEMADDR(from, 4) );
}
/* fmul m32 to fpu reg stack */
emitterT void FMUL32( u32 from )
{
@ -186,88 +71,3 @@ emitterT void FMUL32( u32 from )
ModRM( 0, 0x1, DISP32 );
xWrite32( MEMADDR(from, 4) );
}
/* fdiv m32 to fpu reg stack */
emitterT void FDIV32( u32 from )
{
xWrite8( 0xD8 );
ModRM( 0, 0x6, DISP32 );
xWrite32( MEMADDR(from, 4) );
}
/* fabs fpu reg stack */
emitterT void FABS( void )
{
xWrite16( 0xE1D9 );
}
/* fsqrt fpu reg stack */
emitterT void FSQRT( void )
{
xWrite16( 0xFAD9 );
}
/* fchs fpu reg stack */
emitterT void FCHS( void )
{
xWrite16( 0xE0D9 );
}
/* fcomi st, st(i) */
emitterT void FCOMI( x86IntRegType src )
{
xWrite8( 0xDB );
xWrite8( 0xF0 + src );
}
/* fcomip st, st(i) */
emitterT void FCOMIP( x86IntRegType src )
{
xWrite8( 0xDF );
xWrite8( 0xF0 + src );
}
/* fucomi st, st(i) */
emitterT void FUCOMI( x86IntRegType src )
{
xWrite8( 0xDB );
xWrite8( 0xE8 + src );
}
/* fucomip st, st(i) */
emitterT void FUCOMIP( x86IntRegType src )
{
xWrite8( 0xDF );
xWrite8( 0xE8 + src );
}
/* fcom m32 to fpu reg stack */
emitterT void FCOM32( u32 from )
{
xWrite8( 0xD8 );
ModRM( 0, 0x2, DISP32 );
xWrite32( MEMADDR(from, 4) );
}
/* fcomp m32 to fpu reg stack */
emitterT void FCOMP32( u32 from )
{
xWrite8( 0xD8 );
ModRM( 0, 0x3, DISP32 );
xWrite32( MEMADDR(from, 4) );
}
#define FCMOV32( low, high ) \
{ \
xWrite8( low ); \
xWrite8( high + from ); \
}
emitterT void FCMOVB32( x86IntRegType from ) { FCMOV32( 0xDA, 0xC0 ); }
emitterT void FCMOVE32( x86IntRegType from ) { FCMOV32( 0xDA, 0xC8 ); }
emitterT void FCMOVBE32( x86IntRegType from ) { FCMOV32( 0xDA, 0xD0 ); }
emitterT void FCMOVU32( x86IntRegType from ) { FCMOV32( 0xDA, 0xD8 ); }
emitterT void FCMOVNB32( x86IntRegType from ) { FCMOV32( 0xDB, 0xC0 ); }
emitterT void FCMOVNE32( x86IntRegType from ) { FCMOV32( 0xDB, 0xC8 ); }
emitterT void FCMOVNBE32( x86IntRegType from ) { FCMOV32( 0xDB, 0xD0 ); }
emitterT void FCMOVNU32( x86IntRegType from ) { FCMOV32( 0xDB, 0xD8 ); }