mirror of https://github.com/PCSX2/pcsx2.git
IOP Counters: Fix up interrupt behaviour
Also replace some magic values with macro/enum type thingies
This commit is contained in:
refractionpcsx2
parent
4fb0050411
commit
1a2059c0f1
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@ -55,15 +55,20 @@ u8 psxvblankgate = 0;
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// used to disable targets until after an overflow
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#define IOPCNT_FUTURE_TARGET (0x1000000000ULL)
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#define IOPCNT_MODE_WRITE_MSK 0x63FF
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#define IOPCNT_MODE_FLAG_MSK 0x1800
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#define IOPCNT_ENABLE_GATE (1 << 0) // enables gate-based counters
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#define IOPCNT_MODE_GATE (3 << 1) // 0x6 Gate mode (dependant on counter)
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#define IOPCNT_MODE_RESET (1 << 3) // 0x8 resets the counter on target (if interrupt only?)
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#define IOPCNT_INT_TARGET (1 << 4) // 0x10 triggers an interrupt on targets
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#define IOPCNT_INT_OVERFLOW (1 << 5) // 0x20 triggers an interrupt on overflows
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#define IOPCNT_INT_TOGGLE (1 << 7) // 0x80 0=Pulse (reset on read), 1=toggle each interrupt condition (in 1 shot not reset after fired)
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#define IOPCNT_ALT_SOURCE (1 << 8) // 0x100 uses hblank on counters 1 and 3, and PSXCLOCK on counter 0
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#define IOPCNT_INT_REQ (1 << 10) // 0x400 1=Can fire interrupt, 0=Interrupt Fired (reset on read if not 1 shot)
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#define IOPCNT_ENABLE_GATE (1 << 0) // enables gate-based counters
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#define IOPCNT_MODE_GATE (3 << 1) // 0x6 Gate mode (dependant on counter)
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#define IOPCNT_MODE_RESET_CNT (1 << 3) // 0x8 resets the counter on target (if interrupt only?)
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#define IOPCNT_INT_TARGET (1 << 4) // 0x10 triggers an interrupt on targets
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#define IOPCNT_INT_OVERFLOW (1 << 5) // 0x20 triggers an interrupt on overflows
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#define IOPCNT_INT_REPEAT (1 << 6) // 0x40 0=One shot (ignore TOGGLE bit 7) 1=Repeat Fire (Check TOGGLE bit 7)
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#define IOPCNT_INT_TOGGLE (1 << 7) // 0x80 0=Pulse (reset on read), 1=toggle each interrupt condition (in 1 shot not reset after fired)
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#define IOPCNT_ALT_SOURCE (1 << 8) // 0x100 uses hblank on counters 1 and 3, and PSXCLOCK on counter 0
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#define IOPCNT_INT_REQ (1 << 10) // 0x400 1=Can fire interrupt, 0=Interrupt Fired (reset on read if not 1 shot)
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#define IOPCNT_INT_CMPFLAG (1 << 11) // 0x800 1=Target interrupt raised
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#define IOPCNT_INT_OFLWFLAG (1 << 12) // 0x1000 1=Overflow interrupt raised
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// Use an arbitrary value to flag HBLANK counters.
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// These counters will be counted by the hblank gates coming from the EE,
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@ -133,13 +138,13 @@ void psxRcntInit()
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for (i = 0; i < 3; i++)
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{
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psxCounters[i].rate = 1;
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psxCounters[i].mode |= 0x0400;
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psxCounters[i].mode |= IOPCNT_INT_REQ;
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psxCounters[i].target = IOPCNT_FUTURE_TARGET;
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}
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for (i = 3; i < 6; i++)
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{
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psxCounters[i].rate = 1;
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psxCounters[i].mode |= 0x0400;
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psxCounters[i].mode |= IOPCNT_INT_REQ;
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psxCounters[i].target = IOPCNT_FUTURE_TARGET;
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}
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@ -170,10 +175,16 @@ void psxRcntInit()
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static bool _rcntFireInterrupt(int i, bool isOverflow)
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{
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bool ret;
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const int flag = IOPCNT_INT_CMPFLAG << (1 * isOverflow);
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bool ret = false;
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#
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// IRQ doesn't trigger if the status flag is already set
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if (psxCounters[i].mode & flag)
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return false;
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if (psxCounters[i].mode & 0x400)
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{ //IRQ fired
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if (psxCounters[i].mode & IOPCNT_INT_REQ)
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{
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// IRQ fired
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//DevCon.Warning("Counter %d %s IRQ Fired count %x", i, isOverflow ? "Overflow" : "Target", psxCounters[i].count);
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psxHu32(0x1070) |= psxCounters[i].interrupt;
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iopTestIntc();
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@ -182,21 +193,21 @@ static bool _rcntFireInterrupt(int i, bool isOverflow)
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else
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{
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//DevCon.Warning("Counter %d IRQ not fired count %x", i, psxCounters[i].count);
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ret = false;
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if (!(psxCounters[i].mode & 0x40)) //One shot
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if (!(psxCounters[i].mode & IOPCNT_INT_REPEAT)) // One shot
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{
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Console.WriteLn("Counter %x repeat intr not set on zero ret, ignoring target", i);
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return ret;
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return false;
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}
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}
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if (psxCounters[i].mode & 0x80)
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{ //Toggle mode
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psxCounters[i].mode ^= 0x400; // Interrupt flag inverted
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if (psxCounters[i].mode & IOPCNT_INT_TOGGLE)
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{
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// Toggle mode
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psxCounters[i].mode ^= IOPCNT_INT_REQ; // Interrupt flag inverted
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}
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else
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{
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psxCounters[i].mode &= ~0x0400; // Interrupt flag set low
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psxCounters[i].mode &= ~IOPCNT_INT_REQ; // Interrupt flag set low
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}
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return ret;
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@ -214,10 +225,10 @@ static void _rcntTestTarget(int i)
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// Target interrupt
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if (_rcntFireInterrupt(i, false))
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psxCounters[i].mode |= 0x0800; // Target flag
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psxCounters[i].mode |= IOPCNT_INT_CMPFLAG;
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}
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if (psxCounters[i].mode & 0x08)
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if (psxCounters[i].mode & IOPCNT_MODE_RESET_CNT)
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{
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// Reset on target
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psxCounters[i].count -= psxCounters[i].target;
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@ -235,28 +246,12 @@ static __fi void _rcntTestOverflow(int i)
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PSXCNT_LOG("IOP Counter[%d] overflow 0x%I64x >= 0x%I64x (mode: %x)",
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i, psxCounters[i].count, maxTarget, psxCounters[i].mode);
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if (!(psxCounters[i].mode & 0x40)) //One shot, whichever condition is met first
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// Overflow interrupt
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if ((psxCounters[i].mode & IOPCNT_INT_OVERFLOW))
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{
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if (psxCounters[i].target < IOPCNT_FUTURE_TARGET)
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{ //Target didn't trigger so we can overflow
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// Overflow interrupt
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if ((psxCounters[i].mode & IOPCNT_INT_OVERFLOW))
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{
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if (_rcntFireInterrupt(i, true))
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psxCounters[i].mode |= 0x1000; // Overflow flag
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}
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}
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psxCounters[i].target |= IOPCNT_FUTURE_TARGET;
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}
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else
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{
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// Overflow interrupt
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if ((psxCounters[i].mode & IOPCNT_INT_OVERFLOW))
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{
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if (_rcntFireInterrupt(i, true))
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psxCounters[i].mode |= 0x1000; // Overflow flag
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}
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psxCounters[i].target &= maxTarget;
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if (_rcntFireInterrupt(i, true))
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psxCounters[i].mode |= IOPCNT_INT_OFLWFLAG; // Overflow flag
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}
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// Update count.
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@ -264,6 +259,7 @@ static __fi void _rcntTestOverflow(int i)
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// (high bit of the target gets set by rcntWtarget when the target is behind
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// the counter value, and thus should not be flagged until after an overflow)
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psxCounters[i].target &= maxTarget;
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psxCounters[i].count -= maxTarget;
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}
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@ -303,11 +299,11 @@ Gate:
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static void _psxCheckStartGate(int i)
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{
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if (!(psxCounters[i].mode & IOPCNT_ENABLE_GATE))
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return; //Ignore Gate
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return; // Ignore Gate
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switch ((psxCounters[i].mode & 0x6) >> 1)
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{
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case 0x0: //GATE_ON_count - stop count on gate start:
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case 0x0: // GATE_ON_count - stop count on gate start:
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// get the current count at the time of stoppage:
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psxCounters[i].count = (i < 3) ?
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@ -316,11 +312,11 @@ static void _psxCheckStartGate(int i)
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psxCounters[i].mode |= IOPCNT_STOPPED;
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return;
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case 0x1: //GATE_ON_ClearStart - count normally with resets after every end gate
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case 0x1: // GATE_ON_ClearStart - count normally with resets after every end gate
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// do nothing - All counting will be done on a need-to-count basis.
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return;
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case 0x2: //GATE_ON_Clear_OFF_Start - start counting on gate start, stop on gate end
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case 0x2: // GATE_ON_Clear_OFF_Start - start counting on gate start, stop on gate end
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psxCounters[i].count = 0;
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psxCounters[i].sCycleT = psxRegs.cycle;
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psxCounters[i].mode &= ~IOPCNT_STOPPED;
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@ -336,25 +332,23 @@ static void _psxCheckStartGate(int i)
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static void _psxCheckEndGate(int i)
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{
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if (!(psxCounters[i].mode & IOPCNT_ENABLE_GATE))
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return; //Ignore Gate
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return; // Ignore Gate
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switch ((psxCounters[i].mode & 0x6) >> 1)
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{
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case 0x0: //GATE_ON_count - reset and start counting
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case 0x1: //GATE_ON_ClearStart - count normally with resets after every end gate
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case 0x0: // GATE_ON_count - reset and start counting
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case 0x1: // GATE_ON_ClearStart - count normally with resets after every end gate
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psxCounters[i].count = 0;
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psxCounters[i].sCycleT = psxRegs.cycle;
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psxCounters[i].mode &= ~IOPCNT_STOPPED;
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break;
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case 0x2: //GATE_ON_Clear_OFF_Start - start counting on gate start, stop on gate end
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psxCounters[i].count = (i < 3) ?
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psxRcntRcount16(i) :
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psxRcntRcount32(i);
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case 0x2: // GATE_ON_Clear_OFF_Start - start counting on gate start, stop on gate end
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psxCounters[i].count = (i < 3) ? psxRcntRcount16(i) : psxRcntRcount32(i);
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psxCounters[i].mode |= IOPCNT_STOPPED;
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return; // do not set the counter
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case 0x3: //GATE_ON_Start - start and count normally (no restarts or stops or clears)
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case 0x3: // GATE_ON_Start - start and count normally (no restarts or stops or clears)
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if (psxCounters[i].mode & IOPCNT_STOPPED)
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{
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psxCounters[i].count = 0;
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@ -370,7 +364,7 @@ void psxCheckStartGate16(int i)
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{
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pxAssert(i < 3);
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if (i == 0) // hSync counting...
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if (i == 0) // hSync counting
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{
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// AlternateSource/scanline counters for Gates 1 and 3.
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// We count them here so that they stay nicely synced with the EE's hsync.
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@ -444,7 +438,6 @@ void psxVBlankEnd()
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void psxRcntUpdate()
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{
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int i;
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//u32 change = 0;
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g_iopNextEventCycle = psxRegs.cycle + 32;
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@ -462,9 +455,9 @@ void psxRcntUpdate()
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if (psxCounters[i].mode & IOPCNT_STOPPED)
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continue;
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if ((psxCounters[i].mode & 0x40) && !(psxCounters[i].mode & 0x80))
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if ((psxCounters[i].mode & IOPCNT_INT_REPEAT) && !(psxCounters[i].mode & IOPCNT_INT_TOGGLE))
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{ //Repeat IRQ mode Pulsed, resets a few cycles after the interrupt, this should do.
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psxCounters[i].mode |= 0x400;
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psxCounters[i].mode |= IOPCNT_INT_REQ;
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}
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if (psxCounters[i].rate == PSXHBLANK)
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@ -520,18 +513,19 @@ void psxRcntUpdate()
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c -= difference;
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psxNextCounter = c;
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DEV9async(1);
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const s32 diffusb = psxRegs.cycle - psxCounters[7].sCycleT;
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s32 cusb = psxCounters[7].CycleT;
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const s32 diffusb = psxRegs.cycle - psxCounters[7].sCycleT;
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s32 cusb = psxCounters[7].CycleT;
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if (diffusb >= psxCounters[7].CycleT)
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{
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if (diffusb >= psxCounters[7].CycleT)
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{
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USBasync(diffusb);
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psxCounters[7].sCycleT = psxRegs.cycle;
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psxCounters[7].CycleT = psxCounters[7].rate;
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}
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else
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}
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else
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cusb -= diffusb;
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if (cusb < psxNextCounter)
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if (cusb < psxNextCounter)
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psxNextCounter = cusb;
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for (i = 0; i < 6; i++)
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@ -557,15 +551,16 @@ void psxRcntWcount16(int index, u16 value)
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}
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psxCounters[index].count = value & 0xffff;
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if ((psxCounters[index].mode & 0x400) || (psxCounters[index].mode & 0x40))
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if (psxCounters[index].count > psxCounters[index].target)
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{
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psxCounters[index].target &= 0xffff;
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}
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if (value > psxCounters[index].target)
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{ //Count already higher than Target
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// DevCon.Warning("16bit Count already higher than target");
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// Count already higher than Target
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//DevCon.Warning("32bit Count already higher than target");
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psxCounters[index].target |= IOPCNT_FUTURE_TARGET;
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}
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else
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psxCounters[index].target &= 0xffff;
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_rcntSet(index);
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}
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@ -588,15 +583,16 @@ void psxRcntWcount32(int index, u32 value)
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}
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psxCounters[index].count = value;
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if ((psxCounters[index].mode & 0x400) || (psxCounters[index].mode & 0x40))
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{ //IRQ not triggered (one shot) or toggle
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psxCounters[index].target &= 0xffffffff;
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}
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if (value > psxCounters[index].target)
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{ //Count already higher than Target
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if (psxCounters[index].count > psxCounters[index].target)
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{
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// Count already higher than Target
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//DevCon.Warning("32bit Count already higher than target");
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psxCounters[index].target |= IOPCNT_FUTURE_TARGET;
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}
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else
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psxCounters[index].target &= 0xffffffff;
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_rcntSet(index);
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}
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@ -610,8 +606,8 @@ __fi void psxRcntWmode16(int index, u32 value)
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pxAssume(index >= 0 && index < 3);
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psxCounter& counter = psxCounters[index];
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counter.mode = value;
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counter.mode |= 0x0400; //IRQ Enable
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counter.mode = (value & IOPCNT_MODE_WRITE_MSK) | (counter.mode & IOPCNT_MODE_FLAG_MSK); // Write new value, preserve flags
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counter.mode |= IOPCNT_INT_REQ; // IRQ Enable
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if (value & (1 << 4))
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{
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@ -700,8 +696,8 @@ __fi void psxRcntWmode32(int index, u32 value)
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pxAssume(index >= 3 && index < 6);
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psxCounter& counter = psxCounters[index];
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counter.mode = value;
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counter.mode |= 0x0400; //IRQ enable
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counter.mode = (value & IOPCNT_MODE_WRITE_MSK) | (counter.mode & IOPCNT_MODE_FLAG_MSK); // Write new value, preserve flags
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counter.mode |= IOPCNT_INT_REQ; // IRQ Enable
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if (value & (1 << 4))
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{
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@ -783,11 +779,16 @@ void psxRcntWtarget16(int index, u32 value)
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//DevCon.Warning("IOP Counter[%d] writeTarget16 = %lx", index, value);
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psxCounters[index].target = value & 0xffff;
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if (!(psxCounters[index].mode & IOPCNT_INT_TOGGLE))
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{
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// Pulse mode reset
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psxCounters[index].mode |= IOPCNT_INT_REQ; // Interrupt flag reset to high
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}
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// protect the target from an early arrival.
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// if the target is behind the current count, then set the target overflow
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// flag, so that the target won't be active until after the next overflow.
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if (psxCounters[index].target <= psxRcntCycles(index) || ((psxCounters[index].mode & 0x400) == 0 && !(psxCounters[index].mode & 0x40)))
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if (psxCounters[index].target <= psxRcntCycles(index))
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psxCounters[index].target |= IOPCNT_FUTURE_TARGET;
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_rcntSet(index);
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@ -799,15 +800,17 @@ void psxRcntWtarget32(int index, u32 value)
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//DevCon.Warning("IOP Counter[%d] writeTarget32 = %lx mode %x", index, value, psxCounters[index].mode);
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psxCounters[index].target = value;
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if (!(psxCounters[index].mode & 0x80))
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{ //Toggle mode
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psxCounters[index].mode |= 0x0400; // Interrupt flag set low
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if (!(psxCounters[index].mode & IOPCNT_INT_TOGGLE))
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{
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// Pulse mode reset
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psxCounters[index].mode |= IOPCNT_INT_REQ; // Interrupt flag reset to high
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}
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// protect the target from an early arrival.
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// if the target is behind the current count, then set the target overflow
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// flag, so that the target won't be active until after the next overflow.
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if (psxCounters[index].target <= psxRcntCycles(index) || ((psxCounters[index].mode & 0x400) == 0 && !(psxCounters[index].mode & 0x40)))
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if (psxCounters[index].target <= psxRcntCycles(index))
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psxCounters[index].target |= IOPCNT_FUTURE_TARGET;
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_rcntSet(index);
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@ -858,6 +861,7 @@ u64 psxRcntCycles(int index)
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{
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if (psxCounters[index].mode & IOPCNT_STOPPED || psxCounters[index].rate == PSXHBLANK)
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return psxCounters[index].count;
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return (u64)(psxCounters[index].count + (u32)((psxRegs.cycle - psxCounters[index].sCycleT) / psxCounters[index].rate));
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}
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