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x86/iR5900: Fix msub.s/madd.s when ACC isn't live 

Don't read EEREC_nnn without checking the process/valid bit first.
This commit is contained in:
Connor McLaughlin 2022-12-11 14:20:55 +10:00 committed by refractionpcsx2
parent 05c12e2505
commit 1920bff007
1 changed files with 6 additions and 6 deletions
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12
pcsx2/x86/iFPU.cpp
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@ -1288,7 +1288,7 @@ void recMADDtemp(int info, int regd)
FPU_ADD(regd, t0reg);
}
}
else if (regd == EEREC_ACC)
else if ((info & PROCESS_EE_ACC) && regd == EEREC_ACC)
{
xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Fs_]]);
if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(EEREC_T); fpuFloat2(t0reg); }
@ -1374,7 +1374,7 @@ void recMADDtemp(int info, int regd)
}
break;
default:
if (regd == EEREC_ACC)
if ((info & PROCESS_EE_ACC) && regd == EEREC_ACC)
{
const int t1reg = _allocTempXMMreg(XMMT_FPS);
xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Fs_]]);
@ -1492,7 +1492,7 @@ void recMSUBtemp(int info, int regd)
FPU_SUB(t0reg, regd);
xMOVSS(xRegisterSSE(regd), xRegisterSSE(t0reg));
}
else if (regd == EEREC_ACC)
else if ((info & PROCESS_EE_ACC) && regd == EEREC_ACC)
{
xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Ft_]]);
if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(EEREC_S); fpuFloat2(t0reg); }
@ -1528,7 +1528,7 @@ void recMSUBtemp(int info, int regd)
FPU_SUB(t0reg, regd);
xMOVSS(xRegisterSSE(regd), xRegisterSSE(t0reg));
}
else if (regd == EEREC_ACC)
else if ((info & PROCESS_EE_ACC) && regd == EEREC_ACC)
{
xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Fs_]]);
if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(EEREC_T); fpuFloat2(t0reg); }
@ -1575,7 +1575,7 @@ void recMSUBtemp(int info, int regd)
FPU_SUB(t0reg, regd);
xMOVSS(xRegisterSSE(regd), xRegisterSSE(t0reg));
}
else if (regd == EEREC_ACC)
else if ((info & PROCESS_EE_ACC) && regd == EEREC_ACC)
{
xMOVSS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S));
if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(t0reg); fpuFloat2(EEREC_T); }
@ -1598,7 +1598,7 @@ void recMSUBtemp(int info, int regd)
}
break;
default:
if (regd == EEREC_ACC)
if ((info & PROCESS_EE_ACC) && regd == EEREC_ACC)
{
const int t1reg = _allocTempXMMreg(XMMT_FPS);
xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Fs_]]);